VN5E160ASO-E [STMICROELECTRONICS]
Single channel high-side driver with analog for automotive applications;
| 型号： | VN5E160ASO-E |
| 厂家： | 
ST |
| 描述： | Single channel high-side driver with analog for automotive applications |
| 文件： | 总37页 (文件大小：739K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VN5E160ASO-E
Single channel high-side driver with analog
for automotive applications
Datasheet
−
production data
Features
Max supply voltage
VCC
41 V
SO-16L
Operating voltage range
VCC 4.5 V to 28 V
("1($'5ꢀꢀꢁꢀꢀ
Max on-state resistance (per ch.) RON
160 mΩ
10 A
– Overtemperature shutdown with
autorestart (thermal shutdown)
Current limitation (typ)
Off-state supply current
ILIMH
IS
2 µA(1)
– Reverse battery protected
– Electrostatic discharge protection
1. Typical value with all loads connected.
Application
■
General
■
All types of resistive, inductive and capacitive
loads
– Inrush current active management by
power limitation
– Very low standby current
■
Suitable as LED driver
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
Description
The VN5E160ASO-E is a single channel high-
side driver manufactured using ST proprietary
VIPower® M0-5 technology and housed in
SO-16L package. The device is designed to drive
12 V automotive grounded loads, and to provide
protection and diagnostics. It also implements a
3 V and 5 V CMOS-compatible interface for the
use with any microcontroller.
– Compliant with European directive
2002/95/EC
– Very low current sense leakage
– AEC-Q100 qualified
■
Diagnostic functions
– Proportional load current sense
– High-precision current sense for
wide-range currents
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with
– Current sense disable
– OFF-state open-load detection
– Output short to VCC detection
auto-restart and overvoltage active clamp. A
dedicated analog current sense pin is associated
with every output channel providing ehnanced
diagnostic functions including fast detection of
overload and short-circuit to ground through
power limitation indication, overtemperature
indication, short-circuit to VCC diagnosis and ON-
state and off-state open-load detection. The
current sensing and diagnostic feedback of the
whole device can be disabled by pulling the
CS_DIS pin high to share the external sense
resistor with similar devices.
– Overload and short to ground
(power limitation) indication
■
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self-limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
September 2013
Doc ID 022475 Rev. 5
1/37
This is information on a product in full production.
www.st.com
1
Contents
VN5E160ASO-E
Contents
1
2
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
2.2
2.3
2.4
2.5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1
3.1.2
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 25
3.2
3.3
3.4
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1
Short to VCC and OFF-state open-load detection . . . . . . . . . . . . . . . . . 27
3.5
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28
4
5
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1
SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
®
5.1
5.2
5.3
ECOPACK packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
7
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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VN5E160ASO-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V; Tj = 25 °C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Open-load detection (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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List of figures
VN5E160ASO-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
OFF-state open-load delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8.
Figure 9.
I
OUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Maximum current sense ratio drift vs load current(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. OFF-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 16. Tj evolution in overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 17. OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High-level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Input voltage clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. Hysteresis input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. ON-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. ON-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27.
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. High-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. CS_DIS voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. Low-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. Current sense and diagnostic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Maximum turn-off current versus inductance (for each channel)(1) . . . . . . . . . . . . . . . . . . 28
Figure 35. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. SO-16L thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 38. Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 39. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. SO-16L tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 41. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Block diagram and pin configuration
1
Block diagram and pin configuration
Figure 1.
Block diagram
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Table 1.
Pin function
Name
Function
VCC
Battery connection.
Power output.
OUT
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
GND
IN
Voltage-controlled input pin with hysteresis, CMOS compatible; it controls output
switch state.
CS
Analog current sense pin; it delivers a current proportional to the load current.
Active high CMOS compatible pin, to disable the current sense pin.
CS_DIS
Doc ID 022475 Rev. 5
5/37
Block diagram and pin configuration
VN5E160ASO-E
Figure 2.
Configuration diagram (top view)
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Table 2.
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X(1)
X
X
X
Through 1 kΩ
Through 10 kΩ Through 10 kΩ
resistor resistor
To ground
X
Not allowed
resistor
1. X: do not care.
6/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Electrical specifications
2
Electrical specifications
Figure 3.
Current and voltage conventions
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1.
V
= V
- V during reverse battery condition.
OUT CC
F
2.1
Absolute maximum ratings
Stressing the device above the ratings listed in Table 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to the conditions in the “absolute maximum ratings” table for extended periods
may affect device reliability.
Table 3.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VCC
DC supply voltage
41
V
V
-VCC
Reverse DC supply voltage
0.3
200
-IGND DC reverse ground pin current
IOUT DC output current
-IOUT Reverse DC output current
mA
A
Internally limited
6
A
IIN
DC input current
-1 to 10
-1 to 10
200
mA
mA
mA
ICSD
DC current sense disable input current
-ICSENSE DC reverse CS pin current
VCSENSE Current sense maximum voltage
Maximum switching energy (single pulse)
VCC - 41
+VCC
V
V
EMAX
36
mJ
(L = 8 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150°C;
IOUT = IlimL(Typ.) )
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Electrical specifications
VN5E160ASO-E
Table 3.
Symbol
Absolute maximum ratings (continued)
Parameter
Value
Unit
Electrostatic discharge
(human body model: R = 1.5 KΩ; C = 100 pF)
V
V
V
V
V
– IN
4000
2000
4000
5000
5000
VESD – CS
– CS_DIS
– OUT
– VCC
VESD Charge device model (CDM-AEC-Q100-011)
750
V
Tj
Junction operating temperature
Storage temperature
-40 to 150
-55 to 150
°C
°C
Tstg
2.2
Thermal data
Table 4.
Symbol
Thermal data
Parameter
Typical value
Unit
Rthj-pcb Thermal resistance junction-pcb(1)
18.5
See Figure 36
38
°C/W
°C/W
°C/W
Rthj-amb Thermal resistance junction - ambient on two layers pcb
Rthj-amb Thermal resistance junction - ambient on two layers pcb(2)
1. The measure is done in accordance with the JESD 51-8.
2. Four Layers PCB characteristics:
- Cu thickness: 70 um outer layers, 35 um inner layers
- Board finish thickness 1.6 mm +/- 10%
- Thermal vias separation 1.2 mm
- Thermal via diameter 0.3 mm +/- 0.08 mm
- Cu thickness on vias 0.025 mm
- Device soldered at about 2cm from the PCB edge with two sqcm of exposed copper.
8/37
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VN5E160ASO-E
Electrical specifications
2.3
Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V; -40°C < Tj < 150°C, unless
otherwise stated.
Table 5.
Symbol
Power section
Parameter
Test conditions
Min. Typ. Max. Unit
VCC
Operating supply voltage
4.5 13
28
V
V
VUSD Undervoltage shut-down
3.5 4.5
0.5
Undervoltage shut-down
hysteresis
VUSDhyst
V
IOUT = 1 A; Tj = 25°C
160
RON
ON-state resistance
I
I
OUT = 1 A; Tj = 150°C
320 mΩ
OUT = 1 A; VCC = 5 V; Tj = 25°C
210
Vclamp Voltage clamp
IS = 20 mA
41
46
52
V
OFF-state: VCC = 13 V;
VIN = VOUT = 0 V; Tj = 25°C
2(1) 5(1)
µA
IS
Supply current
ON-state: VIN = 5 V; VCC = 13 V;
IOUT = 0 A
1.9 3.5
mA
µA
V
V
IN = VOUT = 0 V; VCC = 13 V;
0
0
0.01
3
5
Tj = 25°C
IL(off1) OFF-state output current
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125°C
Output - VCC diode
voltage
VF
-IOUT = 1 A; Tj = 150°C
0.7
1. PowerMOS leakage included.
Table 6.
Symbol
Switching (VCC = 13 V; Tj = 25 °C)
Parameter
Test conditions
Min.
Typ.
Max. Unit
RL = 13 Ω
td(on)
td(off)
Turn-on delay time
—
10
—
—
µs
µs
(see Figure 6)
RL = 13 Ω
(see Figure 6)
Turn-off delay time
—
10
dVOUT/dt(on) Turn-on voltage slope RL = 13 Ω
dVOUT/dt(off) Turn-off voltage slope RL = 13 Ω
—
—
See Figure 26
See Figure 28
—
—
V/µs
V/µs
Switching energy
losses during twon
RL = 13 Ω
WON
—
—
0.05
0.03
—
—
mJ
mJ
(see Figure 6)
Switching energy
losses during twoff
RL = 13 Ω
(see Figure 6)
WOFF
Doc ID 022475 Rev. 5
9/37
Electrical specifications
VN5E160ASO-E
Typ. Max. Unit
Table 7.
Symbol
Logic inputs
Parameter
Test conditions
Min.
VIL
IIL
Low-level input voltage
Low-level input current
High-level input voltage
High-level input current
Hysteresis input voltage
0.9
V
µA
V
VIN = 0.9 V
1
VIH
2.1
IIH
VIN = 2.1 V
10
7
µA
V
VI(hyst)
0.25
5.5
I
IN = 1 mA
VICL
Input voltage clamp
V
IIN = -1 mA
-0.7
VCSDL
ICSDL
VCSDH
ICSDH
Low-level CS_DIS voltage
0.9
V
µA
V
Low-level CS_DIS current VCSD = 0.9 V
High-level CS_DIS voltage
1
2.1
High-level CS_DIS current VCSD = 2.1 V
10
7
µA
V
VCSD(hyst) Hysteresis CS_DIS voltage
0.25
5.5
I
CSD = 1 mA
VCSCL
CS_DIS voltage clamp
V
ICSD = -1 mA
-0.7
Table 8.
Symbol
Protection and diagnostics(1)
Parameter
Test conditions
Min.
Typ.
Max. Unit
VCC = 13 V
7
10
14
14
A
A
DC short-circuit
current
IlimH
5 V < VCC < 28 V
Short-circuit current
during thermal cycling
IlimL
TTSD
TR
V
CC = 13 V; TR < Tj < TTSD
2.5
A
Shutdown
temperature
150
175
200
°C
°C
°C
Reset temperature
TRS + 1 TRS + 5
135
Thermal reset of
STATUS
TRS
Thermal hysteresis
(TTSD - TR)
THYST
VDEMAG
VON
7
°C
V
Turn-off output
voltage clamp
IOUT = 1 A; VIN = 0,
L = 20 mH
V
CC - 41 VCC - 46 VCC - 52
25
Output voltage drop
limitation
IOUT = 0.03 A (see Figure 8)
Tj = -40 °C to +150 °C
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Electrical specifications
Min. Typ. Max. Unit
Table 9.
Current sense (8 V < VCC < 18 V)
Parameter Test conditions
Symbol
IOUT = 0.025 A;
SENSE = 0.5 V
K0
IOUT SENSE
/I
V
265
490
715
Tj = -40°C to 150°C
IOUT = 0.35 A; VSENSE = 0.5 V
Tj = -40°C to 150°C
K1
IOUT SENSE
/I
355
385
465
465
575
545
Tj = 25°C to 150°C
IOUT =0.35 A; VSENSE = 0.5 V
Tj = -40°C to 150°C
(1)
dK1/K1
Current sense ratio drift
-11
+11
%
%
%
IOUT = 0.5 A; VSENSE = 4 V
Tj = -40°C to 150°C
K2
IOUT SENSE
/I
380
400
455
455
530
510
Tj = 25°C to 150°C
I
OUT = 0.5 A;
(1)
dK2/K2
Current sense ratio drift
-8
+8
Tj = -40°C to 150°C
IOUT = 1.5 A; VSENSE = 4 V
Tj = -40°C to 150°C
K3
IOUT SENSE
/I
420
420
455
455
490
480
Tj = 25°C to 150°C
IOUT = 1.5 A;
Tj = -40°C to 150°C
(1)
dK3/K3
Current sense ratio drift
-4
0
+4
1
I
V
OUT = 0 A; VSENSE = 0 V;
CSD = 5 V; VIN = 0 V;
Tj = -40°C to 150°C
I
V
OUT = 0 A; VSENSE = 0 V;
CSD = 0 V; VIN = 5 V;
Tj = -40°C to 150°C
Analog sense leakage
current
ISENSE0
0
2
1
µA
I
V
OUT = 1 A; VSENSE = 0 V;
CSD = 5 V; VIN = 5 V;
0
5
Tj = -40°C to 150°C
Max analog sense
output voltage
RSENSE = 10 KΩ
I
VSENSE
V
V
OUT = 1 A;
Analog sense output
voltage in fault condition
(2)
VSENSEH
VCC = 13 V; RSENSE = 3.9 KΩ
8
9
Analog sense output
current in fault condition
(2)
ISENSEH
VCC = 13 V; VSENSE = 5 V
mA
VSENSE < 4 V;
Delay response time
tDSENSE1H from falling edge of
CS_DIS pin
0.025 A < IOUT < 1.5 A
ISENSE = 90% of ISENSE max
(see Figure 4)
40
5
100
20
µs
µs
VSENSE < 4 V;
Delay response time
tDSENSE1L from rising edge of
CS_DIS pin
0.025 A < IOUT < 1.5 A
ISENSE = 10% of ISENSE max
(see Figure 4)
Doc ID 022475 Rev. 5
11/37
Electrical specifications
VN5E160ASO-E
Table 9.
Symbol
Current sense (8 V < VCC < 18 V) (continued)
Parameter
Test conditions
Min. Typ. Max. Unit
V
SENSE < 4 V;
Delay response time
from rising edge of IN pin ISENSE=90% of ISENSE max
0.025 A < IOUT < 1.5 A
tDSENSE2H
30
160
110
250
µs
µs
µs
(see Figure 4)
VSENSE < 4 V;
Delay response time
between rising edge of
output current and rising
edge of current sense
I
SENSE = 90% of ISENSEMAX,
ΔtDSEN
SE2H
IOUT = 90% of IOUTMAX
IOUTMAX=1.5A (see Figure 7)
VSENSE < 4 V;
0.025 A < IOUT < 1.5 A
Delay response time
tDSENSE2L from falling edge of IN
pin
80
I
SENSE=10% of ISENSE max
(see Figure 4)
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load OFF-state detection.
Table 10. Open-load detection (8 V < VCC < 18 V)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
OFF-state open-load
voltage detection threshold
VOL
VIN = 0 V; 8 V < VCC < 18 V
VIN = 5V; 8 V < VCC < 18 V
2
4
5
V
ON-state open-load
current detection threshold ISENSE = 5 µA
IOL
0.5
mA
µs
Output short-circuit to VCC
See Figure 5
tDSTKON
IL(off2)r
180
-120
1200
0
detection delay at turn-off
OFF-state output current at VIN = 0 V; VSENSE = 0 V
V
OUT = 4 V
V
OUT rising from 0 V to 4 V
µA
µs
V
IN = 0 V;
OFF-state output current at
IL(off2)f
VSENSE = VSENSEH
VOUT falling from VCC to 2 V
-50
90
20
V
OUT = 2 V
Delay response from
output rising edge to
VOUT = 4 V; VIN = 0 V
VSENSE= 90% of VSENSEH
td_vol
VSENSE rising edge in
open-load
12/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Electrical specifications
Figure 4.
Current sense delay characteristics
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OFF-state open-load delay timing
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Doc ID 022475 Rev. 5
13/37
Electrical specifications
Figure 7.
VN5E160ASO-E
Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
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Doc ID 022475 Rev. 5
VN5E160ASO-E
Electrical specifications
Figure 9.
IOUT SENSE
IOUT/ISENSE
620
/I
vs IOUT
590
560
530
500
470
440
410
380
350
320
A
B
C
D
E
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
IOUT (A)
A: Max, Tj = -40°C to 150°C
B: Max, Tj = 25°C to 150°C
C: Typical, Tj = -40°C to 150°C
D: Min, Tj = 25°C to 150°C
E: Min, Tj = -40°C to 150°C
Figure 10. Maximum current sense ratio drift vs load current(1)
dK/K (%)
15
12
9
A
6
3
0
-3
-6
B
-9
-12
-15
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
IOUT (A)
A: Max, Tj = -40°C to 150°C
B: Min, Tj = 25°C to 150°C
1. Parameter guaranteed by design; it is not tested.
Doc ID 022475 Rev. 5
15/37
Electrical specifications
Table 11.
VN5E160ASO-E
Truth table
Conditions
IN
OUT
SENSE (VCSD = 0 V)(1)
L
L
0
Normal operation
Overtemperature
Undervoltage
H
H
Nominal
L
L
L
0
H
VSENSEH
L
L
L
0
0
H
H
X
Nominal
(no power limitation)
Cycling
Overload
H
VSENSEH
(power limitation)
Short circuit to GND
(Power limitation)
L
L
L
0
H
VSENSEH
OFF-state open-load
(with external pull-up)
L
H
VSENSEH
1. If the V
is high, the SENSE output is at high impedance, its potential depends on leakage currents and
CSD
external circuit.
16/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Electrical specifications
Table 12. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test levels(1)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
III
IV
Test pulse
5000
pulses
1
-75 V
-100 V
0.5 s
5 s
5 s
2 ms, 10 Ω
50 µs, 2 Ω
5000
pulses
2a
+37 V
+50 V
0.2 s
3a
3b
-100 V
+75 V
-150 V
+100 V
1h
1h
90 ms
90 ms
100 ms
100 ms
0.1 µs, 50 Ω
0.1 µs, 50 Ω
100 ms,
4
-6 V
-7 V
1 pulse
1 pulse
0.01 Ω
5b(2)
+65 V
+87 V
400 ms, 2 Ω
Table 13. Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test level results(1)
III
IV
Test pulse
1
2a
3a
3b
4
C
C
C
C
C
C
C
C
C
C
C
C
5b(2)
1. The above test levels must be considered referred to V = 13.5 V except for pulse 5b
CC
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Table 14. Electrical transient requirements (part 3)
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
E
Doc ID 022475 Rev. 5
17/37
Electrical specifications
VN5E160ASO-E
2.4
Waveforms
Figure 11. Normal operation
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18/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Electrical specifications
Figure 13. Intermittent overload
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Doc ID 022475 Rev. 5
19/37
Electrical specifications
VN5E160ASO-E
Figure 15. Short to VCC
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Doc ID 022475 Rev. 5
VN5E160ASO-E
Electrical specifications
2.5
Electrical characteristics curves
Figure 17. OFF-state output current
Figure 18. High-level input current
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Figure 19. Input voltage clamp
Figure 20. Low-level input voltage
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Figure 21. High-level input voltage
Figure 22. Hysteresis input voltage
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Doc ID 022475 Rev. 5
21/37
Electrical specifications
VN5E160ASO-E
Figure 23. ON-state resistance vs Tcase Figure 24. ON-state resistance vs VCC
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Figure 25. Undervoltage shutdown
Figure 26. Turn-on voltage slope
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Figure 27. ILIMH vs Tcase
Figure 28. Turn-off voltage slope
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22/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Electrical specifications
Figure 29. High-level CS_DIS voltage
Figure 30. CS_DIS voltage clamp
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Doc ID 022475 Rev. 5
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Application information
VN5E160ASO-E
3
Application information
Figure 32. Application schematic
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3.1
GND protection network against reverse battery
3.1.1
Solution 1: resistor in the ground line (R
only)
GND
This can be used with any type of load.
The following is an indication on how to resize the RGND resistor.
1. RGND ≤ 600 mV / (IS(on)max).
2. RGND ≥ (−VCC) / (-IGND
)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
Equation 1
PD = (-VCC)2 / RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum ON-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
24/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Application information
values. This shift varies depending on how many devices are ON in case of several high-
side drivers sharing the same RGND
.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see Section 3.1.2: Solution 2: a
diode (DGND) in the ground line).
3.1.2
Solution 2: a diode (D
) in the ground line
GND
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.
3.2
3.3
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC maximux DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than the ones shown in the ISO T/R 7637/1 table.
MCU I/Os protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins from latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 2
-VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax
Calculation example:
For VCCpeak = - 100 V, Ilatchup ≥ 20 mA, VOHμC ≥ 4.5 V
5 kΩ ≤ Rprot ≤ 180 kΩ.
Recommended values: Rprot =10 kΩ, CEXT = 10 nF.
Doc ID 022475 Rev. 5
25/37
Application information
VN5E160ASO-E
3.4
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
Current mirror of the load current in normal operation, delivering a current
●
proportional to the load current according to a known ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to
Table 11: Truth table):
–
–
–
–
Power limitation activation
Overtemperature
Short to VCC in OFF-state
Open-load in OFF-state with additional external components.
A logic high-level on the CS_DIS pin simultaneously sets all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing
the sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
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26/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Application information
3.4.1
Short to V and OFF-state open-load detection
CC
Short to VCC
A short-circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device OFF-state. Little or no current is delivered by the current sense
during the ON-state depending on the nature of the short-circuit.
OFF-state open-load with external circuitry
Detection of an open-load in off-mode requires an external pull-up resistor (RPU) connecting
the output to a positive supply voltage (VPU).
It is preferable that VPU is switched-off during the module standby mode to avoid an
increase in overall standby current consumption in normal conditions, that is, when the load
is connected.
An external pull-down resistor (RPD) connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in OFF-state (see Figure 33: Current sense
and diagnostic).
R
PD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external
circuitry:
Equation 3
RPD ≤ 22 KΩ is recommended.
For proper open load detection in OFF-state, the external pull-up resistor must be selected
according to the following formula:
Equation 4
For the values of VOLmin ,VOLmax, IL(off2)r and IL(off2)f (see Table 10: Open-load detection (8 V
< VCC < 18 V).
Doc ID 022475 Rev. 5
27/37
Application information
VN5E160ASO-E
3.5
Maximum demagnetization energy (V = 13.5 V)
CC
Figure 34. Maximum turn-off current versus inductance (for each channel)(1)
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exceed the temperature specified above for curves A and B.
28/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Package and PC board thermal data
4
Package and PC board thermal data
4.1
SO-16L thermal data
Figure 35. SO-16L PC board
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Note:
Layout condition of Rth and Zth measurements (PCB: Double Layers, Thermal Vias,FR4
area 77mm x 86 mm, PCB thickness=1.6mm, Cu thickness = 70µm (front and back side),
Copper area from minimum pad lay- out to 24 cm2 ).
Figure 36.
R
thj-amb vs PCB copper area in open box free air condition
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Doc ID 022475 Rev. 5
29/37
Package and PC board thermal data
VN5E160ASO-E
Figure 37. SO-16L thermal impedance junction ambient single pulse
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ZTHδ = RTH ⋅ δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
30/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Package and PC board thermal data
Table 15. Thermal parameter
Area/island (cm2)
Footprint
2
8
R1 (°C/W)
1.2
4.2
5
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
8
6
6
R5 (°C/W)
14
13
20
13
R6 (°C/W)
28
14.5
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.0008
0.002
0.1
0.5
1
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9
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3
Doc ID 022475 Rev. 5
31/37
Package and packing information
VN5E160ASO-E
5
Package and packing information
®
5.1
ECOPACK packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
Package mechanical data
Figure 39. SO-16L package dimensions
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32/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Package and packing information
Table 16. SO-16L mechanical data
Millimeters
Typ
Symbol
Min
2.35
0.10
0.33
0.23
10.10
7.40
Max
2.65
0.30
0.51
0.32
10.50
7.60
A
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B
C
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0.25
0.40
0°
10.65
0.75
1.27
8°
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0.10
Doc ID 022475 Rev. 5
33/37
Package and packing information
VN5E160ASO-E
5.3
Packing information
Figure 40. SO-16L tube shipment (no suffix)
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34/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Order codes
6
Order codes
Table 17. Device summary
Package
Order codes
Tube
Tape and reel
VN5E160ASOTR-E
SO-16L
VN5E160ASO-E
Doc ID 022475 Rev. 5
35/37
Revision history
VN5E160ASO-E
7
Revision history
Table 18. Document revision history
Date
Revision
Changes
14-Dec-2011
1
Initial release.
Update Table 5: Power section
03-May-2012
25-Jun-2012
2
3
Added Section 4: Package and PC board thermal data
Table 4: Thermal data:
– Rthj-pins: removed row
– Rthj-pcb: added row
18-Sep-2012
18-Sep-2013
4
5
Updated Table 4: Thermal data
Updated disclaimer.
36/37
Doc ID 022475 Rev. 5
VN5E160ASO-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
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UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
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DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
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Doc ID 022475 Rev. 5
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