STV9211 [STMICROELECTRONICS]
12 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER; 12 ns的三通道高电压视频放大器
| 型号： | STV9211 |
| 厂家： | 
ST |
| 描述： | 12 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER |
| 文件： | 总24页 (文件大小：446K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STV9553
12 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER
above is required, ensuring a maximum quality of
the still pictures or moving video.
FEATURES
■ Triple-channel video amplifier
■ Supply voltage up to 115 V
■ 80V Output dynamic range
Perfecly matched with the STV921x ST
preamplifiers, it provides a highly performant and
very cost effective video system.
■ Perfect for PICTURE BOOST application
requiring high video amplitude
■ Pinning for easy PCB layout
■ Supports DC coupling (optimum cost saving)
and AC coupling applications.
■ Built-in Voltage Gain: 20 (Typ.)
■ Rise and Fall Times: 12 ns (Typ.)
■ Bandwidth: 29 MHz (Typ.)
■ Very low stand-by power consumption
■ Perfectly matched with the STV921x
preamplifiers
CLIPWATT 11
(Plastic Package)
DESCRIPTION
The STV9553 is a triple-channel video amplifier
designed in a 120V-high voltage technology and
ORDER CODE: STV9553
able to drive in DC-coupling mode the 3 cathodes
of a CRT monitor.
The STV9553 supports PICTURE BOOST
applications where video amplitude up to 50V or
PIN CONNECTIONS
11
10
9
OUT1
OUT2
OUT3
GNDP
8
V
7
6
5
4
3
DD
GNDS
GNDA
IN3
V
CC
2
1
IN2
IN1
Version 4.0
February 2002
1/24
1
Table of Contents
1
2
3
4
5
6
BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
THERMAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
THEORY OF OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6.1
6.2
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7
8
9
POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
TYPICAL PERFORMANCE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
INTERNAL SCHEMATICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
10 APPLICATION HINTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
How to choose the high supply voltage value (VDD) in DC coupling mode . . . . . . . . 12
Arcing Protection: schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Arcing protection: layout and decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Video response optimization: schematics in DC-coupling mode . . . . . . . . . . . . . . . . . 14
Video response optimization: outputs networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Video response optimization: inputs networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Video response optimization: layout and decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . 15
AC - Coupling mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Stand-by mode, spot suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10.10 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
11 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2
2/24
2
STV9553
1
BLOCK DIAGRAM
OUT1
11
GNDP
8
OUT2
10
OUT3
9
STV9553
VDD
GNDP
VDD
GNDP
7
3
VDD
VCC
V
REF
6
4
2
1
5
GNDS IN1 GNDA
IN2
IN3
2
PIN DESCRIPTION
Pin
1
Name
IN1
Function
Video Input (channel 1)
Video Input (channel 2)
Low Supply Voltage
Video Input (channel 3)
Ground Analog
2
IN2
3
VCC
4
IN3
5
GNDA
GNDS
VDD
6
Ground Substrat
7
High Supply Voltage
Ground Power
8
GNDP
OUT3
OUT2
OUT1
9
Video output (channel 3)
Video output (channel 2)
VIdeo output (channel 1)
10
11
3/24
3
STV9553
3
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
120
Unit
V
V
High supply voltage
Low supply voltage
ESD susceptibility
DD
V
16.5
V
CC
V
Human Body Model (100pF discharged through 1.5KΩ)
EIAJ norm (200pF discharged through 0Ω)
2
300
kV
V
ESD
I
I
Output source current (pulsed < 50µs)
Output sink current (pulsed < 50µs)
Maximum Input Voltage
80
80
mA
mA
V
OD
OG
V
V
+ 0.3
CC
IN Max
V
Minimum Input Voltage
- 0.5
150
V
IN Min
T
Junction Temperature
°C
°C
J
T
Storage Temperature
-20 + 150
STG
4
THERMAL DATA
Symbol
Parameter
Junction-Case Thermal Resistance (Max.)
Junction-Ambient Thermal Resistance (Typ.)
Value
3
Unit
°C/W
°C/W
R
R
th (j-c)
th (j-a)
35
4/24
3
STV9553
5
ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min.
Typ
Max
Unit
SUPPLY parameters (V = 12V, V = 110V, Tamb = 25 °C, unless otherwise specified)
CC
DD
V
V
High supply voltage
20
10
110
12
115
15
V
V
DD
CC
DD
Low supply voltage
I
V
V
V
supply current
V
= 50V
OUT
15
mA
DD
DD
CC
V
V
: switched off (<1.5V)
CC
I
stand-by supply current
supply current
60
40
µA
DDS
: low (Note 1)
OUT
I
V
= 50V
mA
CC
OUT
STATIC parameters (V = 12V, V = 110V, Tamb = 25 °C)
CC
DD
V
DC output voltage
V
V
V
=1.90 V
77
80
0.5
15
83
V
%
OUT
IN
dV
/dV
High voltage supply rejection
= 50V
= 80V
OUT
DD
OUT
OUT
dV
/dT
Output voltage drift versus temperature
mV/°C
OUT
Output voltage matching versus
temperature (Note 2)
d∆V
/dT
V
V
= 80V
= 50V
1
2
mV/°C
OUT
OUT
OUT
R
Video input resistor
kΩ
V
IN
V
Output saturation voltage to supply
Output saturation voltage to GND
Video Gain
I
= -60mA (Note 3)
= 60mA (Note 3)
V
- 6.5
DD
SATH
0
V
I
11
20
3
V
SATL
0
G
V
= 50V
OUT
LE
Linearity Error
17 V<V
<V -15 V
8
%
V
OUT
DD
V
Internal voltage reference
5.6
REF
Note 1: The STV9553 goes into stand-by mode when Vcc is switched off (<1.5V).
In stand-by mode, Vout is set to low level.
Note 2: Matching measured between each channel.
Note 3: Pulsed current width < 50µs
5/24
3
STV9553
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Conditions
Min.
Typ
Max
Unit
DYNAMIC parameters (see Figure 1)
t
Rise time
V
V
=50V, ∆V=40V
=50V, ∆V=40V
10.8
12.8
5
ns
ns
R
DC
PP
PP
t
Fall time
F
DC
OS
Overshoot, white to black transition
Overshoot, black to white transition
Low frequency gain matching (Note 4)
Bandwidth at -3dB
%
R
OS
0
%
F
∆G
V
V
V
V
= 50V, f=1MHz
5
%
DC
DC
DC
DC
BW
=50V, ∆V=20V
=50V, ∆V=40V
=50V, ∆V=20V
29
15
MHz
ns
PP
PP
PP
t
2.5% Settling time
SET
CTL
Low frequency crosstalk
f = 1 MHz
50
32
dB
dB
V
=50V, ∆V=20V
DC
PP
CTH
High frequency crosstalk
f = 20MHz
DYNAMIC parameter in PICTURE BOOST condition (Note 5)
t
Rise/fall time
V
=50V, ∆V=60V
15
9
ns
%
PB
DC
PP
PP
Overshoot white to black or black to white
transition
OS
V
=50V, ∆V=60V
PB
DC
Note 4: Matching measured between each channel.
Note 5: PICTURE BOOST condition (video amplitude at 50V or above) is used in some applications when displaying
still picture or moving video. In this condition the high level of contrast improves the pictures quality at the
expense of the video performances (t , t and Overshoot) which are slightly deteriorated.
R
F
Figure 1. AC test circuit
12V
3
110V
V
V
DD
∆V
V
CC
DC
7
50Ω
OUT
R = 300 Ω
P
1
11
8
IN
C =8pF
L
V
REF
GNDP
STV9553
5
GNDA
6/24
3
STV9553
6
THEORY OF OPERATION
6.1 General
The STV9553 is a three-channel video amplifier supplied by a low supply voltage: V (typ.12V) and a
CC
high supply voltage: V (up to 115V).
DD
The high values of V supplying the amplifier output stage allow direct control of the CRT cathodes (DC
DD
coupling mode).
In DC coupling mode, the application schematic is very simple and only a few external components are
needed to drive the cathodes. In particular, there is no need of the DC-restore circuitry which is used in
classical AC coupling applications.
The output voltage range is wide enough (Figure 2) to provide simultaneously :
– Cut-off adjustment (typ. 25V)
– Video contrast (typ. up to 40V),
– Brightness (with the remaining voltage range).
In normal operation, the output video signal must remain inside the linear region whatever the cut-off,
brightness and contrast adjustments are.
Figure 2. Output signal, level adjustments
V
DD
(A) Top Non-Linear Region
(B) Cut-off Adjust. (25V Typ.)
15V
(C) Brightness Adjust. (10V Typ.)
Blanking pulse
Video Signal
(D) Contrast Adjust. (40V Typ.)
(E) Bottom Non-Linear Region
17V
GND
7/24
3
STV9553
6.2 Output voltage
A very simplified schematic of each STV9553 channel is shown in Figure 3.
The feedback network of each channel is integrated with a typical built-in voltage gain of G=20 (40k/2k).
The output voltage VOUT is given by the following formula:
VOUT = (G+1) x V
- (G x VIN)
REF
for G = 20 and V
= 5.6V, we have
REF
VOUT = 117.6 - 20 x V
IN
Figure 3. Simplified schematic of one channel
V
DD
40k
2k
IN
-
OUT
+
V
REF
GNDA
GNDP
8/24
STV9553
7
POWER DISSIPATION
The total power dissipation is the sum of the static DC and the dynamic dissipation:
P
= P + P
.
DYN
TOT
STAT
The static DC power dissipation is approximately:
= V x I + V x I
P
STAT
DD
DD
CC
CC
The dynamic dissipation is, in the worst case (1 pixel On/ 1 pixel Off pattern):
= 3 V x C x V x f x K (see Note 6)
P
DYN
DD
L
OUT(PP)
where f is the video frequency and K the ratio between the active line and the total horizontal line duration.
Example:
for V = 110V, V = 12V,
DD
CC
I
= 15mA, I = 40mA,
CC
DD
V
= 40 V , f = 25MHz,
PP
OUT
C = 8pF and K = 0.72.
L
We have:
P
= 2.13W and P
= 1.90W
STAT
DYN
Therefore:
P
=4.03W.
TOT
Note 6: This worst thermal case must only be considered for TJmax calculation. Nevertheless, during the average life
of the circuit, the conditions are closer to the white picture conditions.
9/24
STV9553
8
TYPICAL PERFORMANCE CHARACTERISTICS
V
=110V, V =12V, C =8pF, R =300Ω, ∆V=40V , unless otherwise specified - see Figure 1
CC L P PP
DD
Figure 4. STV9553 pulse response
Figure 5. V
versus V
OUT
IN
tr=10.8ns
12
overshoot = 5%
120
100
80
60
40
20
tf=12.8ns
12
0
0
overshoot = 0%
1
2
3
4
5
6
Vin (V)
Figure 6. Power dissipation versus frequency Figure 7. Speed versus temperature
5.00
4.00
3.00
2.00
1.00
0.00
14
13.5
13
Vdd=110V
Tf
Vdd=100
12.5
12
Vdd=90V
11.5
11
Tr
10.5
10
50
60
70
80
90
100
Case Temperature (°C)
10
20
30
Frequency (MHz)
(72% active time)
Figure 8. Speed versus offset
Figure 9. Speed versus load capacitance
18
17
16
15
15
14
Tf
13
12
11
10
Tf
14
13
12
Tr
Tr
11
10
40
45
50
55
Offset (Vdc)
60
65
70
8
10
12
14
16
18
20
Load capacitance (pF)
10/24
STV9553
9
INTERNAL SCHEMATICS
Figure 10. RGB inputs
Figure 11. RGB outputs
VDD
VCC
OUT
IN
pins 9, 10, 11
pins 1, 2, 4
GNDS
GNDS
Figure 12. VDD
Figure 13. VCC
VDD
VCC
GNDS
GNDS
Figure 14. GNDP
Figure 15. GNDA
GNDA
GNDP
GNDS
GNDS
11/24
STV9553
10 APPLICATION HINTS
10.1 How to choose the high supply voltage value (V ) in DC coupling mode
DD
The V high supply voltage must be chosen carefully. It must be high enough to provide the necessary
DD
video adjustment but set to minimum value to avoid unecessary power dissipation.
Example (see Figure 2):
The following example shows how the optimum V voltage value is determined:
DD
– Cut-off adjustment range (B) : 25V
– Max contrast (D) : 40V
Case 1:
10V Brightness (C) adjusted by the preamplifier :
V
= A + B + C + D + E
DD
DD
V
= 15V + 25V + 10V + 40V + 17V = 107V
Case 2:
10V Brightness (C) adjusted by the G1 anode:
V
= A + B + D + E
DD
DD
V
= 15V + 25V + 40V + 17V = 97V
10.2 Arcing Protection: schematics
As the amplifier outputs are connected to the CRT cathodes, special attention must be given to protect
them against possible arcing inside the CRT.
Protection must be considered when starting the design of the video CRT board. It should always be
implemented before starting to adjust the dynamic video response of the system.
The arcing network that we recommend (see Figure 16) provides efficient protection without deteriorating
the amplifier video performances.
The total resistance between the amplifier and the CRT cathode (R10+R11) protects the device against
overvoltages. We recommend to use R10+R11 > 300 Ω.
Spark gaps are strongly recommended for arcing protection.
12/24
STV9553
Figure 16. Arcing protection network (one channel)
V
DD
R19(**)
C12(*)
100nF/250V
33-40Ω
C24
4.7µF/150V
C18
100nF
V
DD
D12
FDH400
OUT
A
L1
R11
R10
CRT
STV9553
0.33µH
150Ω/0.5W
150Ω/0.5W
D13
FDH400
F1
C29(***)
0.22µF
Spark gap
B
GNDS
200V
GNDP
GNDA
R29(***)
1-10Ω
( ): To be connected as close as possible to the device
*
(**): R19 must be mandatorily used
(***): Ground separation network
10.3 Arcing protection: layout and decoupling
Several layout precautions have to be considered to get the optimum arcing protection:
Sparkgap grounding: when an arc occurs, the energy must flow through the CRT ground without
reaching the amplifier. This is obtained by connecting the sparkgap grounding (point B) to the CRT
ground (socket) via a wide/short trace. Conversely the point B must be connected to the amplifier
ground via a longer/narrower trace.
Grounding separation: In order to set apart the amplifer ground and CRT ground, the R29/C29 net-
work (Figure 16) can be used.
Amplifier grounding: The 3 grounds GNDS, GNDA and GNDP must be connected together as
close as possible to the device.
13/24
STV9553
10.4 Video response optimization: schematics in DC-coupling mode
The dynamic video response is optimized by carefully designing the supply decoupling of the video board
(see Section 10.7), the tracks (see Section 10.7), then by adjusting the input/output component network
(see Section 10.5).
For dynamic measurements such as rise/fall time and bandwidth, a 8pF load is used (total load including
the parasitic capacitance of the PC board and CRT Socket).
When used in kit with the STV921x preamplifier from ST, the preamplifier bandwidth register (BW, register
13) must be set to minimum (o dec) for an application with t /t >5.5ns.
R F
Figure 17. Video response optimization for one channel - DC coupling application
C11
4.7µF
C24
4.7µF
C12(*)
100nF
C10(*)
100nF
R19(***)
33-40Ω
V
DD
V
V
DD
CC
Reference
Input Network #1
STV9553
C1
1.5nF
OUT
R10
IN
OUT
L1
R11
CRT
-
+
R1(**)
51Ω
C2
10pF
150Ω 0.33µH 150Ω
V
REF
GNDS
GNDP
GNDA
Caution: For Application with Tr/Tf>5.5ns, the PreAmplifier bandwidth register (BW, Register 13)
must be set to minimum value (0 dec)
( ): To be connected as close as possible to the device
*
( ): R1 must be not be higher than 100Ω
**
(***): R19 must be mandatorily used
2 other Input Networks (Network #2 and #3 below) can be used in replacement of the reference Input Network #1.
See Application note AN1510 for complete description.
Input Network #2
Input Network #3
L1
0.33µH
IN
IN
R1
C2
R1
C2
82Ω
10pF
33Ω
15pF
14/24
STV9553
10.5 Video response optimization: outputs networks
The output network (R10/L1/R11) is used to adjust the amplifier video performances. Once R10 and R11
resistors are set to protect the application against arcing (R10 + R11>300Ω), it is possible to increase the
bandwidth by increasing L1.
10.6 Video response optimization: inputs networks
The input network also plays an important role in the device dynamic behaviour. We recommend to use
the reference input network #1, which is described in Figure 17, but 2 other networks (#2 and #3) can be
used to better match the required performances and the video board layout. Refer to the application note
referenced AN1510 for the complete description of these input networks.
10.7 Video response optimization: layout and decoupling
The decoupling of V and V through good quality HF capacitors (respectively C10 and C12) close to
CC
DD
the device is necessary to improve the dynamic performance of the video signal.
Careful attention has to be given to the three output channels of the amplifier.
Capacitor: The parasitic capacitive load on the amplifier outputs must be as small as possible.
Figure 9 from Section 8 clearly shows the deterioration of the t /t when the capacitive load
R F
increases. Reducing this capacitive load is achieved by moving away the output tracks from the other
tracks (especially ground) and by using thin tracks (<0.5mm), see Figure 17.
Cross talk: Output and input tracks must be set apart. The STV9553 pin-out allows the easy separa-
tion of input and output tracks on opposite sides of the amplifier (see Figure 21).
Length: Connection between amplifier output and cathode must be as short and direct as possible.
15/24
STV9553
10.8 AC - Coupling mode
The STV9553 can be used in AC-Coupling mode in kit with the TDA9207/9212 preamplifier from ST. As
for the DC-coupling mode, the STV9553 drives perfectly the video signal in PICTURE BOOST conditions.
A typical schematic is given on the Figure 18 below.
Figure 18. Video response optimization for one channel - AC coupling application
C11
4.7µF
C24
4.7µF
C10(*) C12(*)
100nF 100nF
R19(***)
V
DD
V
V
DD
CC
33-40Ω
Reference
Input Network #1 (****)
STV9553
C1
1.5nF
C
OUT
R10
IN
OUT
L1
C1
R11
150Ω
CRT
-
R1(**)
C2
+
150Ω 0.33µH 1µF
51Ω
V
10pF
REF
GNDS
GNDP
GNDA
V
restore
Cut-off
DC Restore
circuitry
Caution: For Application with Tr/Tf>5.5ns, the PreAmplifier bandwidth register (BW, Register 13)
must be set to minimum value (0 dec)
( ): To be connected as close as possible to the device
*
( ): R1 must be not be higher than 100Ω
**
(***): R19 must be mandatorily used
(****): Input Networks #2 and #3 can be used as well
The advantage of such an architecture is to use smaller V
and therefore to have smaller power
DD
consumption. This is due to the fact that the STV9553 provides only the video signal and not the cut-off
adjustment. The disadvantage is to have an application with more components (DC restore circuitry).
Note that it is mandatory to keep the output video signal (point C) inside the linear area of the amplifier
(from 17V to V - 15V).
DD
16/24
STV9553
10.9 Stand-by mode, spot suppression
The usual way to set a monitor in stand-by mode is to switch-off the Vcc (12V).
The STV9553 has an extremely low power consumption (I
and the outputs are set to low level (white picture).
= 60µA when V <1.5V) in stand-by mode
CC
DDS
To avoid the display of a spot effect during the switch-off phase, it is necessary to adjust the G1 circuitry
(Resistors Rx and Cx, see Figure 19) to pull the G1 voltage to low value during a sufficient time duration.
Figure 19. Stand-by mode, spot effect
+80V
Cathode
0V
Case #1: Low Rx.Cx
-30V
A spot might appear during
G1
the switch-off phase
Case #2: High Rx.Cx
No spot effect
-120V
EHT
(27kV)
Typical G1 generator circuitry
R1
G1
Cx
Rx
-120V
-30V
17/24
STV9553
10.10 Conclusion
Video response is always a compromise between several parameters. For example, the rise/fall time
improvement leads to the overshoot deterioration.
The recommended way to optimize the video response is:
1
To set R10+R11 for arcing protection (min. 300 Ω)
2. To adjust R20 and R10+R11.
Increasing their value increases the
t /t values and decrease the overshoot
R F
3. To adjust L1
Increasing L1 speeds up the device but increases the overshoot.
4. To adjust the input network for the final dynamic tunning (e.g.: critical damping)
We recommend our customers to use the schematic shown on Figure 23 as a starting point for the video
board and then to apply the optimization they need.
18/24
STV9553
Figure 20.STV9553/9555/9556 + TDA9210/STV9211 + STV9936 S/P
DC-coupling demonstration board: Silk Screen and Trace
19/24
STV9553
Figure 21. Outputs trace (from figure 19)
Figure 22. CRT socket trace (from figure 19)
20/24
STV9553
Figure 23. STV9553/55/56 + STV9936 + TDA9210/STV9211 DC-coupling demo - board schematic
D
D
G N 1 2
G N
1
7
G 2
G 1 5
9
H 2
H 1
1 0
V d d
V c
D P G N
8
7
3
G N D S
6
G N D A
5
c
21/24
STV9553
11 PACKAGE MECHANICAL DATA
11 PIN - CLIPWATT
V1
H3
H2
H1
S
A
Shaded area ewpose dfrom plasti cbody
C
Typical 30 µm
V1
V1
V2
L3
V1
R2
L2
R
L1
R1
R3
D
R3
M
R3
B
LEAD#1
G
F
E
F1
M1
G1
Millimeters
Typ.
3
Inches
Dimensions
Min.
2.95
0.95
-
Max.
3.05
1.05
-
Min.
0.116
0.037
-
Typ.
0.118
0.039
0.006
0.059
0.02
Max.
0.12
A
B
1
0.041
-
C
0.15
1.5
D
1.3
1.7
0.051
0.0.019
0.03
0.061
0.021
0.034
0.004 (6)
0.071
0.673
-
E
0.49
0.78
-
0.515
0.8
0.55
0.86
0.1
F
0.031
0.002
0.067
0.669
0.472
0.732
0.787
0.704
0.572
0.433
0.216
0.1
F1
G
0.05
1.7
-
1.6
1.8
0.063
0.665
-
G1
H1
H2
H3
L
16.9
-
17
17.1
-
12
18.55
19.9
17.7
14.35
10.9
5.4
18.6
20
18.65
20.1
18.1
14.65
11.1
5.6
0.73
0.734
0.791 (5)
0.712
0.576
0.437(5)
0.22
0.783
0.696
0.564
0.429
0.212
0.092
0.092
0.057
17.9
14.55
11
L1
L2
L3
M
5.5
2.34
2.34
1.45
2.54
2.54
-
2.74
2.74
-
0.107
0.107
-
M1
R
0.1
-
22/24
STV9553
Millimeters
Typ.
Inches
Typ.
Dimensions
Min.
3.2
-
Max.
3.4
-
Min.
0.126
-
Max.
R1
R2
R3
S
3.3
0.13
0.134
0.3
0.012
0.019
0.027
10deg.
5deg.
75deg.
-
-
-
0.5
-
-
0.65
0.7
0.75
0.025
0.029
V
10deg.
5deg.
75deg.
V1
V2
Note 5: “H3 and L2” do not include mold flash or protrusions
Mold flash or protrusions shall not exceed 0.15mm per side.
Note 6: No intrusions allowed inwards the leads
Critical dimensions:
Lead split (M1)
Total length (L)
23/24
STV9553
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for
the consequences of use of such information nor for any infringement of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of
STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication
supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as
critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics.
2002 STMicroelectronics - All Rights Reserved
Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent.
Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard
Specifications as defined by Philips.
STMicroelectronics GROUP OF COMPANIES
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24/24
4
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