STS10N3LH5 [STMICROELECTRONICS]
N-channel 30 V, 0.019 Ω, 10 A, SO-8 STripFET⢠V Power MOSFET; N沟道30 V ， 0.019 I© ， 10 A ， SO - 8 STripFETâ ?? ¢ V功率MOSFET
| 型号： | STS10N3LH5 |
| 厂家： | 
ST |
| 描述： | N-channel 30 V, 0.019 Ω, 10 A, SO-8 STripFET⢠V Power MOSFET |
| 文件： | 总13页 (文件大小：778K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STS10N3LH5
N-channel 30 V, 0.019 Ω, 10 A, SO-8
STripFET™ V Power MOSFET
Features
Type
VDSS
RDS(on) max
ID
STS10N3LH5
30 V
0.021 Ω
10 A
■ R
* Q industry benchmark
g
DS(on)
■ Extremely low on-resistance R
DS(on)
■ Very low switching gate charge
■ High avalanche ruggedness
■ Low gate drive power losses
SO-8
Application
■ Switching applications
Figure 1.
Internal schematic diagram
Description
This STripFET™V Power MOSFET technology is
among the latest improvements, which have been
especially tailored to achieve very low on-state
resistance providing also one of the best-in-class
FOM.
Table 1.
Order codes
STS10N3LH5
Device summary
Marking
Package
SO-8
Packaging
10D3L
Tape and reel
May 2009
Doc ID 15618 Rev 1
1/13
www.st.com
13
Contents
STS10N3LH5
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/13
Doc ID 15618 Rev 1
STS10N3LH5
Electrical ratings
1
Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VDS
VGS
Drain-source voltage (VGS = 0)
Gate-Source voltage
30
22
V
V
(1)
ID
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed)
10
A
ID
7
A
(2)
IDM
40
A
PTOT
Total dissipation at TC = 25 °C
Derating factor
2.5
0.02
50
W
W/°C
mJ
(3)
EAS
Single pulse avalanche energy
TJ
Operating junction temperature
Storage temperature
- 55 to 150
°C
Tstg
1. Limited by wire bonding
2. Pulse width limited by safe operating area
3. Starting TJ = 25 °C, ID = 21 A, L= 0.2 mH
Table 3.
Symbol
Thermal resistance
Parameter
Value
Unit
RthJC
RthJA
Thermal resistance junction-case max
Thermal resistance junction-case max
50
°C/W
°C/W
100
Maximum lead temperature for soldering
purpose
TJ
275
°C
Doc ID 15618 Rev 1
3/13
Electrical characteristics
STS10N3LH5
2
Electrical characteristics
(T
= 25 °C unless otherwise specified)
CASE
Table 4.
Symbol
Static
Parameter
Test conditions
Min.
Typ.
Max. Unit
Drain-source
breakdown Voltage
V(BR)DSS
ID = 250 µA, VGS= 0
30
V
VDS = 30 V
1
µA
µA
Zero gate voltage
drain current (VGS = 0)
IDSS
VDS = 30 V, Tc = 125 °C
10
Gate body leakage
current
IGSS
VGS
=
22 V
±100
nA
(VDS = 0)
VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA
1
V
Ω
Ω
VGS = 10 V, ID= 5 A
0.019 0.021
0.023 0.028
Static drain-source on
RDS(on)
resistance
VGS = 4.5 V, ID= 5 A
Table 5.
Symbol
Dynamic
Parameter
Test conditions
Min
Typ.
Max. Unit
Input capacitance
Output capacitance
Ciss
Coss
Crss
475
97
pF
VDS = 25 V, f = 1 MHz,
VGS = 0
-
-
-
-
pF
pF
Reverse transfer
capacitance
19
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 15 V, ID = 10 A
VGS = 5 V
4.6
1.7
1.9
nC
nC
nC
-
-
(Figure 14)
Pre Vth gate-to-source
charge
Qgs1
Qgs2
VDD = 15 V, ID = 10A
VGS = 5 V
0.67
0.84
nC
nC
Post Vth gate-to-
source charge
(Figure 19)
f = 1 MHz gate bias
Bias = 0 test signal
level = 20 mV
RG
Gate input resistance
-
2.5
-
Ω
open drain
4/13
Doc ID 15618 Rev 1
STS10N3LH5
Electrical characteristics
Table 6.
Switching on/off (resistive load)
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
VDD = 15 V, ID = 5 A,
td(on)
tr
Turn-on delay time
Rise time
4
ns
RG = 4.7 Ω, VGS = 10 V
(Figure 13 and Figure 18)
-
-
22
ns
V
DD = 15 V, ID = 5 A,
td(off)
tf
Turn-off delay time
Fall time
13
ns
RG = 4.7 Ω, VGS = 10 V
-
-
2.8
ns
(Figure 13 and Figure 18)
Table 7.
Symbol
Source drain diode
Parameter
Test conditions
Min.
Typ.
Max. Unit
Source-drain current
ISD
10
40
A
A
-
-
Source-drain current
(pulsed)
(1)
ISDM
VSD
I
SD = 5 A, VGS = 0
Forward on voltage
1.1
V
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
16.2
7.8
1
ns
nC
A
ISD = 10 A, VDD = 25 V
di/dt = 100 A/µs,
(Figure 15)
Qrr
-
IRRM
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5 %
Doc ID 15618 Rev 1
5/13
Electrical characteristics
STS10N3LH5
2.1
Electrical characteristics (curves)
Figure 2.
Safe operating area
Figure 3.
Thermal impedance
AM03899v1
I
D
(A)
Tj=150°C
Tc=25°C
100
Sinlge
pulse
10
1
100ms
10ms
1s
0.1
0.01
10
VDS(V)
0.1
1
Figure 4.
Output characteristics
Figure 5.
Transfer characteristics
AM03900v1
AM03901v1
I
D
(A)
I
D
(A)
V
GS=10V
VDS=5V
70
60
50
70
60
50
6V
5V
4V
40
40
30
30
20
10
0
20
10
0
3V
1
2
4
V
DS(V)
8
VGS(V)
0
2
3
0
4
6
Figure 6.
Normalized BV
vs temperature Figure 7.
Static drain-source on resistance
DSS
AM03902v1
AM03903v1
BVDSS
(norm)
R
DS(on)
(Ω)
I
V
D
=13.5A
35
GS=10V
1.10
1.05
1.00
30
25
20
15
0.95
10
5
0.90
0.85
0
0
25
5
15
20
10
-55
-30
-5
20 45 70
120
T
J
(°C)
Doc ID 15618 Rev 1
ID(A)
95
6/13
STS10N3LH5
Electrical characteristics
Figure 8.
Gate charge vs gate-source voltage Figure 9.
Capacitance variations
AM03904v1
AM03905v1
C
(pF)
V
(V)
GS
V
DD=15V
810
710
610
510
T =25°C
J
f=1MHz
12
10
8
I
D=27A
Ciss
410
310
210
6
4
2
0
Crss
110
10
Coss
4
0
0
2
6
Qg(nC)
10
20
VDS(V)
Figure 10. Normalized gate threshold voltage Figure 11. Normalized on resistance vs
vs temperature
temperature
AM03906v1
AM03907v1
V
GS(th)
RDS(on)
(norm)
(norm)
1.8
1.1
1.0
0.9
0.8
0.7
1.6
1.4
1.2
1.0
0.8
0.6
0.6
0.4
0.5
0.4
-55
-55
-30 -5 20 45 70
-30
-5
20 45 70
T
J(°C)
TJ(°C)
95 120
95 120 145
Figure 12. Source-drain diode forward
characteristics
AM03908v1
VSD
(V)
1.1
TJ=-55°C
1.0
0.9
0.8
0.7
0.6
0.5
0.4
TJ=175°C
TJ=25°C
0
5
10
15
20
25
ISD(A)
Doc ID 15618 Rev 1
7/13
Test circuits
STS10N3LH5
3
Test circuits
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
VDD
12V
47kΩ
100nF
1kΩ
2200
3.3
µF
RL
µF
IG=CONST
VDD
100Ω
Vi=20V=VGMAX
D.U.T.
VG
VD
RG
VGS
2200
µF
D.U.T.
2.7kΩ
47kΩ
PW
1kΩ
PW
AM01468v1
AM01469v1
Figure 15. Test circuit for inductive load
switching and diode recovery times
Figure 16. Unclamped inductive load test
circuit
L
A
A
A
B
D
FAST
DIODE
L=100µH
VD
G
2200
µF
D.U.T.
B
3.3
µF
VDD
S
3.3
µF
1000
µF
B
VDD
25
Ω
ID
D
G
RG
S
Vi
D.U.T.
Pw
AM01470v1
AM01471v1
Figure 17. Unclamped inductive waveform
Figure 18. Switching time waveform
ton
tdon
toff
tdoff
V(BR)DSS
tr
tf
VD
90%
10%
90%
IDM
10%
VDS
ID
0
0
VDD
VDD
90%
VGS
10%
AM01472v1
AM01473v1
8/13
Doc ID 15618 Rev 1
STS10N3LH5
Test circuits
Figure 19. Gate charge waveform
Doc ID 15618 Rev 1
9/13
Package mechanical data
STS10N3LH5
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
10/13
Doc ID 15618 Rev 1
STS10N3LH5
Package mechanical data
SO-8 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
MIN.
TYP.
MAX.
0.068
0.009
0.064
0.033
0.018
0.010
0.019
A
a1
a2
a3
b
0.1
0.003
0.65
0.35
0.19
0.25
0.025
0.013
0.007
0.010
b1
C
c1
D
45 (typ.)
4.8
5.8
5.0
6.2
0.188
0.228
0.196
0.244
E
1.27
3.81
e
0.050
0.150
e3
F
3.8
0.4
4.0
1.27
0.6
0.14
0.157
0.050
0.023
L
0.015
M
S
8 (max.)
Doc ID 15618 Rev 1
11/13
Revision history
STS10N3LH5
5
Revision history
Table 8.
Date
06-May-2009
Document revision history
Revision
Changes
1
First release
12/13
Doc ID 15618 Rev 1
STS10N3LH5
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Doc ID 15618 Rev 1
13/13
相关型号：
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STMICROELECTR
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