STF16N50U [STMICROELECTRONICS]

N-channel 500 V, 0.47 Ohm, 15 A UltraFAST MESH(TM) Power MOSFET in TO-220FP package;
STF16N50U
型号: STF16N50U
厂家: ST    ST
描述:

N-channel 500 V, 0.47 Ohm, 15 A UltraFAST MESH(TM) Power MOSFET in TO-220FP package

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STF16N50U  
N-channel 500 V, 0.47 , 15 A TO-220FP  
UltraFAST MESH™ Power MOSFET  
Features  
VDSS  
Tjmax.  
@
RDS(on)  
max.  
Type  
ID  
Pw  
STF16N50U  
550 V  
< 0.52 15 A 30 W  
100% avalanche tested  
3
2
Outstanding dv/dt capability  
Gate charge minimized  
1
TO-220FP  
Very low intrinsic capacitance  
Very low R  
DS(on)  
Extremely low t  
rr  
Application  
Figure 1.  
Internal schematic diagram  
Switching applications  
D(2)  
– High voltage inverters specific for LCD TV  
– Lighting full bridge topology  
– Motor control  
Description  
G(1)  
TM  
The device is an N-channel Ultrafast MESH  
This technology associates all advantages of  
.
reduced on-resistance. Zener gate protection and  
very high dv/dt capability with an extremely  
enhanced fast body-drain recovery diode.  
S(3)  
AM01476v1  
Table 1.  
Order code  
STF16N50U  
Device summary  
Marking  
Package  
TO-220FP  
Packaging  
16N50U  
Tube  
September 2010  
Doc ID 17923 Rev 1  
1/12  
www.st.com  
12  
Contents  
STF16N50U  
Contents  
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
2.1  
Electrical characteristics (curves)  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
3
4
5
Test circuits  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
2/12  
Doc ID 17923 Rev 1  
STF16N50U  
Electrical ratings  
1
Electrical ratings  
Table 2.  
Symbol  
Absolute maximum ratings  
Parameter  
Value  
Unit  
VDS  
VGS  
ID  
Drain-source voltage (VGS = 0)  
Gate-source voltage  
500  
30  
V
V
Drain current (continuous) at TC = 25 °C  
Drain current (continuous) at TC = 100 °C  
Drain current (pulsed)  
15 (1)  
9 (1)  
60 (1)  
30  
A
ID  
A
(2)  
IDM  
A
PTOT  
IAR  
Total dissipation at TC = 25 °C  
W
Avalanche current, repetitive or not-  
repetitive (pulse width limited by Tj max)  
11  
A
Single pulse avalanche energy  
EAS  
250  
mJ  
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)  
dv/dt (3) Peak diode recovery voltage slope  
VESD-(G-S) G-S EDS (HBM C=100 pF; R=1.5 k)  
Insulation withstand voltage (RMS) from all  
20  
V/ns  
V
4000  
three leads to external heat sink  
VISO  
2500  
V
(t = 1 s; TC = 25 °C)  
Tstg  
Tj  
Storage temperature  
-55 to 150  
150  
°C  
°C  
Max. operating junction temperature  
1. Current is limited by wire features.  
2. Pulse width limited by safe operating area.  
3. ISD 11 A, di/dt 400 A/µs, VDD = 80% V(BR)DSS.  
Table 3.  
Symbol  
Thermal data  
Parameter  
Value  
Unit  
Rthj-case Thermal resistance junction-case max  
Rthj-amb Thermal resistance junction-ambient max  
3.29  
62.5  
°C/W  
°C/W  
Maximum lead temperature for soldering  
purpose  
Tl  
300  
°C  
Doc ID 17923 Rev 1  
3/12  
Electrical characteristics  
STF16N50U  
2
Electrical characteristics  
(T = 25 °C unless otherwise specified).  
C
Table 4.  
Symbol  
On /off states  
Parameter  
Test conditions  
ID = 1 mA, VGS = 0  
DS = Max rating  
Min.  
Typ.  
Max. Unit  
Drain-source  
breakdown voltage  
V(BR)DSS  
500  
V
Zero gate voltage  
V
1
µA  
µA  
IDSS  
drain current (VGS = 0) VDS = Max rating, TC=125 °C  
100  
Gate-body leakage  
IGSS  
VGS  
=
20 V  
10  
4.5  
µA  
V
current (VDS = 0)  
VGS(th)  
RDS(on  
Gate threshold voltage VDS = VGS, ID = 100 µA  
Static drain-source on  
3
3.75  
0.47  
VGS = 10 V, ID = 5 A  
0.52  
resistance  
Table 5.  
Symbol  
Dynamic  
Parameter  
Test conditions  
Min.  
Typ.  
Max. Unit  
Input capacitance  
Ciss  
Coss  
Crss  
1950  
250  
59  
pF  
Output capacitance  
VDS = 25 V, f = 1 MHz, VGS = 0  
-
-
-
pF  
pF  
Reverse transfer  
capacitance  
Equivalent  
capacitance time  
related  
Co(tr)  
-
78  
pF  
VGS = 0, VDS = 0 to 400 V  
f = 1 MHz open drain  
Equivalent  
capacitance energy  
related  
Co(er)  
-
-
58  
-
-
pF  
Intrinsic gate  
resistance  
RG  
1.9  
Qg  
Qgs  
Qgd  
Total gate charge  
Gate-source charge  
Gate-drain charge  
VDD = 400 V, ID = 10 A,  
VGS = 10 V  
40  
7
nC  
nC  
nC  
-
-
(see Figure 13)  
22  
4/12  
Doc ID 17923 Rev 1  
STF16N50U  
Electrical characteristics  
Min. Typ. Max. Unit  
Table 6.  
Symbol  
Switching times  
Parameter  
Test conditions  
td(on)  
tr  
td(off)  
tf  
Turn-on delay time  
Rise time  
16  
21  
21  
15  
ns  
ns  
ns  
ns  
VDD = 250 V, ID = 5.5 A,  
RG = 4.7 , VGS = 10 V  
(see Figure 12)  
-
-
Turn-off-delay time  
Fall time  
Table 7.  
Symbol  
Source drain diode  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
ISD  
Source-drain current  
11  
44  
A
A
-
-
(1)  
ISDM  
Source-drain current (pulsed)  
(2)  
VSD  
Forward on voltage  
ISD = 11 A, VGS = 0  
1.6  
V
trr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
85  
280  
7
ns  
nC  
A
ISD = 11 A, di/dt = 100 A/µs  
Qrr  
-
-
VDD = 35 V (see Figure 17)  
IRRM  
trr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
ISD = 11 A, di/dt = 100 A/µs  
VDD = 35 V, Tj = 150 °C  
(see Figure 17)  
120  
490  
8
ns  
nC  
A
Qrr  
IRRM  
1. Pulse width limited by safe operating area.  
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%.  
Table 8.  
Symbol  
Gate-source Zener diode  
Parameter  
Test conditions  
Min. Typ. Max. Unit  
30  
Gate-source breakdown  
voltage  
BVGSO  
Igs= 1 mA (open drain)  
-
V
The built-in back-to-back Zener diodes have specifically been designed to enhance not only  
the device’s ESD capability, but also to make them safely absorb possible voltage transients  
that may occasionally be applied from gate to source. In this respect the Zener voltage is  
appropriate to achieve an efficient and cost-effective intervention to protect the device’s  
integrity. These integrated Zener diodes thus avoid the usage of external components.  
Doc ID 17923 Rev 1  
5/12  
Electrical characteristics  
STF16N50U  
2.1  
Electrical characteristics (curves)  
Figure 2.  
Safe operating area  
Figure 3.  
Thermal impedance  
AM07149v1  
I
D
(A)  
10  
10µs  
100µs  
1ms  
1
10ms  
Tj=150°C  
Tc=25°C  
Single pulse  
0.1  
0.01  
10  
V
DS(V)  
0.1  
1
100  
Figure 4.  
Output characteristics  
Figure 5.  
Transfer characteristics  
AM07150v1  
AM07151v1  
I
D
(A)  
I
D
(A)  
V
DS=15V  
V
GS=10V  
30  
25  
20  
20  
6V  
15  
10  
15  
10  
5
5V  
5
0
4V  
V
0
0
5
2
20  
25  
30  
DS(V)  
8
10  
VGS(V)  
10  
15  
0
4
6
Figure 6.  
Normalized B  
vs temperature Figure 7.  
Static drain-source on resistance  
VDSS  
AM07152v1  
AM07153v1  
BVDSS  
(norm)  
R
DS(on)  
()  
1.15  
1.10  
1.05  
1.00  
V
GS=10V  
0.50  
0.49  
0.48  
0.47  
0.46  
0.45  
0.44  
0.95  
0.90  
0.85  
0.80  
4
6
8
2
10  
-100  
-50  
0
50  
TJ(°C)  
0
ID(A)  
100 150  
6/12  
Doc ID 17923 Rev 1  
STF16N50U  
Figure 8.  
Electrical characteristics  
Gate charge vs gate-source voltage Figure 9.  
Capacitance variations  
AM07155v1  
AM07154v1  
V
(V)  
GS  
C
(pF)  
450  
400  
VDS  
V
GS  
V
DD=400V  
=11A  
12  
ID  
Ciss  
350  
300  
1000  
10  
8
250  
200  
150  
100  
100  
Coss  
Crss  
6
4
2
0
10  
1
50  
0
10  
20  
40  
0.1  
100  
30  
Qg(nC)  
VDS(V)  
0
1
10  
Figure 10. Normalized gate threshold voltage Figure 11. Normalized on resistance vs  
vs temperature temperature  
AM07156v1  
AM07157v1  
V
GS(th)  
(norm)  
RDS(on)  
(norm)  
1.1  
2.5  
1.0  
0.9  
0.8  
0.7  
0.6  
2.0  
1.5  
1.0  
0.5  
0
0.5  
0.4  
-100  
-100  
-50  
-50  
0
50  
100  
TJ  
(°C)  
0
50  
TJ(°C)  
150  
100  
150  
Doc ID 17923 Rev 1  
7/12  
Test circuits  
STF16N50U  
3
Test circuits  
Figure 12. Switching times test circuit for  
resistive load  
Figure 13. Gate charge test circuit  
VDD  
12V  
47kΩ  
1kΩ  
100nF  
2200  
3.3  
µF  
RL  
µF  
IG=CONST  
VDD  
100Ω  
Vi=20V=VGMAX  
D.U.T.  
VG  
VD  
RG  
VGS  
2200  
µF  
D.U.T.  
2.7kΩ  
47kΩ  
PW  
1kΩ  
PW  
AM01468v1  
AM01469v1  
Figure 14. Test circuit for inductive load  
switching and diode recovery times  
Figure 15. Unclamped inductive load test  
circuit  
L
A
A
A
B
D
FAST  
DIODE  
L=100µH  
VD  
G
2200  
µF  
D.U.T.  
B
3.3  
µF  
VDD  
S
3.3  
µF  
1000  
µF  
B
VDD  
25  
ID  
D
G
RG  
S
Vi  
D.U.T.  
Pw  
AM01470v1  
AM01471v1  
Figure 16. Unclamped inductive waveform  
Figure 17. Switching time waveform  
ton  
toff  
tdoff  
V(BR)DSS  
tr  
tf  
tdon  
VD  
90%  
10%  
90%  
IDM  
10%  
VDS  
ID  
0
0
VDD  
VDD  
90%  
VGS  
10%  
AM01472v1  
AM01473v1  
8/12  
Doc ID 17923 Rev 1  
STF16N50U  
Package mechanical data  
4
Package mechanical data  
In order to meet environmental requirements, ST offers these devices in different grades of  
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK  
specifications, grade definitions and product status are available at: www.st.com. ECOPACK  
is an ST trademark.  
Doc ID 17923 Rev 1  
9/12  
Package mechanical data  
STF16N50U  
Table 9.  
Dim.  
TO-220FP mechanical data  
mm  
Min.  
Typ.  
Max.  
A
B
4.4  
2.5  
4.6  
2.7  
D
2.5  
2.75  
0.7  
E
0.45  
0.75  
1.15  
1.15  
4.95  
2.4  
F
1
F1  
F2  
G
1.70  
1.70  
5.2  
G1  
H
2.7  
10  
10.4  
L2  
L3  
L4  
L5  
L6  
L7  
Dia  
16  
28.6  
9.8  
2.9  
15.9  
9
30.6  
10.6  
3.6  
16.4  
9.3  
3
3.2  
Figure 18. TO-220FP drawing  
L7  
E
A
B
D
Dia  
L5  
L6  
F2  
F1  
F
G
H
G1  
L4  
L2  
L3  
7012510_Rev_K  
10/12  
Doc ID 17923 Rev 1  
STF16N50U  
Revision history  
5
Revision history  
Table 10. Document revision history  
Date  
Revision  
Changes  
09-Sep-2010  
1
First release.  
Doc ID 17923 Rev 1  
11/12  
STF16N50U  
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12/12  
Doc ID 17923 Rev 1  

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