LCP1521SRL [STMICROELECTRONICS]
PROGRAMMABLE TRANSIENT VOLTAGE SUPPRESSOR FOR SLIC PROTECTION; 可编程瞬态电压抑制器SLIC保护
| 型号： | LCP1521SRL |
| 厂家： | 
ST |
| 描述： | PROGRAMMABLE TRANSIENT VOLTAGE SUPPRESSOR FOR SLIC PROTECTION |
| 文件： | 总11页 (文件大小：173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LCP1521S/LCP152DEE
ASD (Application Specific Devices)
Programmable transient voltage suppressor for SLIC protection
Features
■ Dual programmable transient suppressor
■ Wide negative firing voltage range:
V
MGL = -150 V max.
■ Low dynamic switching voltages:
FP and VDGL
V
SO-8
LCP1521S
QFN 3x3 6 leads
LCP152DEE
■ Low gate triggering current: IGT = 5 mA max
■ Peak pulse current: IPP = 30 A (10/1000 µs)
■ Holding current: IH = 150 mA min
Order codes
■ Low space consuming package
Part Number
Marking
Description
LCP1521S
LCP1521SRL
LCP152DEERL
CP152S
CP152S
LCP152
These devices have been especially designed
to protect new high voltage, as well as classical
SLICs, against transient overvoltages.
Positive overvoltages are clamped by 2 diodes.
Negative surges are suppressed by 2 thyristors,
their breakdown voltage being referenced to -VBAT
through the gate.
Figure 1.
LCP1521S Functional diagram
TIP
GATE
NC
1
TIP
These components present a very low gate
triggering current (IGT) in order to reduce the
current consumption on printed circuit board
during the firing phase.
GND
GND
RING
RING
Benefits
TRISILs™ are not subject to ageing and provide a
fail safe mode in short circuit for a better level of
protection. Trisils are used to ensure equipment
meets various standards such as UL60950,
IEC950 / CSA C22.2, UL1459 and FCC part 68.
Trisils have UL94 V0 approved resin (Trisils are
UL497B approved [file: E136224]).
Figure 2.
LCP152DEE Functional diagram
TIP
TIP
GATE
RING
GND
NC
RING
TM: TRISIL is a trademark of STMicroelectronics
July 2006
Rev 5
1/11
www.st.com
11
Characteristics
LCP1521S/LCP152DEE
1
Characteristics
Table 1.
Standards compliance
Peak
surge
voltage
(V)
Required
peak
current
(A)
Minimum serial
resistor to meet
standard (Ω)
Voltage
waveform
Current
waveform
Standard
2500
1000
2/10 µs
10/1000 µs
500
100
2/10 µs
10/1000 µs
12
24
GR-1089 Core First level
GR-1089 Core
Second level
5000
1500
2/10 µs
2/10 µs
500
100
2/10 µs
2/10 µs
5/310 µs
24
0
GR-1089 Core
Intra-building
6000
1500
150
37.5
110
0
ITU-T-K20/K21
ITU-T-K20 (IEC 61000-4-2)
VDE0433
10/700 µs
1/60 ns
8000
15000
ESD contact discharge
ESD air discharge
0
0
4000
2000
100
60
10
10/700 µs
1.2/50 µs
5/310 µs
50
4000
2000
100
0
0
VDE0878
1/20 µs
50
4000
4000
10/700 µs
1.2/50 µs
100
100
5/310 µs
8/20 µs
60
0
IEC61000-4-5
FCC Part 68,
lightning surge type A
1500
800
10/160 µs
10/560 µs
200
100
10/160 µs
10/560 µs
22.5
15
FCC Part 68,
lightning surge type B
1000
9/720 µs
25
5/320 µs
0
Table 2.
Symbol
Thermal resistances
Parameter
Value
Unit
SO-8
QFN
120
140
Rth(j-a)
Junction to ambient
° C/W
2/11
LCP1521S/LCP152DEE
Characteristics
Table 3.
Symbol
Electrical characteristics (T
= 25° C)
amb
Parameter
I
IGT
IH
Gate triggering current
Holding current
IRM
IRG
VRM
VGT
VF
Reverse leakage current LINE / GND
Reverse leakage current GATE / LINE
Reverse voltage LINE / GND
VR
VRM
VF
V
IRM
IR
Gate triggering voltage
Forward drop voltage LINE / GND
Peak forward voltage LINE / GND
Dynamic switching voltage GATE / LINE
Reverse voltage GATE / LINE
Capacitance LINE / GND
IH
VFP
VDGL
VRG
C
IPP
Table 4.
Symbol
Absolute ratings (T
= 25° C, unless otherwise specified)
amb
Parameter
Value
Unit
10/1000 µs
8/20 µs
30
100
35
10/560 µs
5/310 µs
10/160 µs
1/20 µs
IPP
Peak pulse current
40
A
50
100
150
2/10 µs
t = 20 ms
t = 200 ms
t = 1 s
18
10
7
Non repetitive surge peak on-state current
(50Hz sinusoidal)
ITSM
A
IGSM Maximum gate current (50Hz sinusoidal)
t = 10 ms
2
A
V
VMLG Maximum voltage LINE/GND
VMGL Maximum voltage GATE/LINE
-40° C < Tamb < +85° C
-40° C < Tamb < +85° C
-150
-150
Storage temperature range
Tstg
Tj
-55 to +150
150
° C
° C
Maximum junction temperature
TL
Maximum lead temperature for soldering during 10 s.
260
Table 5.
Symbol
Repetitive peak pulse current
Definition
Example
% I
PP
100
tr
Rise time (µs)
Pulse waveform
10/1000 µs:
tr = 10 µs
50
0
tp
Pulse duration (µs)
t
tp = 1000 µs
t
r
t
p
3/11
Characteristics
LCP1521S/LCP152DEE
= 25° C)
Table 6.
Parameters related to the diode LINE / GND (T
Test conditions
amb
Symbol
Max
Unit
VF
IF = 5A
t = 500 µs
RS = 10 Ω
RS = 10 Ω
RS = 62 Ω
3
V
10/700 µs
1.2/50 µs
1.5 kV
1.5 kV
2.5 kV
5
9
30
(1)
VFP
V
2/10 µs
1. See test circuit for V
(Figure 4.): R is the protection resistor located on the line card.
S
FP
Table 7.
Parameters related to the protection Thyristors (T = 25° C, unless
amb
otherwise specified)
Symbol
IGT
IH
Test conditions
Typ
0.1
150
Max
Unit
VGND / LINE = -48 V
VGATE = -48 V(1)
at IGT
5
mA
mA
V
VGT
2.5
VRG = -150 V
VRG = -150 V
Tj = 25° C
Tj = 85° C
5
50
IRG
µA
VGATE = -48 V(2)
10/700 µs
1.2/50 µs
2/10 µs
1.5 kV
1.5 kV
2.5 kV
RS = 10 Ω
RS = 10 Ω
RS = 62 Ω
I
PP = 30 A
7
VDGL
IPP = 30 A
IPP = 38 A
10
25
V
1. see functional holding current (I ) test circuit
H
2. see test circuit for V
The oscillations with a time duration lower than 50ns are not taken into account.
DG
Table 8.
Symbol
IRM
Parameters related to diode and protection Thyristors (Tamb = 25° C,
unless otherwise specified)
Test conditions
Typ
Max
Unit
VGATE / LINE = -1 V VRM = -150 V
VGATE / LINE = -1 V VRM = -150 V
Tj = 25° C
Tj = 85° C
5
50
µA
VR = 50 V bias, VRMS = 1 V, F = 1 MHz
VR = 2 V bias, VRMS = 1 V, F = 1 MHz
15
35
C
pF
4/11
LCP1521S/LCP152DEE
Figure 3.
Characteristics
Functional Holding Current (IH) test circuit: GO-NO GO test
R
Surge generator
V
= - 100V
BAT
D.U.T
This is a GO-NO GO test which allows to confirm the holding current (I ) level in a functional test circuit.
H
TEST PROCEDURE:
- Adjust the current level at the I value by short circuiting the D.U.T.
H
- Fire the D.U.T. with a surge current: I = 10A, 10/1000µs
PP
- The D.U.T. will come back to the off-state within a duration of 50ms max.
Figure 4.
Test circuit for VFP and VDGL parameters
R
(VP is defined in unload condition)
L
4
TIP
R
2
RING
R
3
R
V
P
C
C
2
1
1
G ND
Pulse (µs)
Vp
C1
C2
L
R1
R2
R3
R4
IPP
Rs
(V)
(µF)
(nF)
(µH)
(Ω)
(Ω)
(Ω)
(Ω)
(A)
(Ω)
tr
tp
10
1.2
2
700
50
1500
1500
2500
20
1
200
33
0
0
0
50
76
15
13
0
25
25
3
25
25
3
30
30
38
10
10
62
10
10
1.1
1.3
5/11
Technical information
LCP1521S/LCP152DEE
2
Technical information
Figure 5.
LCP152 concept behavior
Rs1
L 1
TIP
V Tip
ID1
IG
T1
Th1
D1
Gate
-Vbat
GND
GND
C
Rs2
VRing
RING
L 2
Figure 5. shows the classical protection circuit using the LCP152 crowbar concept. This
topology has been developed to protect the new high voltage SLICs. It allows to program the
negative firing threshold while the positive clamping value is fixed at GND.
When a negative surge occurs on one wire (L1 for example) a current IG flows through the
base of the transistor T1 and then injects a current in the gate of the thyristor Th1. Th1 fires
and all the surge current flows through the ground. After the surge when the current flowing
through Th1 becomes less negative than the holding current IH, then Th1 switches off.
When a positive surge occurs on one wire (L1 for example) the diode D1 conducts and the
surge current flows through the ground.
Figure 6.
Example of PCB layout based on LCP152S protection
LCP1521S
GND
To
SLIC side
To
line side
Figure 6. shows the classical PCB layout used to optimize line protection.
The capacitor C is used to speed up the crowbar structure firing during the fast surge edges.
This allows to minimize the dynamical breakover voltage at the SLIC Tip and Ring inputs
during fast strikes. Note that this capacitor is generally present around the SLIC - Vbat pin.
So to be efficient it has to be as close as possible from the LCP152 Gate pin and from the
reference ground track (or plan) (see Figure 6.). The optimized value for C is 220 nF.
The series resitors Rs1 and Rs2 designed in Figure 5. represent the fuse resistors or the
PTC which are mandatory to withstand the power contact or the power induction tests
6/11
LCP1521S/LCP152DEE
Technical information
imposed by the various country standards. Taking into account this fact the actual lightning
surge current flowing through the LCP is equal to:
I
= V
/ (R + R )
surge g s
surge
With:
V
= peak surge voltage imposed by the standard.
surge
Rg = series resistor of the surge generator
Rs = series resistor of the line card (e.g. PTC)
e.g. For a line card with 30 Ω of series resistors which has to be qualified under GR1089
Core 1000V 10/1000 µs surge, the actual current through the LCP152 is equal to:
I
= 1000 / (10 + 30) = 25 A
surge
The LCP152 is particularly optimized for the new telecom applications such as the fiber in
the loop, the WLL, the remote central office. In this case, the operating voltages are smaller
than in the classical system. This makes the high voltage SLICs particularly suitable.
The schematics of Figure 7. give the most frequent topology used for these applications.
Figure 7.
Protection of high voltage SLIC
-Vbat
Rs (*)
TIP
Gate
220nF
TIP
GND
GND
GND
RING
Line
SLIC
Rs (*)
RING
LCP152xx
Line card
Rs (*) = PTC or fuse resistor
Figure 8.
Surge peak current versus overload Figure 9.
duration
Relative variation of holding
current versus junction
temperature
I [T ] / I [T =25°C]
I (A)
TSM
H
j
H
j
1.3
1.2
1.1
1
F=50Hz
Tj initial=25°C
24
20
16
12
8
0.9
0.8
0.7
T (°C)
j
4
-40 -30 -20 -10
0
10
20
30
40
50
60
70
80
90
t(s)
0
1.E-02
1.E-01
1.E+00
1.E+01
1.E+02
1.E+03
7/11
Package information
LCP1521S/LCP152DEE
3
Package information
Table 9.
SO-8 Dimensions
Dimensions
Millimeters
Ref.
Inches
Min. Typ. Max. Min. Typ. Max.
A
1.75
0.069
0.010
h x 45°
C
ccc C
(Seating
Plane)
A1
0.1
0.25 0.004
0.049
0.25mm
(Gage Plane)
A2
A
C
A2 1.25
L
A1
e
b
k
L1
b
C
D
E
0.28
0.17
0.48 0.011
0.23 0.007
0.019
0.009
D
4.80 4.90 5.00 0.189 0.193 0.197
5.80 6.00 6.20 0.228 0.236 0.244
8
1
5
4
E1
E
E1 3.80 3.90 4.00 0.150 0.154 0.157
e
h
1.27
0.050
0.25
0.40
0.50 0.010
1.27 0.016
0.020
0.050
L
L1
k°
ccc
1.04
0.041
0
8
0
8
0.10
0.004
Figure 10. Footprint (dimensions in mm)
8/11
LCP1521S/LCP152DEE
Package information
Table 10. QFN 3x3 6 Leads Package dimensions
DIMENSIONS
Millimeters
Typ.
Inches
Typ.
REF.
Min.
Max.
Min.
Max.
A
A1
A2
A3
b
0.80
0
1
0.031
0
0.040
0.002
0.030
0.05
0.65
0.75 0.026
20
3
0.787
0.33
2.90
1.92
2.90
1.11
0.43 0.013
0.017
D
3.10 0.114 0.118 0.122
2.12 0.076 0.083
3.10 0.114 0.118 0.122
D2
E
3
E2
e
1.31 0.044
0.051
0.018
0.005
12°
0.95
0.24
0.037
0.009
L
0.20
0.45 0.008
L1
L2
K
0.13
0.20
0°
0.008
<
12°
0°
Figure 11. QFN 3x3 6 Leads Footprint dimensions (in mm)
0.95
0.48
1.05
1.21
0.35
0.34
2.02
4.00
9/11
Ordering information
LCP1521S/LCP152DEE
4
Ordering information
Part Number
Marking
Package
Weight
Base qty
Delivery mode
LCP1521S
LCP1521SRL(1)
LCP152DEERL(1)
1. Preferred device
CP152S
CP152S
LCP152
100
2500
3000
Tube
SO-8
0.11 g
Tape and reel
Tape and reel
QFN 3x3 6L
0.022 g
5
Revision history
Date
Revision
Description of Changes
Sep-2003
1A
First issue.
1/ Page 2 table 3: Thermal resistances changed from 130° C/W
(SO-8) to 120° C/W and from 170° C/W (QFN) to 140° C/W.
08-Dec-2004
2
2/ SO-8 and QFN footprint dimensions added.
17-Feb-2005
03-May-2005
3
4
Table 9 on page 4: correction of typo on capacitance unit.
Table 5 on page 3: ITSM value @ t= 1s from 4 A to 4.5 A.
Replaced QFN package illustration on page 1. Reformatted
document to current layout standard. Values of ITSM modified in
Table 4. SO-8 package dimensions updated in Table 9.
07-Jul-2006
5
10/11
LCP1521S/LCP152DEE
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