L6932H1.2 [STMICROELECTRONICS]
High performance 2A ULDO linear regulator; 高性能2A ULDO线性稳压器![L6932H1.2](http://pdffile.icpdf.com/pdf1/p00120/img/icpdf/L6932H1-2_657466_icpdf.jpg)
型号: | L6932H1.2 |
厂家: | ![]() |
描述: | High performance 2A ULDO linear regulator |
文件: | 总13页 (文件大小:260K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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L6932H1.2
High performance 2A ULDO linear regulator
Features
■ 2V to 14V input voltage range
■ 200mΩ r
max
DS(on)
HSO-8
■ 200µA quiescent current at any load
■ Excellent load and line regulation
■ Adjustable from 1.2V to 5V
■ 1% voltage regulation accuracy
■ Short circuit protection
Description
The L6932 Ultra Low Drop Output linear regulator
operates from 2V to 14V and is able to support
output current up to 2A. Designed with an internal
50mΩ N-channel Mosfet, it can be used for
onboard DC-DC conversions saving in real
estate, list of components, low noise generation
and power dissipation.
L6932H1.2 is available as adjustable version from
1.2V to 5V with a voltage regulation accuracy of
1%.
■ Thermal shut down
■ HSOP8 package
Applications
■ Motherboards
■ Mobile PC
The upper current limit is fixed at 2.5A to control
the current in short circuit condition within 8%.
The current is sensed in the power mos in order
to limit the power dissipation.
■ Hand-held instruments
■ PCMCIA Cards
■ Processors I/O
■ Chipset and RAM supply
The device is also provided with a thermal shut
down that limits the internal temperature at 150°C
with a histeresys of 20°C. L6932H1.2 provides the
Enable and the Power good functions.
Figure 1. Typical operating circuit
Vin=2V to 14V
Vout=1.2V to 5V
Vin
2
Vout
4
R3
PGOOD
EN
1
5
R1
L6932H1.2
C1
FB
C2
3
6
7
8
NC1 NC2
GND
R2
Table 1. Device summary
Part number
Package
Packaging
L6932H1.2
HSO-8
HSO-8
Tube
L6932H1.2TR
Tape and reel
May 2007
Rev 2
1/13
www.st.com
13
Contents
L6932H1.2
Contents
1
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
2.2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
4
5
6
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typical electrical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Application informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6.1
6.2
6.3
Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Demoboard layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Component part list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7
Components selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.1
7.2
7.3
Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Loop Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
8
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/13
L6932H1.2
Pin settings
1
Pin settings
1.1
Pin connection
Figure 2. Pin connection (top view)
1.2
Pin description
Table 2. Pin description
Name
Pin N°
Description
1
EN
Enables the device when connected to Vin and disables it when forced to GND.
Supply voltage. This pin is connected to the drain of the internal N-mos.
Connect this pin to a capacitor larger than 10µF.
2
3
4
VIN
FB
Connecting this pin to a voltage divider it is possible to program the output
voltage between 1.2V and 5V.
Regulated output voltage. This pin is connected to the source of the internal N-
mos. Connect this pin to a capacitor of 10µF.
VOUT
Power good output. The pin is open drain and detects the output voltage. It is
forced low if the output voltage is lower than 90% of the programmed voltage.
5
6
PGOOD
GND
Ground pin
NC1-
NC2
7, 8
Internally not connected.
3/13
Maximum ratings
L6932H1.2
2
Maximum ratings
2.1
Absolute maximum ratings
Table 3. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VIN
VIN and PGOOD
EN, OUT and ADJ
14.5
V
-0.3 to (Vin +0.3)
V
2.2
Thermal data
Table 4. Thermal data
Symbol
Parameter
Maximum thermal resistance junction-ambient
Maximum junction temperature
Value
Unit
°C/W
°C
34 (1)
150
RthJA
TMAX
TSTG
Storage temperature range
-65 to 150
°C
1. Package mounted on board
3
Block diagram
Figure 3. Internal block diagram
4/13
L6932H1.2
Electrical characteristics
4
Electrical characteristics
Table 5. Electrical characteristcs (T = 25°C, V = 5V unless otherwise specified)
J
IN
Symbol
Parameter
Test condition
Min Typ Max Unit
Operating Supply
Voltage
VIN
2
14
V
VO
IO = 0.1A; VIN = 3.3V
Output voltage
Line Regulation
Load Regulation
1.188 1.2 1.212
V
VIN = 2.5V 10%; IO = 10mA
VIN = 3.3V 10%; IO = 10mA
VIN = 5V 10%; IO = 10mA
5
5
mV
mV
mV
mV
5
VIN = 3.3V; 0.1A < IO < 2A
15
Drain Source ON
resistance
rDS(on)
200
mΩ
IOCC
Iq
Current limiting
2.3
2.5
0.2
2.7
0.4
25
A
Quiescent current
Shutdown current
mA
µA
2V < VIN < 14V (1)
Ish
f = 120Hz, IO = 1A VIN = 5V,
∆VIN = 2Vpp
Ripple Rejection
60
75
dB
Ven
EN Input Threshold
Pgood threshold
Pgood Hysteresis
Pgood saturation
0.5
0.65
90
0.8
0.4
V
Vo rise
%Vo
%Vo
V
10
Ipgood = 1mA
0.2
1. Specification referred to T from -25°C to 125°C.
5/13
Typical electrical performance
L6932H1.2
5
Typical electrical performance
Figure 4. Output voltage vs
junction temperature
Figure 5. Quiescent current vs
junction temperature
Figure 6. Shutdown current vs
junction temperature
6/13
L6932H1.2
Application information
6
Application information
6.1
Application circuit
Figure 7. Demoboard application circuit
Vin=2V to 14V
Vout=1.2V to 5V
Vin
2
Vout
PGOOD
FB
4
R3
EN
5
3
R1
L6932H1.2
1
C1
C2
6
7
8
NC1 NC2
GND
R2
1.2
R2
-------
× (R1 + R2)
VOUT
=
6.2
Demoboard layout
Figure 8. Demoboard layout
7/13
Components selection
L6932H1.2
6.3
Component part list
Table 6. Component par list
Reference
Part number
Description
22Uf, 16V
22Uf, 16V
N.M.
Manufacturer
C1
C2
R1
R2
R3
GRM32ER6C226KE20B
GRM32ER6C226KE20B
MURATA
MURATA
0Ω
100K
7
Components selection
7.1
Input capacitor
The input capacitor value depends on a lot of factors such as load transient requirements,
input source (battery or DC/DC converter) and its distance from the input cap. Usually a
47µF is enough for any application but a much lower value can be sufficient in many cases.
7.2
Output capacitor
The output capacitor choice depends basically on the load transient requirements.
Tantalum, Special Polymer, POSCAP and aluminum capacitors are good and offer very low
ESR values. Multilayer ceramic caps have the lowest ESR and can be required for
particular applications. Nevertheless in several applications they are ok, the loop stability
issue has to be considered (see loop stability section).
Below a list of some suggested capacitor manufacturers
Table 7. Suggested capacitor
Manufacturer
MURATA
Type
Cap Value (µF)
1 to 47
Rated Voltage (V)
4 to 16
CERAMIC
CERAMIC
CERAMIC
CERAMIC
CERAMIC
POSCAP
SP
PANASONIC
TAYO YUDEN
TDK
1 to 47
4 to 16
1 to 47
4 to 16
1 to 47
4 to 16
TOKIN
1 to 47
4 to 16
SANYO
1 to 47
4 to 16
PANASONIC
KEMET
1 to 47
4 to 16
TANTALUM
1 to 47
4 to 16
8/13
L6932H1.2
Components selection
7.3
Loop Stability
The stability of the loop is affected by the zero introduced by the output capacitor. The time
constant of the zero is given by:
T = ESR × COUT
1
FZERP = -----------------------------------------------
2π × ESR × COUT
This zero helps to increase the phase margin of the loop until the time constant is higher
than some hundreds of nsec, depending also on the output voltage and current.
So, using very low ESR ceramic capacitors could produce oscillations at the output, in
particular when regulating high output voltages (adjustable version).
To solve this issue is sufficient to add a small capacitor (e.g. 1nF to 10nF) in parallel to the
high side resistor of the external divider, as shown in Figure 9.
Figure 9. Compensation network
Vin=2V to 14V
Vout=1.2V to 5V
Vin
Vout
PGOOD
FB
2
1
4
C3
R3
EN
5
3
R1
R2
L6932H1.2
C1
C2
6
7
8
NC1 NC2
GND
The thermal resistance junction to ambient of the demoboard is approximately 34°C/W.
This mean that, considering an ambient temperature of 60°C and, a maximum junction
temperature of 150°C, the maximum power that the device can handle is 2.7W.
This means that the device is able to deliver a DC output current of 2A only with a very low
dropout.
9/13
Package mechanical data
L6932H1.2
8
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
10/13
L6932H1.2
Package mechanical data
inch
Table 8. HSO-8 Mechanical data
mm.
Dim.
Min
1.35
0.10
1.10
0.33
0.19
4.80
Typ
Max
1.75
0.25
1.65
0.51
0.25
5.00
Min
Typ
Max
A
A1
A2
B
0.053
0.04
0.069
0.010
0.065
0.020
0.010
0.197
0.043
0.013
0.007
0.189
C
D
D1
E
3.1
0.122
3.80
4.00
0.150
0.157
E1
e
2.4
0.094
0.050
1.27
H
5.80
0.25
0.40
6.20
0.50
1.27
0.228
0.010
0.016
0.244
0.020
0.050
h
L
k
8° (max.)
ddd
0.1
0.04
Figure 10. Package dimensions
11/13
Revision history
L6932H1.2
9
Revision history
Table 9. Revision history
Date
Revision
Changes
23-Jun-2006
07-May-2007
1
2
First release
Final release, mechanical data pad size updated
12/13
L6932H1.2
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