SL74HC365 [SLS]
Hex 3-State Noninverting Buffer with Common Enables; 六角三态同相缓冲与普通启用
| 型号： | SL74HC365 |
| 厂家： | 
SYSTEM LOGIC SEMICONDUCTOR |
| 描述： | Hex 3-State Noninverting Buffer with Common Enables |
| 文件： | 总5页 (文件大小：49K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SL74HC365
Hex 3-State Noninverting Buffer
with Common Enables
High-Performance Silicon-Gate CMOS
The SL74HC365 is identical in pinout to the LS/ALS365. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device is a high-speed hex buffer with 3-state outputs and two
common active-low Output Enables. When either of the enables is high,
the buffer outputs are placed into high-impedance states. The
SL74HC365 has noninverting outputs.
ORDERING INFORMATION
SL74HC365N Plastic
SL74HC365D SOIC
TA = -55° to 125° C for all packages
·
·
·
·
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Output
Y
Enable Enable 2
1
A
L
L
L
L
L
H
X
X
L
H
Z
Z
H
X
X
H
PIN 16 =VCC
PIN 8 = GND
Z = high impedance
X = don’ t care
System Logic
Semiconductor
SLS
SL74HC365
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
VCC
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
-0.5 to +7.0
V
IN
-1.5 to VCC +1.5
V
V
VOUT
IIN
-0.5 to VCC +0.5
±20
±35
±75
mA
mA
mA
mW
IOUT
ICC
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
Tstg
TL
Storage Temperature
-65 to +150
260
°C
°C
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Min
2.0
0
Max
6.0
Unit
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
V , VOUT
IN
VCC
V
TA
-55
+125
°C
ns
tr, tf
Input Rise and Fall Time (Figure 1)
VCC =2.0 V
VCC =4.5 V
VCC =6.0 V
0
0
0
1000
500
400
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V and VOUT should be constrained to the range
IN
GND£(V or VOUT)£VCC.
IN
Unused inputs mu st always be tied to an appropriate logic voltage level (e.g., either GND or V ).
CC
Unused outputs must be left open.
System Logic
SLS
Semiconductor
SL74HC365
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
VCC
V
Guaranteed Limit
Symbol
Parameter
Test Conditions
25 °C
to
£85
°C
£125
°C
Unit
V
-55°C
V
IH
Minimum High-Level
Input Voltage
VOUT= VCC-0.1 V
êIOUTê£ 20 mA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
IL
Maximum Low -Level
Input Voltage
VOUT=0.1 V
êIOUTê £ 20 mA
2.0
4.5
6.0
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V
VOH
Minimum High-Level
Output Voltage
V =V
êIOUTê £ 20 mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
IN
IH
V =V
IN
IH
êIOUTê £ 6.0 mA
êIOUTê £ 7.8 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.7
5.2
VOL
Maximum Low-Level
Output Voltage
V = V
êIOUTê £ 20 mA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
IN
IL
V = V
IN
IL
êIOUTê £ 6.0 mA
êIOUTê £ 7.8 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.4
0.4
IIN
Maximum Input
Leakage Current
V =VCC or GND
6.0
±0.1
±1.0
±1.0
mA
mA
IN
IOZ
Maximum Three-State Output in High-Impedance
6.0
±0.5
±5.0
±10
Leakage Current
State
V = V or V
IH
IN
IL
VOUT=VCC or GND
ICC
Maximum Quiescent
Supply Current
(per Package)
V =VCC or GND
IOUT=0mA
6.0
8.0
80
160
mA
IN
System Logic
Semiconductor
SLS
SL74HC365
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25 °C to £85°C
-55°C
£125°C
Unit
ns
tPLH, tPHL Maximum Propagation Delay, Input A to
Output Y (Figures 1 and 3)
2.0
4.5
6.0
120
24
150
30
180
36
31
20
26
tPLZ, tPHZ Maximum Propagation Delay ,Output Enable to
Output Y (Figures 2 and 4)
2.0
4.5
6.0
220
44
37
275
55
47
330
66
56
ns
ns
ns
tPZL, tPZH Maximum Propagation Delay ,Output Enable to
Output Y (Figures 2 and 4)
2.0
4.5
6.0
220
44
37
275
55
47
330
66
56
tTLH, tTHL Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
CIN
Maximum Input Capacitance
-
-
10
15
10
15
10
15
pF
pF
COUT
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
Power Dissipation Capacitance (Per Buffer)
Typical @25°C,VCC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
40
pF
PD=CPDVCC2f+ICCVCC
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
System Logic
Semiconductor
SLS
SL74HC365
Figure 3. Test Circuit
Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
(1/6 of the Device)
System Logic
Semiconductor
SLS
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