TS3002 [SILICON]

Easy-to-Use Silicon Oscillator/Timer;
TS3002
型号: TS3002
厂家: SILICON    SILICON
描述:

Easy-to-Use Silicon Oscillator/Timer

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中文:  中文翻译
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TS3002  
A 1V/1µA Easy-to-Use Silicon Oscillator/Timer  
FEATURES  
DESCRIPTION  
Ultra Low Supply Current: 1µA at 25kHz  
The TS3002 is the industry’s first and only single-  
supply CMOS oscillator fully specified to operate at  
1V while consuming a 1µA supply current at an  
output frequency of 25kHz. This oscillator is compact,  
easy-to-use, and versatile. Optimized for ultra-long  
life, battery-powered applications, the TS3002 is the  
first oscillator in the “NanoWatt Analog™” high-  
performance analog integrated circuits portfolio. The  
TS3002 can operate from single-supply voltages from  
0.9V to 1.8V.  
Supply Voltage Operation: 0.9V to 1.8V  
Programmable Frequency Range:  
o 5.2kHz FOUT 90kHz (BOOST = GND)  
o 5.2kHz FOUT 290kHz (BOOST = VDD)  
FOUT Period Drift: 0.044%/°C  
PWMOUT Duty Cycle Range: 12% to 90%  
Single Resistor and Capacitor Set Output  
Frequency  
Output Driver Resistance: 160Ω  
Requiring only a resistor and a capacitor to set the  
output frequency, the TS3002 represents a 66%  
reduction in pcb area and a factor-of-10 reduction in  
power consumption over other CMOS-based  
integrated circuit oscillators. When compared against  
industry-standard 555-timer-based products, the  
TS3002 offers up to 93% reduction in pcb area and  
four orders of magnitude lower power consumption.  
APPLICATIONS  
Portable and Battery-Powered Equipment  
Low-Parts-Count Nanopower Oscillator  
Compact Nanopower Replacement for Crystal and  
Ceramic Oscillators  
The TS3002 is fully specified over the -40°C to +85°C  
temperature range and is available in a low-profile, 8-  
pin 2x2mm TDFN package with an exposed back-  
side paddle.  
Nanopower Pulse-width Modulation Control  
Nanopower Pulse-position Modulation Control  
Nanopower Clock Generation  
Nanopower Sequential Timing  
TYPICAL APPLICATION CIRCUIT  
Table 1: FOUT vs RSET, CSET = 7.9pF  
RSET (M) FOUT (kHz)  
1
106  
43  
25  
16  
11  
2.49  
4.32  
6.81  
9.76  
Table 2: FOUT vs CSET, RSET = 4.32MΩ  
CSET (pF) FOUT (kHz)  
5
39  
25  
19  
13  
10  
7.9  
10  
15  
20  
Page 1  
© 2014 Silicon Laboratories, Inc. All rights reserved.  
TS3002  
ABSOLUTE MAXIMUM RATINGS  
VDD to GND....................................................................-0.3V to +2V  
Continuous Power Dissipation (TA = +70°C)  
V
CNTRL to GND ...............................................................-0.3V to +2V  
8-Pin TDFN (Derate at 23.8mW/°C above +70°C)....... 1951mW  
Operating Temperature Range................................. -40°C to +85°C  
Storage Temperature Range.................................. -65°C to +150°C  
Lead Temperature (Soldering, 10s)...................................... +300°C  
RSET to GND................................................................-0.3V to +2V  
CSET to GND................................................................-0.3V to +2V  
FOUT, PWMOUT to GND.............................................-0.3V to +2V  
Short Circuit Duration FOUT, PWMOUT to GND or VDD  
..................................................................................Continuous  
Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These  
are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections  
of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and  
lifetime.  
PACKAGE/ORDERING INFORMATION  
PART  
MARKING  
ORDER NUMBER  
TS3002ITD822  
TS3002ITD822T  
CARRIER QUANTITY  
Tape  
-----  
& Reel  
AAH  
Tape  
3000  
& Reel  
Lead-free Program: Silicon Labs supplies only lead-free packaging.  
Consult Silicon Labs for products specified with wider operating temperature ranges.  
Page 2  
TS3002 Rev. 1.0  
TS3002  
ELECTRICAL CHARACTERISTICS  
VDD = 1V, VCNTRL = VDD, VBOOST = 0V, RSET = 4.32M, CSET = 7.9pF, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 0pF, CLOAD(PWM) = 0pF unless  
otherwise noted. Values are at TA = 25°C unless otherwise noted. See Note 1.  
PARAMETER  
Supply Voltage  
SYMBOL  
CONDITIONS  
MIN  
0.9  
TYP  
1
1
MAX  
1.8  
1.5  
2.8  
3.7  
5.4  
3.2  
4.8  
5.3  
7.3  
UNITS  
V
VDD  
-40°C TA 85°C  
-40°C TA 85°C  
-40°C TA 85°C  
-40°C TA 85°C  
2.1  
2.16  
3.6  
VCNTRL = 0.15 x VDD  
Supply Current  
FOUT Period  
IDD  
µA  
µs  
VBOOST = VDD  
VBOOST = VDD, VCNTRL = 0.15 x VDD  
37  
34.7  
36  
40.6  
39.5  
44  
45.6  
43  
-40°C TA 85°C  
-40°C TA 85°C  
tFOUT  
VBOOST = VDD  
33  
48  
1.3  
FOUT Period Line  
Regulation  
tFOUT/V  
1V VDD 1.8V  
%/V  
VBOOST = VDD  
-1.6  
0.044  
0.086  
8.9  
49.3  
90.5  
8.5  
FOUT Period  
Temperature Coefficient  
tFOUT/T  
%/°C  
VBOOST = VDD  
VCNTRL = 0.03 x VDD  
VCNTRL = 0.15 x VDD  
VCNTRL = 0.27 x VDD  
VCNTRL = 0.03 x VDD  
VCNTRL = 0.15 x VDD  
VCNTRL = 0.27 x VDD  
4.5  
44  
83  
4.5  
47  
86  
13  
54  
97  
12.5  
54  
96  
PWMOUT Duty Cycle  
DC(PWMOUT)  
%
VBOOST = VDD  
50.4  
91.2  
FOUT, PWMOUT  
Rise Time  
FOUT, PWMOUT  
Fall Time  
tRISE  
tFALL  
See Note 2, CL = 15pF  
8.6  
ns  
ns  
See Note 2, CL = 15pF  
See Note 3  
7.9  
FOUT Jitter  
0.08  
%
V
RSET Pin Voltage  
V(RSET)  
ICNTRL  
0.3  
25  
45  
80  
CNTRL Output Current  
PWMOUT Enable  
nA  
-40°C TA 85°C  
VPWM_EN  
(VDD - VCNTRL ), 0.9V < VDD < 1.8V  
375  
mV  
PWMOUT Disable  
BOOST Enable  
BOOST Disable  
VPWM_DIS  
VIH  
VIL  
(VDD - VCNTRL ), 0.9V < VDD < 1.8V  
(VDD – VBOOST ), 0.9V < VDD < 1.8V  
0.9V < VDD < 1.8V  
131  
77  
77  
mV  
mV  
mV  
BOOST Input Current  
IBOOST  
10  
nA  
High Level Output  
Voltage, FOUT and  
PWMOUT  
Low-level Output  
Voltage, FOUT and  
PWMOUT  
V
DD - VOH  
IOH = 1mA  
IOL = 1mA  
160  
mV  
VOL  
140  
mV  
Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified.  
Note 2: Output rise and fall times are measured between the 10% and 90% of the VDD power-supply voltage levels. The specification is based  
on lab bench characterization and is not tested in production.  
Note 3: Timing jitter is the ratio of the peak-to-peak variation of the period to the mean of the period. The specification is based on lab bench  
characterization and is not tested in production.  
TS3002 Rev. 1.0  
Page 3  
TS3002  
TYPICAL PERFORMANCE CHARACTERISTICS  
VDD = 1V, VCNTRL = VDD, VBOOST = 0V, RSET = 4.32M, CSET = 7.9pF, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 5pF, unless otherwise noted.  
Values are at TA = 25°C unless otherwise noted.  
Supply Current vs FOUT Period  
Supply Current vs FOUT Period  
2.5  
2
8.5  
7.1  
5.7  
4.3  
BOOST = GND  
BOOST = VDD  
1.5  
1
2.9  
1.5  
0.5  
0
40  
80  
120  
160  
200  
0
40  
80  
120  
160  
200  
PERIOD - µs  
PERIOD - µs  
Supply Current vs CLOAD(FOUT)  
Supply Current vs CLOAD(FOUT)  
2
3.2  
3
BOOST = GND  
BOOST = VDD  
1.8  
1.6  
2.8  
2.6  
2.4  
1.4  
1.2  
1
2.2  
2
0.8  
0
10  
20  
30  
40  
0
10  
20  
30  
40  
CLOAD- pF  
CLOAD- pF  
Supply Current vs Temperature  
Supply Current vs Temperature  
1.5  
3.2  
BOOST = GND  
BOOST = VDD  
1.36  
2.88  
1.22  
1.08  
0.94  
0.8  
2.56  
2.24  
1.92  
1.6  
-40  
-15  
10  
35  
60  
85  
-40  
-15  
10  
35  
60  
85  
TEMPERATURE - ºC  
TEMPERATURE - ºC  
Page 4  
TS3002 Rev. 1.0  
TS3002  
TYPICAL PERFORMANCE CHARACTERISTICS  
VDD = 1V, VCNTRL = VDD, VBOOST = 0V, RSET = 4.32M, CSET = 7.9pF, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 5pF, unless otherwise noted.  
Values are at TA = 25°C unless otherwise noted.  
FOUT Period vs Temperature  
FOUT Period vs Temperature  
41.5  
41  
43  
42.5  
42  
BOOST = GND  
BOOST = VDD  
40.5  
41.5  
40  
39.5  
39  
41  
40.5  
40  
38.5  
38  
39.5  
-40  
-15  
10  
35  
60  
85  
-40  
-15  
10  
35  
60  
85  
TEMPERATURE - ºC  
TEMPERATURE - ºC  
FOUT Period vs Supply Voltage  
FOUT Period vs Supply Voltage  
41.2  
41  
40  
BOOST = GND  
BOOST = VDD  
39.8  
39.6  
39.4  
39.2  
39  
40.8  
40.6  
40.4  
38.8  
0.9 1.05 1.2 1.35 1.5 1.65 1.8  
SUPPLY VOLTAGE - Volt  
0.9 1.05 1.2 1.35 1.5 1.65 1.8  
SUPPLY VOLTAGE - Volt  
Period vs RSET  
Period vs RSET  
200  
160  
200  
160  
BOOST = GND  
BOOST = VDD  
120  
80  
120  
80  
40  
40  
0
0
0
4
8
12  
16  
20  
0
4
8
12  
16  
20  
RSET - Mꢀ  
RSET - Mꢀ  
TS3002 Rev. 1.0  
Page 5  
TS3002  
TYPICAL PERFORMANCE CHARACTERISTICS  
VDD = 1V, VCNTRL = VDD, VBOOST = 0V, RSET = 4.32M, CSET = 7.9pF, RLOAD(FOUT) = Open Circuit, CLOAD(FOUT) = 5pF, unless otherwise noted.  
Values are at TA = 25°C unless otherwise noted.  
Period vs CSET  
BOOST = GND  
Period vs CSET  
100  
80  
100  
80  
BOOST = VDD  
60  
60  
40  
20  
40  
20  
0
4
8
12  
16  
20  
0
4
8
12  
CSET - pF  
Supply Current Distribution  
16  
20  
CSET - pF  
Start-up Time vs Supply Voltage  
1.8  
1.66  
1.52  
1.38  
1.24  
1.1  
35%  
30%  
25%  
20%  
15%  
10%  
5%  
0%  
0.9  
1.2  
1.5  
1.8  
0.97  
0.99  
1.01  
1.03  
SUPPLY VOLTAGE - Volt  
SUPPLY CURRENT - µA  
Page 6  
TS3002 Rev. 1.0  
TS3002  
FOUT Transient Response  
FOUT Transient Response  
VDD = 1V, BOOST = VDD, CLOAD = 47pF  
VDD = 1.5V, BOOST = VDD, CLOAD = 47pF  
5µs/DIV  
5µs/DIV  
FOUT and PWMOUT Transient Response  
VDD = 1V, VCNTRL = 0.035 x VDD, BOOST = VDD, CLOAD = 22pF  
5µs/DIV  
TS3002 Rev. 1.0  
Page 7  
TS3002  
PIN FUNCTIONS  
PIN  
NAME  
FUNCTION  
Fixed Frequency Output. A push-pull output stage with an output  
resistance of 160, the FOUT pin swings from GND to VDD. For  
lowest power operation, capacitive loads should be minimized  
and resistive loads should be maximized.  
1
FOUT  
BOOST Input. A digital switch input, BOOST controls the  
propagation delay of the primary timing comparator in the  
TS3002’s master oscillator subcircuit. Connecting the BOOST pin  
to GND sets the maximum programmable oscillator frequency to  
~90kHz.Connecting the BOOST pin to VDD reduces the  
comparator’s propagation delay and increases the maximum  
programmable master oscillator’s frequency to 290kHz.  
Pulse-width Modulated Output. A push-pull output stage with an  
output resistance of 160, the PWMOUT pin is wired anti-phase  
2
3
4
BOOST  
PWMOUT with respect to FOUT and swings from GND to VDD. For lowest  
power operation, capacitive loads should be minimized and  
resistive loads should be maximized.  
PWMOUT Enable and Duty Cycle Control Input. An analog input  
pin, the VCNTRL pin voltage enables the TS3002’s PWM engine  
and controls the duty cycle at PWMOUT from 12%  
(VCNTRL = 0.03 x VDD) to 90% (VCNTRL = 0.27 x VDD). Enabling the  
PWM engine increases the TS3002’s nominal operating supply  
current. To disable the TS3002’s PWM engine, CNTRL shall be  
connected to VDD.  
CNTRL  
FOUT Programming Capacitor Input. A 7.9pF capacitor  
connected from this pin to GND in junction with a 4.32Mresistor  
at the RSET pin sets the TS3002’s internal oscillator’s output  
period to ~40µs (25kHz). The maximum capacitance value is  
22pF.  
Ground – Connect this pin to the system’s analog ground plane.  
FOUT Programming Resistor Input. A 4.32Mresistor connected  
from this pin to GND sets the TS3002’s internal oscillator’s output  
period to 40μs (25kHz). For optimal performance, the  
composition of the RSET resistor shall be consistent with  
tolerances of 1% or lower. The RSET pin voltage is 0.3V at a 1V  
supply.  
5
6
CSET  
GND  
7
RSET  
Power Supply Voltage Input. While the TS3002 is fully specified  
at 1V, the supply voltage range is 0.9V VDD 1.8V. It is always  
considered good engineering practice to bypass the VDD pin with  
a 0.1μF ceramic decoupling capacitor in close proximity to the  
TS3002.  
8
VDD  
-----  
EP  
Exposed paddle is electrically connected to GND.  
Page 8  
TS3002 Rev. 1.0  
TS3002  
BLOCK DIAGRAM  
where the scalar k is approximately 1.19. With an  
RSET = 4.32Mand a CSET = 7.9pF, the output  
frequency is approximately 25kHz with a 50% duty  
cycle. As design aids, Tables 1 lists TS3002’s typical  
FOUT for various standard values for RSET with  
CSET = 7.9pF and Table 2 lists typical FOUT for  
various standard values for CSET with RSET = 4.32M.  
THEORY OF OPERATION  
The TS3002 is a user-programmable oscillator where  
the period of the square wave at its FOUT terminal is  
generated by an external resistor and capacitor pair.  
The output frequency is given by:  
1
1E6  
The TS3002 also provides a separate PWM output  
Table 2: FOUT vs CSET, RSET = 4.32MΩ  
CSET (pF) FOUT (kHz)  
FOUT (kHz) =  
ꢀꢁ  
tFOUT (µs) k RSET Mx CSET(pF)  
Table 1: FOUT vs RSET, CSET = 7.9pF  
RSET (M) FOUT (kHz)  
1
106  
43  
25  
16  
11  
5
39  
25  
19  
13  
10  
2.49  
4.32  
6.81  
9.76  
7.9  
10  
15  
20  
TS3002 Rev. 1.0  
Page 9  
TS3002  
signal at its PWMOUT terminal that is anti-phase with  
respect to FOUT. In addition, applying a voltage at  
the CNTRL both enables the TS3002’s internal PWM  
engine as well as adjusting the duty cycle from 12%  
to 90%. A dc control voltage equal to 0.03 x VDD  
applied to the CNTRL pin enables the PWM engine  
to set the duty cycle to 12%. A dc control voltage  
equal to 0.27 x VDD increases the duty cycle to 90%  
and connecting CNTRL to VDD disables the PWM  
engine altogether. Configured for nominal operation  
(PWM engine OFF, BOOST pin to GND), the supply  
current of the TS3002 is 1µA; enabling the PWM  
engine increases the TS3002 operating supply  
current as shown in the electrical specification table.  
The BOOST pin controls the propagation delay of the  
TS3002’s internal comparators. When BOOST is  
connected to GND, the TS3002’s maximum  
programmable operating frequency is ~90kHz.  
Connecting the BOOST pin to VDD reduces the  
propagation delay of the internal oscillators, thereby  
extending the high end maximum operating  
frequency to 290kHz.  
1
APPLICATIONS INFORMATION  
CEXT=ꢁ  
1
1  
-ꢁ  
CLOAD(EFF) CPROBE  
Minimizing Power Consumption  
For example, if the instrument’s input probe  
capacitance is 15pF and the desired effective load  
capacitance at either or both FOUT and PWMOUT  
terminals is to be 5pF, then the value of CEXT should  
be 7.5pF.  
To keep the TS3002’s power consumption low,  
resistive loads at the FOUT and PWMOUT terminals  
increase dc power consumption and therefore should  
be as large as possible. Capacitive loads at the  
FOUT and PWMOUT terminals increase the  
TS3002’s transient power consumption and, as well,  
should be as small as possible.  
TS3002 Start-up Time  
As the TS3002 is powered up, its FOUT terminal  
(and PWMOUT terminal, if enabled) is active once  
the applied VDD is higher than 0.9 volt. Once the  
applied VDD is higher than 0.9 volt, the master  
oscillator achieves steady-state operation within  
1.2ms.  
One challenge to minimizing the TS3002’s transient  
power consumption is the probe capacitance of  
oscilloscopes and frequency counter instruments.  
Most instruments exhibit an input capacitance of  
15pF or more. Unless buffered, the increase in  
transient load current can be as much as 400nA.  
Current- and Voltage-Controlled Oscillators  
To minimize capacitive loading, the technique shown  
in Figure 1 can be used. In this circuit, the principle of  
series-connected capacitors can be used to reduce  
the effective capacitive load at the TS3002’s FOUT  
and PWMOUT terminals.  
The TS3002 can be configured into  
Current-Controlled Oscillator as shown in Figure 2.  
a
Figure 2: Configuring the TS3002 into a  
Figure 1: Using an External Capacitor in Series with  
Current-Controlled Oscillator.  
Probes Reduces Effective Capacitive Load.  
With a current source sourcing a current of 223nA to  
262nA, FOUT can generate an output signal with a  
frequency range of 5.2kHz to 90kHz. In a similar  
manner, a Voltage-Controlled Oscillator can be  
configured as shown in Figure 3. In this case, a  
voltage source sourcing a voltage of 290mV to  
To determine the optimal value for CEXT once the  
probe capacitance is known by simply solving for  
CEXT using the following expression:  
Page 10  
TS3002 Rev. 1.0  
TS3002  
341mV can generate an FOUT output signal  
frequency range of 5.2kHz to 90kHz as well. It is  
recommended to use resistor values with a 1%  
tolerance.  
Using Standard Resistors to Increase FOUT  
Resolution  
The TS3002 can be configured to provide a 0.1%  
resolution on the output frequency as shown in  
Figure 5. To do so, R1 can be set to approximately  
10% of the value selected for R2. In addition, R2 and  
R1 should be chosen with a 0.1% and 1% tolerance,  
respectively. Since R2 is 90% of the total resistance,  
it has the largest impact on the resolution of the  
output frequency. With R1 = 91kand R2 = 910k,  
the output frequency is 90kHz and with R1 = 400kꢀ  
and R2 = 4M, the output frequency is 23kHz.  
Figure 3: Configuring the TS3002 into a Voltage-  
Controlled Oscillator.  
Using a Potentiometer to Trim the TS3002’s  
Output Frequency  
By using a fixed resistor and a potentiometer, the  
output frequency of the TS3002 can be trimmed as  
shown in Figure 4. By selecting a fixed resistor R1  
with a tolerance of 0.1% and a potentiometer P1 with  
a 5% tolerance, the output frequency can be trimmed  
to provide a ±2% trimming range. As shown in Figure  
5, R1+P1 and C2 set the output frequency to  
25.052kHz when P1 = 0and with P1 =200k, the  
resulting output frequency is 24.024kHz.  
Figure 5: Setting the TS3002’s Output  
Frequency to 0.1% Resolution using  
Standard Resistors.  
Figure 4: Using a Fixed Resistor and a  
Potentiometer to Trim the TS3002’s  
Output Frequency.  
TS3002 Rev. 1.0  
Page 11  
TS3002  
PACKAGE OUTLINE DRAWING  
8-Pin TDFN22 Package Outline Drawing  
(N.B., Drawing not to scale; all dimensions in mm; JEDEC MO-229 compliant)  
BOTTOM VIEW  
SIDE VIEW  
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Page 12  
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TS3002 Rev. 1.0  
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Silicon Laboratories Inc., Silicon Laboratories, Silicon Labs, SiLabs and the Silicon Labs logo, CMEMS®, EFM, EFM32, EFR, Energy Micro, Energy Micro logo and combinations  
thereof, "the world’s most energy friendly microcontrollers", Ember®, EZLink®, EZMac®, EZRadio®, EZRadioPRO®, DSPLL®, ISOmodem ®, Precision32®, ProSLIC®, SiPHY®,  
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