S1T8528X01-Q0R0 [SAMSUNG]
ENHANCED-1 CHIP CT0 RF IC; 增强- 1芯片CT0射频IC型号: | S1T8528X01-Q0R0 |
厂家: | SAMSUNG |
描述: | ENHANCED-1 CHIP CT0 RF IC |
文件: | 总35页 (文件大小:1904K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ENHANCED-1 CHIP CT0 RF IC
INTRODUCTION
S1T8528
48- QFP- 1010E
S1T8528 is a 1 CHIP RF IC which can be used in high performance
CTO CLP systems at max. 60MHz. S1T8528 is designed to include a
receiver, PLL and COMPANDER to minimize PCB space
requirements. Improved RX characteristics such as inter-modulation,
spurious response and adjacent channel interface have been
included to satisfy the universal standards.
The 1 CHIP RF IC has considerably reduced the cost by including a
build-in 1’st mixer, low battery detector, fMCU, RSSI, RF regulator
and speaker amp. Also, it fulfills carrier detector threshold control,
speaker volume control, operating mode selection and MUTE function
using S/W, thus making external application easier.
FEATURES
•
•
•
•
•
•
•
Operating voltage range: 2.0V ~ 5.5V
Typical supply current: 8.9mA at 3.6V
Built-in low battery detection function ( selectable 3.45V, 3.3V, 3.0V, 2.2V, 2.1V )
Built-in speaker volume control and speaker amplifier
Built-in splatter filter
Support mode selection ( Active, Rx, Standby and Inactive mode )
FM Receiver
— Excellent Receiver characteristics
< 10.7MHz crystal filter used >
Adjacent channel
rejection
Spurious rejection
(image of the second IF)
Intermodulation
rejection
Input sensitivity
0.7
m
Vrms at 12dB
SINAD
> 55dB
> 60dB
> 50dB
— RSSI ( Linear ) and Carrier detector output ( Digital ) function
Compander
•
•
— Easy gain control and application using external component
— -Included ALC (Automatic Level Control) circuit
Universal PLL
— RX (TX) divided counter range : 1/16 ~ 1/16383
— Reference frequency divided counter range : 1/16 ~ 1/4095
— Lock detector signal output
— Serial interface with MICOM for controlling each block
— Clock Output for MICOM oscillator substitution. ( X-tal divided clock by 2, 3, 4 and 5 )
ORDERING INFORMATION
Device
Package
48- QFP- 1010E
Operating Temperature
+ S1T8528X01-Q0R0
+ : New product
- 20C to + 70C
1
S1T8528
ENHANCED-1 CHIP CT0 RF IC
BLOCK DIAGRAM
36
32
31
29
28
27
35
34 33
30
26
25
FSK
COMP
Limiting
IF AMP
X-tal
OSC
IF AMP
(455KHz)
2LOI
37
Regulator
(Vcc/2)
AMP
VREF
(COMP)
24
PRE AMP VREF
Quadrature
Detector
2nd
MIX
23 ALC
+
-
22
1MO
1LOI
1LOI
EPI
38
39
40
RSSI
RX
VCO
21
Rectifier
ERC
SUM
AMP
Carrier
Detector
EO
20
Gain Cell
Internal
cap.
VCO
RX
41
IF AMP
(10.7MHz)
Low
Battery
Detector
SAI
19
18
17
Volume control
SAO1
SAO2
42
43
1MI
1MI
VCC(RX)
1st
SPK
AMP2
SPK
AMP1
MIX
VCC
(COMP)
-
+
16
15
SUM
AMP
Limiter
GND
(PLL)
44
45
46
47
48
PLL Regulator
( 2.05 V )
Buffer
GND
(COMP)
MIC
AMP
VREF
PDR
Gain Cell
Programmable Counter ( RX )
Programmable Counter ( TX )
Programmable Counter ( REF )
4_25 CNT
VREF
(RF)
ALC
CPI
14
13
VREF
(PLL)
CPO
Rectifier
TIF
Splatter
Filter
RX Phase
Detector
TX Phase
Detector
Compander
mute
CONTROL
fMCU
6
1
2
3
4
5
7
8
9
10
11
12
2
ENHANCED-1 CHIP CT0 RF IC
PIN CONFIGURATION
S1T8528
35
32 31
29 28
27 26
25
36
34 33
30
37
38
39
40
41
42
43
44
24
23
VREF(COMP)
ALC
2LOI
1MO
1LOI
22 EPI
21
20
19
ERC
EO
1LOI
VCORX
1MI
SAI
S1T8528
1MI
18 SAO1
GND(PLL)
PDR
SAO2
17
45
46
16
15
VCC(COMP)
VREF(RF)
GND(COMP)
CPI
47
14
13
VREF(PLL)
CPO
TIF 48
4
3
5
6
9
2
8
10
12
1
7
11
3
S1T8528
ENHANCED-1 CHIP CT0 RF IC
PIN DESCRIPTION
Pin No
Symbol
PDT
Description
Phase detector output terminal of the transmitter at PLL.
1
If f > f
or f
is leading ® the output is negative pulse
TX
REF
REF
REF
TX
If f < f
or f
is lagging ® the output is positive pulse
TX
TX
If f = f
and the same phase ® the output is High Impedance
TX
2
CO
Compressor output terminal of compander: connected to the splatter filter amp input
terminal.
3
4
5
SFI
Input terminal of Splatter filter amp.
Output terminal of Splatter filter amp.
SFO
LDT/CDO
LDT: Output terminal of transmitter lock detector in PLL block. Output is low if PLL is in
lock state and is high if PLL is in unlock state.
CDO: As an output terminal of the carrier detector buffer, connected to (RSSI ) terminal
of MICOM. This pin outputs the contents of Meter Driver buffer which is turned
on/off, according to the signal level detected by Meter Driver.
6
f
Clock output terminal for MCU crystal.
MCU
This pin provides the clock source for MCU or other system as an output of
X-tal osc. ¸ 2/ ¸ 3/ ¸ 4/ ¸ 5. Which can be controlled by the bit of the control register.
Clock ON/OFF control is possible by MCU
7
8
9
CLK
DATA
EN
These pins are serial interface terminals for programming reference counter, auxiliary
reference counter, TX channel counter, RX channel counter and control block that
controls internal each block with 4 mode selection.
10
LBD
Low Battery Detecting output. ( Selectable 3.45V, 3.3V, 3.0V, 2.2V, 2.0V ).
During the normal operation, output level is low, but it is high at low battery detection.
As this pin is an open collector type, it requires a pull-up resister.
11
AGIC
This pin bypasses AC elements at the feedback loop which come from the SUM amp
block of COMPRESSOR. A capacitor should be connected between this terminal and
GND. ( C = 2.2uF )
12
13
CRC
CPO-
CPI
Converts waveform from the full wave rectifier to DC element at the rectifier block of
Compressor. ( RC = 33 msec at C = 3.3uF)
Pre-amp output terminal of Compressor.
Used as an input terminal for voice signals.
14
15
Inverting type Pre-amp input terminal of Compressor.
GND
)
Ground.
(COMP
Ground of Compander.
16
17
Vcc
Supply voltage.
Power supply terminal of Compander.
(COMP)
SAO 2
Output terminal of speaker amp 2.
This signal is the same as SAO1 output, but phase difference is 180° for SAO1 DC
voltage level is Vcc / 2.
4
ENHANCED-1 CHIP CT0 RF IC
S1T8528
PIN DESCRIPTION (Continued)
Pin No
Symbol
SAO 1
Description
18
Output terminal of Speaker amp 1.
DC voltage level is Vcc/ 2.
19
SAI
Speaker Amp 1 input terminal.
Between this terminal and Expander output terminal, apply DC coupled capacitor.
20
21
EO
Output terminal of Expander
ERC
Converts waveform from the full wave rectifier to DC element at the rectifier block of
Expander. ( RC = 33 msec at C = 3.3uF )
22
23
EPI
Pre-amp inverting input terminal of Expander.
Adjusts the negative feedback loop gain. ( in application, gain is 5 )
ALC
Reference current input terminal of Automatic Level Control ( ALC); Adjusts THD of
compressor output voltage to less than 3% or limits the frequency deviation of TX if the
input is higher than a certain level. The ALC circuit may be turned off depending on the
ALC reference current or the magnitude of output voltage may be limited if it is higher
than a certain level.
24
V
Reference voltage ( VREF= 1/2 VCC ). Supplies a regulator voltage to the Compressor
and Expander of COMPANDER.
REF(COMP)
25
26
RSSI
Received Signal Strength Indicator terminal ( Analog type )
DSCO
Output terminal of Data Slicing comparator.
Separates Frequency Shift Keying ( FSK ) serial data and executes data shaping and
limiting.
27
28
29
DSCI
RAO
QCI
Input terminal of Data slicing comparator.
Non-inverting type with the negative input terminal biased to 1/2 Vcc.
Recovered Audio Output terminal. Voice signals detected by the Quadrature Detector
are amplified and then output through this terminal.
Quadrature coil input terminal.
The 455kHz oscillator circuit is an Lp = 680uH, Cp = 180pF valued LC tank circuit.
Voice signals are detected by mixture of 455kHz ( by phase difference ) which is
converted from mixer 2.
30
GND
Ground .
RX
Ground for Receiver.
31
32
LD
LI
Limiter input and decoupling terminal.
Limiter block removes amplitude modulation elements caused by fading or FM signal
noise. Limiting IF stage makes the second intermediate frequency amplify and limit.
The input impedance of the limiting IF amplifier is set to 1.5kW.
While FM waves are transmitted with constant magnitude, their magnitudes are slightly
modulated due to reflection from obstacles, fading phenomenon, noise wave and
mixing with AM wave elements before entering the receiver’s antenna.
The limiter makes amplitude uniform by removing these AM wave elements.
33
V
Supply voltage.
CC(RX)
Supplies power to the Receiver.
5
S1T8528
ENHANCED-1 CHIP CT0 RF IC
PIN DESCRIPTION (Continued)
Pin No
Symbol
2MI
Description
34
Input terminal of mixer 2. Output from mixer 1 is entered to mixer 2 input terminal via
10.7MHz ceramic filter. Second mixer converts frequency to second intermediate
frequency ( 455kHz: AM IF ).
35
2MO
Output terminal of Mixer 2. Second intermediate frequency ( 455kHz ), generated by
mixing first intermediate frequency ( 10.7MHz ) and Second Local Oscillator is output.
36
37
2LOI
2LOI
Input terminal of second local oscillator. These pins generate 2’nd local oscillation
frequency and are designed as colpitt type oscillator.
10.24MHz or 10.245MHz can be applied as for 2’nd local oscillator.
38
1MO
Output terminal of mixer 1.
The signal from mixer 1 and the frequency of the first local oscillator are mixed to
produce the first intermediate frequency, which is the output through this terminal. The
output terminal is an emitter follower with an output impedance of 330W to match the
330W input / output impedance of the 10.7MHz ceramic filter.
39
40
1LOI
1LOI
Input terminal of the first local oscillator.
The local oscillator is a voltage controlled oscillator. Local oscillation frequency and
received frequency are mixed at mixer 1 and then converted to the first intermediate
frequency of 10.7MHz or 10.695MHz.
41
VCO
The terminal which variable capacitor is included in the chip. Used as an input terminal
where 1st local oscillation frequency is changed by varying the capacitor connected
between 1st local oscillator terminals.
RX
The internal variable capacitor has the value of 18.73 ~ 15.86 pF depending on the
applied voltage. ( 1.0 ~ 2.0V )
42
43
1MI
1MI
Input terminal of Mixer1. This mixer is made of doubly balanced multiplier.
The received signal amplified at RF AMP is input to this terminal.
44
GND
Ground.
(PLL)
Ground for analog at PLL.
45
PDR
Phase detector output terminal of the receiver at PLL.
If f > f
or f is Leading ® The output is negative pulse
RX
REF
REF
REF
RX
If f < f
or f is Lagging ® The output is positive pulse
RX
RX
If f = f
and the same phase ® The output is high impedance
RX
46
47
V
V
An internal PMOS pass transistor provides power supplier for the RF pre amplifier.
PMOS pass transistor is on in Active/Rx mode and off in Standby/Inactive mode.
REF(RF)
PLL voltage reference output pin.
REF(PLL)
An internal voltage regulator provides a stable power supply voltage for the RX and TX
PLLs. (2.05V)
48
TIF
Input terminal of TX channel counter.
AC coupling with TX VCO.
Minimum input level is 300 mVp-p ( at 60MHz ).
6
ENHANCED-1 CHIP CT0 RF IC
S1T8528
ABSOLUTE MAXIMUM RATINGS
Characteristic
Maximum Supply Voltage
Power Dissipation
Symbol
Value
5.5
Unit
Vcc
V
P
600
mW
D
Operating Temperature
Storage Temperature
T
T
- 20 — + 70
- 55 — + 150
°C
°C
OPR
SCG
CURRENT CONSUMPTION AT EACH MODE ( VCC = 3.6V )
Modes
Active mode (Communication mode )
RX mode
Min.
Typ.
8.9mA
4.8mA
700uA
50uA
Max.
-
-
-
-
-
-
-
Stand-by mode
Inactive mode (Battery Saving Mode)
70uA
CURRENT CONSUMPTION IN EACH BLOCK ( VCC = 3.6V )
Modes
Min.
Typ.
Max.
Receiver part
Expander part
Speaker part
-
-
-
-
-
-
-
3.5mA
0.8mA
1.0mA
1.7mA
1.2mA
0.7mA
8.9mA
4.6mA
1.1mA
1.4mA
2.1mA
1.6mA
1.1mA
11.9mA
compressor part
PLL
RX part
TX part
Total
7
S1T8528
ENHANCED-1 CHIP CT0 RF IC
ELECTRICAL CHARACTERISTICS
Characteristic
Operating Voltage
RECEIVER
Symbol
Vcc
Test Conditions
Min.
Typ.
Max.
Unit
-
2.0
-
5.5
V
( V = 3.6V, f = 49.7MHz, f
= ± 3kHz, f
= 1kHz,Ta = 25°C, unless otherwise specified )
MOD
CC
C
DEV
Sensitivity
(input for 12dB SINAD)
V
MIX1 Matched Impedance
Input
-
0.7
2.0
2.0
mVrms
mVrms
SEN
Input for -3dB Limiting
V
MIX1 Matched Impedance
Input
-
0.7
LIM
S/N Ratio
S/N
RFin = 1mVrms
48
55
-
dB
Recovered Audio Output
V
RFin = 1mVrms,
147
177
207
mVrms
O(RA)
After 2nd stage LPF
Recovered Audio Output
Voltage Drop
V
)
Vcc = 5.5V ® 2.0V
RFin = 1mVrms
- 3.0
- 1.5
-
dB
O(RAD
Detector Output Resistance
Detect Output Voltage
R
RFin = 1mVrms
RFin = 1mVrms
-
1.0
-
1.2
1.5
1.0
-
KW
V
O(DET)
V
2.0
2.5
O(DET)
Detector Output Distortion
THD
RFin = 1mVrms
%
DET
(with CCITT Filter)
Comparator Threshold
Voltage Difference
DV
V
= 360mVp-p
COMP
70
110
-
150
-
mV
V
TH
R
= 180KW
HYS
Comparator Output Voltage 1
V
V
V
=360mVp-p
Vcc-0.4
OH
COMP
R
= 180kW
HYS
Comparator Output Voltage 2
V
= 360mVp-p
-
0.1
15
22
0.4
18
26
V
OL
COMP
R
= 180kW
HYS
First Mixer Conversion
Voltage Gain
DG
DG
V
= 1mVrms
12
18
dB
dB
V(1M)
V(2M)
MIX1 1/2
R = 330kW
L
Second Mixer Conversion
Voltage Gain
V
= 1mVrms
MIX2
R = 1.5kW
L
Demodulator Bandwidth
Limiter Input Sensitivity
DBW
RFin = 1mVrms
-
-
10
20
-
kHz
V
Fc = 455kHz , - 3dB Limiting
40
uVrms
I(LIM)
AM Rejection Ratio
AMRR
RFin = 1mVrms
AM MOD = 30% @1kHz
-
-
-
40
-
-
-
dB
First Mixer 3rd Order
Intercept Point
IMD3
MIX1 Input 50W
Termination
- 15
dBm
First Mixer Input Impedance
R
/
Fc = 50MHz
690
7.2
W
pF
I(1M)
C
I(1M)
First Mixer output Impedance Ro
Fc = 10.7MHz
-
330
-
W
(1M)
8
ENHANCED-1 CHIP CT0 RF IC
S1T8528
ELECTRICAL CHARACTERISTICS (Continued)
Characteristic
Symbol
Test Conditions
Fc = 10.7MHz
Min.
Typ.
Max.
Unit
Second Mixer input
Impedance
R
-
4
-
kW
I(2M)
Second Mixer output
Impedance
Ro
Fc = 455kHz
-
-
1.5
-
-
kW
(2M)
Carrier Detector Threshold
CD
MIX1 Single-Ended
Matching,
- 95
dBm
TH
Default Threshold=1010
Low Battery Detector
LBD
LBD0 ~ LBD3 = 0 ( Default ) - 0.15
Only LBD2 = 0
3.45
3.3
0.1
V
Only LBD1 = 0
3.0
Only LBD3 = 0
LBD0 ~ LBD3 = 1
- 0.1
2.2
2.1
0.075
RSSI Slope
V
MIX1 Single-Ended
Matching
-
30
60
-
-
-
mV/dB
RSSI
RSSI Output Voltage
Dynamic Range
RSSI
MIX1 Single-Ended
Matching
-
dB
V
Carrier Detect
Output High Voltage
V
V
RFin = 1mVrms
Default Threshold = 1010
Vcc-0.4
-
OH
OL
Carrier Detect
RFin = 10mVrms
-
-
0.4
V
Output Low Voltage
Default Threshold = 1010
COMPRESSOR
( Vcc = 3.6V, fc = 1kHz, Ta = 25°C, unless otherwise specified )
Standard Output Voltage
Vo(com)
Vinc = 63.2mVrms ® 0dB
269
316
363
mVrms
ALC disabled (pin 13)
Compressor Gain
Difference
DG
DG
Vinc = - 20dB
- 10
- 1.5
-
0
0
1.0
1.5
1.0
dB
dB
%
V1(COM)
V2(COM)
Vinc = - 40dB
Compressor Output
Distortion
THD
Vinc = 63.2mVrms ® 0dB
0.5
COM
Mute Attenuation Ratio
Compressor Limiting Voltage
ALC
ATT
Vinc = 0dB
60
1.05
310
269
-
80
1.35
390
316
2.8
-
dB
MUTE
V
Vinc = Variable
1.65
450
363
-
Vp-p
LIM(COM)
VALC
R
= 150kW, Vinc = 10dB
= 63.2mVrms ® 0 dB
mVrms
mVrms
Vp-p
ALC
INC
Splatter filter
Vo(SF)
V
Maximum Output Voltage
EXPANDER
V
RL = 10KW
OMIC(MAX)
(Vcc = 3.6V, fc = 1kHz, Ta = 25°C, unless otherwise specified)
Standard Output Voltage Vin = 63.2mVrms ® 0dB
V
309
356
403
mVrms
O(EXP)
E
9
S1T8528
ENHANCED-1 CHIP CT0 RF IC
ELECTRICAL CHARACTERISTICS (Continued)
Characteristic
Symbol
Test Conditions
Vin = - 10dB
Min.
Typ.
Max.
Unit
Expander Gain Difference
DG
- 1.0
0
1.0
dB
V1(EXP)
V2(EXP)
V3(EXP)
E
DG
DG
Vin = - 20dB
- 1.5
- 2.0
-
0
0
1.5
2.0
1.0
-
dB
dB
%
E
Vin =- 30dB
E
Expander Output Distortion
Mute Attenuation Ratio
THD
Vin = 63.2mVrms ® 0dB
0.5
80
EXP
E
ATT
Vin = 63.2mVrms ® 0dB
60
dB
MUTE
E
Expander Maximum Output
Voltage
V
Vin = Variable
OEXP(MAX)
E
800
-
-
-
mVrms
Vp-p
THD = 10%
Maximum Output Voltage
V
R = 150W
-
2.2
OSPK(MAX)
L
RL = 600W
-
-
3.0
-
Vp-p
Input Current
I
I
Vin = Vcc
-
5
mA
IH
IL
Vin = 0V
- 5
Vcc-0.3
-
-
-
-
-
-
-
-
mA
V
Input Voltage
Output Current
Output Voltage
V
V
-
-
-
IH
IL
0.3
V
I
I
Vout = Vcc
Vout = 0V
0.3
-
-
-
mA
mA
V
OH
OL
0.3
V
V
V
PDT,PDR: Io = -0.3mA
( Sourcing )
Vcc-0.4
OH1
OL1
OH2
PDT,PDR: Io = 0.3mA
( Sinking )
-
-
-
0.4
V
V
LD,f
: Io = - 0.1mA
Vcc-0.5
-
MCU
( Sourcing )
V
LD,f : Io = 0.1mA
-
-
0.5
V
OL2
MCU
( Sinking )
PLL regulator voltage
V
-
1.90
2.05
3.0
2.20
V
PLLREG
REG
Regulator Load Current
I
Vout = V
(OPEN)-0.05V
-
-
mA
REG
10
ENHANCED-1 CHIP CT0 RF IC
PLL PROGRAM SUMMARY
S1T8528
•
MCU ( MICOM ) Serial Interface ( MSB : 1st INPUT )
Use CLK (Pin 7 ), DATA (Pin 8 ) , and EN (Pin 9 ) terminals for program.
DATA and CLK terminals are used for loading data to internal Shift - Register. When EN terminal is
‘Low’, It is possible to program TX-Channel Counter, RX - Channel Counter and various control
functions of PLL. When EN terminal is ‘High’, Program 1st Local Oscillator Capacitor Selection in
receiver for U.S.A - 25 CH function.
— TX - Register, RX-Register, Control Register
MSB
LSB
PMC0 PMC1
14Bit DATA
DATA
EN
CLK
Figure 1.
— Reference - Register
MSB
LSB
PMC PMC UK_ UK_
S1 S0
12Bit DATA
DATA
0
1
EN
CLK
Figure 2.
11
S1T8528
ENHANCED-1 CHIP CT0 RF IC
— Auxiliary - Register(16bits)
MSB
PMC
LSB
CLO(6bits)
CD_TH(4bits)
LBD(3bits)
TEST(2bits)
DATA
EN
CLK
Figure 3.
•
Programmable Counter
— RX - counter: Setting frequency for RX.VCO ( 14 Bits --> 1/16 ~ 1/16383 )
[ Default_CH. = USA_#21 ( REMOTE ) : 36.075MHz ( Div._NO = 7215 )]
< RX. Register (16bits) >
Bit
Bit 15
Bit 14
Bit 13
D13
0
Bit 12
D12
1
Bit 11
D11
1
Bit 10
Bit 9
Bit 8
D8
0
Name
PMC0
PMC1
D10
1
D9
0
Default value
7215
*
Bit
Bit 7
D7
0
Bit 6
D6
0
Bit 5
D5
1
Bit 4
D4
0
Bit 3
D3
1
Bit 2
D2
1
Bit 1
D1
1
Bit 0
D0
1
Name
Default value
7215
— TX - counter: Setting frequency for TX.VCO ( 14 Bits --> 1/16 ~ 1/16383 )
[ Default_CH. = USA_#21 ( REMOTE ) : 49.830MHz ( Div._NO = 9966 )]
< TX. Register (16 bits) >
Bit
Bit 15
Bit 14
Bit 13
D13
1
Bit 12
D12
0
Bit 11
D11
0
Bit 10
D10
1
Bit 9
D9
1
Bit 8
D8
0
Name
PMC0
PMC1
Default value
9966
*
12
ENHANCED-1 CHIP CT0 RF IC
S1T8528
Bit
Bit 7
D7
1
Bit 6
D6
1
Bit 5
D5
1
Bit 4
D4
0
Bit 3
D3
1
Bit 2
D2
1
Bit 1
D1
1
Bit 0
D0
0
Name
Default value
9966
* Program Latch Assignl
PMC0 (Bit15)
PMC1 (Bit14)
Register Assign
Control
0
0
1
1
0
1
0
1
UPLL_Rx
UPLL_Ref
UPLL_Tx
— Ref - counter: Setting reference frequency for phase detector ( 12 Bits --> 1/16 ~ 1/4095 )
[ Default_Divider = 2048, X-tal_OSC = 10.240 MHz -->Fref = 5KHz ]< Ref. Register (16bits) >
< Ref. Register (16bits) >
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
D11
1
Bit 10
D10
0
Bit 9
D9
0
Bit 8
D8
0
Name
PMC0
PMC1
UK_S1
UK_S0
Default value
2048
*
Ref.freq. selection
for United Kingdom
Bit
Bit 7
D7
0
Bit 6
D6
0
Bit 5
Bit 4
D4
0
Bit 3
Bit 2
Bit 1
Bit 0
Name
D5
0
D3
0
fMCU_M
FMCU1
FMCU0
Default value
2048
MPU CLK
Mute
MPU CLK
CNTl_1
MPU CLK
CNTL_0
— UK_Selection
UK_S0
UK_S1
FR1
FR2
FrefTX
fREF (A)
FrefRX
0
1
0
1
0
0
1
1
fREF (A)
fREF (A)
-
fREF (A)
fREF/4 (B)
fREF/25 (C)
fREF/4 (B)
fREF/4 (B)
fREF/25 (C)
fREF/25 (C)
fREF/4 (B)
fREF/4 (B)
fREF/25 (C)
fREF/4 (B)
fREF/4 (B)
13
S1T8528
ENHANCED-1 CHIP CT0 RF IC
fREF
(A)
LD
FR1
FR2
fREF¡ 4À
12 Bits Reference
program divider.
¡ 4À
PD_TX
PDT
PDR
PD_RX
(B)
fREF¡ 2À5
(C)
25
¡ À
Figure 4. Reference frequency selection
•
Control program
Control register (16 Bits)
Bit
Name
Bit 15
PMC0
Bit 14
PMC1
Bit 13
BS1
Bit 12
BS0
Bit 11
Bit 10
CO_M
Bit 9
EX_M
Bit 8
LBD_BS
SPK_M
Description Program
Mode
Program
Mode
Power
Save
Power
Save
Low
Battery
Compressor Expander Speaker
Mute
Mute
Mute
Control_0 Control_1 Control_1 Control_0 Detector
Battery
Save
Function
*
**
0:Normal
(LBD-On)
1:LBD-Part 1: Mute
Power-Off
0: Normal
0:Normal 0:Nomal
Program Latch
Assign
Power Save Mode
1:Mute
1:Mute
Bit
Name
Bit 7
SPK3
SPK
Bit 6
Bit 5
SPK1
SPK
Control_1 Conrol_ Select
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPK2
SPK0
LDT/CDO
fMCU_M fMCUS1
fMCUS0
Description
SPK
SPK
LDT/CDO
MCU
Clock
Mute
MCU
Clock
Control_1 Control_0
MCU
Clock
Control_3 Control_2
Function
Speaker Volume Control
0: CDO
1: LDT
0: Normal
1: Mute
***
MCU Clock Output
14
ENHANCED-1 CHIP CT0 RF IC
S1T8528
** Power Save Mode Assign
BS1 (Bit13)
BS0 (Bit12)
Power Save Mode
Rx
0
0
1
1
0
1
0
1
Default
Active
STD_By
Inactive
*** MCU Clock Output Control & Frequency
fMCU_M
fMCUS1
fMCUS0
Clock Output
Divider
X-tal 10.24MHz 11.15MHz 12.0MHz
Divider
1
0
0
0
0
Don’t Care Don’t Care
Low
0
0
1
1
0
1
0
1
2
2
3
4
5
5.120MHz 5.575MHz
3.413MHz 3.717MHz
2.560MHz 2.788MHz
2.048MHz 2.230MHz
6.0MHz
4.0MHz
3.0MHz
2.4MHz
3
4
5 (Default)
*** Speaker Amplifier Volume Control
DATA
Gain/Attenuation
Output Level [SAO1-SAO2]
SPK3
SPK2
SPK1
SPK0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
- 18dB
- 16dB
- 14dB
- 12dB
- 10dB
- 8dB
- 6dB
- 4dB
- 2dB
0dB
25mVrms
-
-
50mVrms
-
-
100mVrms
-
-
200mVrms
+2dB
+4dB
+6dB
+8dB
+10dB
+12dB
-
-
400mVrms
-
-
800mVrms
15
S1T8528
ENHANCED-1 CHIP CT0 RF IC
•
Auxiliary Register (16 Bits)
Auxiliary Register Function
Bit
Name
Bit 15
PMC
Bit 14
CLO5
Bit 13
CLO4
Bit 12
CLO3
Bit 11
CLO2
Bit 10
CLO1
Bit 9
CLO0
Bit 8
CD_TH3
Description Auxiliary
register
Cap=5.9p Cap=4.8p Cap=3.2p Cap=1.6p Cap=1.3p Cap=0.8p CD_TH
Control_3
Selection
Function
*****
CD
Program
Mode
Control_3
1’st LO Cap Select
Control
Bit
Bit 7
Bit 6
CD_TH1
CD_TH
Bit 5
CD_TH0
CD_TH
Bit 4
LBD3
LBD
Bit 3
LBD2
LBD
Bit 2
LBD1
LBD
Bit 1
TEST2
TEST
Bit 0
Name
CD_TH2
TEST1
Description CD_TH
TEST
Control_2 Control_1 Control_0 Control_3 Control_2
Control_1 Mode2
Mode1
Function
Carrier Detector
Threshold Control
Low Battery Detector
Voltage Control
**** TEST Mode &
LDT-CDO Mode
**** TEST Mode & LDT-CDO Mode
LDT/CDO
TEST1
TEST2
LDT / CDO
Remark
0
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
0
Rx block CDO
Rx block CDO
4_25cnt block FR2
4_25cnt block FR2
PLL block LDT
PLL block LDT
Test PLL_RX
Default
-
-
-
-
-
-
-
1
Test PLL_TX
16
ENHANCED-1 CHIP CT0 RF IC
S1T8528
**** Carrier Detector Threshold Control
DATA
Carrier Detector Threshold
CD_TH3
CD_TH2
CD_TH1
CD_TH0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
- 20dB
- 18dB
- 16dB
- 14dB
- 12dB
- 10dB
- 8dB
- 6dB
- 4dB
- 2dB
0dB (Default)
+2dB
+4dB
+6dB
+8dB
+10dB
17
S1T8528
ENHANCED-1 CHIP CT0 RF IC
•
Operating internal circuit blocks in each mode
Mode ( state )
Active state
Operating circuit blocks
PLL regulator / MICOM I/F ( Data, CLK, EN ) / 2nd local oscillator / Receiver/ 1st
local oscillator/ RX PLL/ Carrier detector / FSK comparator / Low battery detector
/ TX PLL / Expander & speaker amp / Compressor /Splatter filter amp, Clock
Output
( Communication mode )
Receiving mode
PLL regulator / MICOM I/F( Data, CLK, EN ) / 2nd local oscillator / Receiver/ 1st
local oscillator/ RX PLL/ Carrier detector / FSK comparator / Low battery
detector, Clock Output
Stand-by mode
PLL regulator, MICOM I/F ( Data, CLK, EN ), 2nd local oscillator, Clock Output
(Battery Save Mode#2)
Inactive state
Interrupt
(Battery Saving Mode#1)
•
Auxiliary Register(CLO_LBD Program)
[ Rx - 1st local oscillation internal cap. for U.S.A - 25CH & low battery detecting voltage ]
— CLO register ( 6 bits ) : Receiver 1st local oscillator internal capacitor selection
Bit Bit 15 Bit 14 Bit 13 Bit 12 Bit 11
Name PMC CLO5 CLO4 CLO3 CLO2
Bit 10
CLO1
Bit 9
CLO0
Default
Value 0
1
*****
0
0
0
0
0
0
Function
-
0:Normal
1:Internal
Cap. for
USA 25
Channel
=5.9pF
0:Normal
1:Internal
Cap. for
USA 25
Channel
= 4.8pF
0:Normal
1:Internal
Cap. for
USA 25
Channel
= 3.2pF
0:Normal
1:Internal
Cap. for
USA 25
Channel
=1.6pF
0:Normal
1:Internal
Cap. for
USA 25
Channel
=1.3p F
0:Normal
1:Internal
Cap. for
USA 25
Channel
= 0.8pF
18
ENHANCED-1 CHIP CT0 RF IC
S1T8528
***** PMC ( Program Mode Control )
PMC = ‘HIGH’ & EN = ‘HIGH’ ---> Auxiliary Register Program Mode
— Rx-Low Battery Detect Voltage
Bit
Bit15 (MSB)
PMC
Bit 4
LBD3
0
Bit 3
LBD2
0
Bit 2
LBD1
0
Low Battery Detector
Voltage
Remark
Name
Default
Value
1
*****
3.45V
Default
Function
1
1
0
1
1
1
0
1
0
1
1
1
1
0
1
1
3.3V
3.0V
2.2V
2.1V
-
-
-
-
***** PMC ( Program Mode Control )
PMC = ‘HIGH’ & EN = ‘HIGH’ ---> Auxiliary Register Program Mode
•
Example 1 >
Low battery detector voltage : 2.1V
U.S.A _CH-#1 ( REMOTE ) ---> 1st local osc. varicap. value =15.86pF, Internal cap. = 9.3pF
( Ext_L = 0.45uH, EXT_C = 30pF )
— 16 bit data format
MSB
PMC CLO5 CLO4 CLO3 CLO2 CLO1 CLO0
LSB
LBD3 LBD2 LBD1
1
0
1
1
0
1
0
1
1
1
1( 0 ) 1( 0 )
DATA
1( 0 ) 1( 0 ) 1( 0 ) 1( 0 )
EN
CLK
Figure 5.
19
S1T8528
ENHANCED-1 CHIP CT0 RF IC
•
Example data for U.S.A 25_channel selection
1st Local Osc. Internal Capacitor Select
Base
Hand
Varicap
Value
External External Internal
Channels Channels
C
L
C
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1 ~ 25CH. 1 ~ 25CH. 1.0V~2.0V
TYP 1.5V
27pF
(30pF)
0.45uH
pF
(CLO5) (CLO4) (CLO3) (CLO2) (CLO1) (CLO0)
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
1
0
0
0
0
1
0
0
1
0
0
1
0
0
1
1
0
1
1
0
1
0
0
16~25CH.
18.73
~15.86pF
27pF
47pF
27pF
27pF
27pF
47pF
47pF
0.44uH
0.20uH
0.44uH
0.44uH
0.44uH
0.20uH
0.20uH
-
-
16~25CH.
18.73
~15.86pF
0.8
2.1
1.6
0.8
9.3
8.8
01~04CH.
18.73
~15.86pF
05~10CH.
18.73
~15.86pF
11~15CH.
18.73
~15.86pF
-
-
01~06CH.
07~15CH.
18.73
~15.86pF
18.73
~15.86pF
Phase detector / Lock Detector Output Waveforms
fREF
LD
FR1
FR2
(A)
fREF¡ À4
12 Bits Reference
program divider.
REF.Freq
¡
À
4
PD_TX
(B)
TIF¡ ÀN
2LOI
¡
À
fREF 25
¡
À
25
(C)
PDT
14 Bits TX.
program divider.
TIF
Figure 6.
20
ENHANCED-1 CHIP CT0 RF IC
S1T8528
REF.Freq.
TIF
N
¡ À
PDT
LD
Figure 7. Phase Detector / Lock Detector Output Waveform
21
S1T8528
ENHANCED-1 CHIP CT0 RF IC
APPLICATION CIRCUIT ( BASE SET )
+
22
ENHANCED-1 CHIP CT0 RF IC
S1T8528
APPLICATION CIRCUIT ( HAND SET )
+
23
S1T8528
ENHANCED-1 CHIP CT0 RF IC
TEST CIRCUIT
Vi n27
Vccr x
10nF
+
10uF
RAo
390W
S34
10. 7MHz
0. 01uF 0. 01uF
500§Ú- 1000§Ú
15§Ú
1§Ú
1Mo
680uH
10§Ú
68§Ú
DSCI
S25
10. 240MHz
2Mo
455KHz
Var i cap
2Lo
5. 1§Ú
0. 1uF
180pF
10§Ú
20pF
0. 1uF
0. 01uF
RSSI
180§Ú
DSCO
47pF
V28
36
35
34
33
32
LI
31
30
29
QCI
28
27
26
25
2LOI 2MO 2MI VCC
( RX)
LD GND
( RX)
RAO DSCI DSCO RSSI
VREFCOM 4. 7uF
24
37
38
39
40
2LOI
VREF( COMP)
ALC
+
150§Ú
23
22
21
20
19
18
17
16
15
14
1MO
1LOI
1LOI
S23
1uF
EPI
ERC
EO
+
25pF
Vi n22
2. 2uF
0. 47uH
+
Voe
2. 2uF 10§Ú
~
Vi n40
10nF
S40
47pF
56§Ú
41
VCO( RX)
+
S41
1uF
100nF
Vi ne1
SAo1
SAo2
SAI
S1T8528
42
43
1MI
1MI
+
0. 47uH
10nF
PDR
SAO1
1nF
~
Vi n43
18pF
1§Ú
150§Ù
44
45
46
GND( PLL)
PDR
SAO2
4. 3§Ú
VCOR
S45
VCC( COMP)
GND( COMP)
CPI
+
1uF
Vcccom
+
VREF( RF)
VREF( PLL)
TI F
10nF 10uF
10nF 10uF
10uF
+
VREFRF
30§Ú 1uF
Vi nc
+
47
VREFPLL
48
+
10nF
CPO 13
CRC
S48
CDO
PDT CO SFI SFO LDT
150§Ú 100pF
Vmi co
TI F
~
CLK
7
EN LBD
CLKO
6
DATA
8
AGI C
11
Vi n48
10
12
1
2
3
4
5
9
100§Ú
+
10uF
PDT
S1
100§Ú
10nF
100§Ú
+
S5
47pF
2. 7§Ú
15§Ú
100§Ú
100§Ú
2. 2uF
100§Ú
10nF
+
1nF
LBD
S7
S8
S9
Vc
2. 2uF
LD
100W
15§Ú
1uF
+
10K 10K 10K
CDo
82§Ú
33pF 47pF
T1( AW)
56§Ú
VCOT
2. 2uF
+
1§Ú
1nF
CLKO CLK DATA EN
SFout
6. 8§Ú
68pF
68pF
+
+
0. 47uF
10§Ú
Vi nc1
KDS2236
1uF
0. 41uH
1§Ú
24
ENHANCED-1 CHIP CT0 RF IC
S1T8528
25
S1T8528
ENHANCED-1 CHIP CT0 RF IC
26
ENHANCED-1 CHIP CT0 RF IC
S1T8528
27
S1T8528
ENHANCED-1 CHIP CT0 RF IC
28
ENHANCED-1 CHIP CT0 RF IC
S1T8528
29
S1T8528
ENHANCED-1 CHIP CT0 RF IC
30
ENHANCED-1 CHIP CT0 RF IC
S1T8528
31
S1T8528
ENHANCED-1 CHIP CT0 RF IC
32
ENHANCED-1 CHIP CT0 RF IC
S1T8528
33
S1T8528
ENHANCED-1 CHIP CT0 RF IC
34
ENHANCED-1 CHIP CT0 RF IC
S1T8528
NOTES
35
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