BU2382FV [ROHM]

Clock generator for digital still camera; 对于数码相机的时钟发生器
BU2382FV
型号: BU2382FV
厂家: ROHM    ROHM
描述:

Clock generator for digital still camera
对于数码相机的时钟发生器

时钟发生器 数码相机
文件: 总7页 (文件大小:60K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BU2382FV  
Multimedia ICs  
Clock generator for digital still camera  
BU2382FV  
BU2382FV is a high-performance 2-channel PLL IC. PLL circuit generates necessary clocks by inputting standard clocks  
of crystal oscillator from outside. Changing a connection of wire can generate any clocks required for any applications of  
users. Jitter and S/N characteristic has achieved almost the same high-quality sound and vision as oscillating module  
because of optimization of PLL. Frequency can be changed by the internal dividing control.  
zApplications  
zExternal dimensions (Unit : mm)  
Digital still camera  
5.0±0.2  
16  
9
zFeatures  
1) Generate clocks for CDS, USB with standard clock input  
2) No external elements required  
3) Standard clocks apply to two kinds of NTSC/PAL  
4) Power down control in each 2-channel PLL  
5) Single power supply of 3.3V operating  
6) SSOP-B16 small package  
1
8
0.15±0.1  
0.1  
0.65  
0.22±0.1  
SSOP-B16  
zAbsolute maximum ratings (Ta=25°C)  
Parameter  
Applied voltage  
Symbol  
Limits  
0.5 to +7.0  
0.5 to VDD+0.5  
30 to +125  
450  
Unit  
V
VDD  
Input voltage  
V
IN  
V
Storage temperature range  
Power dissipation  
Tstg  
Pd  
°C  
mW  
IC destruction is not occurred, however, operation can not be guaranteed.  
Derating : 4.5mW/°C for operation above Ta=25°C.  
This product is not designed for protection against radioactive rays.  
Power dissipation is the rate when the IC is mounted on the board.  
zRecommended operating conditions (Ta=25°C)  
Parameter  
Power supply voltage  
Input "H" voltage range  
Input "L" voltage range  
Operating temperature  
Output load  
Symbol  
Min.  
3.0  
Typ.  
Max.  
3.6  
Unit  
V
DD  
V
V
VIH  
VIL  
0.8VDD  
0
VDD  
0.2VDD  
+70  
V
Topr  
CL  
5  
°C  
pF  
15  
1/6  
BU2382FV  
Multimedia ICs  
zBlock diagram  
PLL1  
NT_PAL SEL PLL1 Internal oscilation  
XTAL_IN  
L
L
H
H
L
H
L
97.253572MHz  
141.875800MHz  
96.923078MHz  
143.754548MHz  
CLK1 clock output  
1 / 2  
XTAL  
XTAL_OUT  
H
NT : 14.318182MHz  
PAL : 17.734475MHz  
OE_CLK1  
PLL2  
PLL2 Internal oscilation  
NT_PAL  
CLK2 clock output  
1 / 2  
L
H
95.997484MHz  
95.996902MHz  
OE_CLK2  
REF_CLK clock output  
NT_PAL SEL  
REFCLK (MHz)  
CLK1 (MHz)  
48.626786  
CLK2 (MHz)  
47.998742  
L
L
L
H
L
17.734475  
17.734475  
14.318182  
14.318182  
XTAL (170 / 31) /2 XTAL (249 / 46) /2  
70.937900 47.998742  
XTAL (360 / 45) /2 XTAL (249 / 46) /2  
48.461539 47.998451  
H
H
XTAL (176 / 26) /2 XTAL (295 / 44) /2  
71.877274 47.998451  
XTAL (502 / 50) /2 XTAL (295 / 44) /2  
H
2/6  
BU2382FV  
Multimedia ICs  
zPin descriptions  
Pin No.  
Pin name  
Functions  
1
2
VDD for clock output  
V
DD  
2
GND for clock output  
Crystal output  
V
SS  
2
3
REF_CLK  
TEST1  
AVDD  
4
Test mode control pin  
Analog VDD  
5
6
Analog GND  
AVSS  
7
Standard crystal input  
Standard crystal output  
XTALIN  
XTALOUT  
OE_CLK2  
CLK2  
8
9
Output enable pin for CLK2 (H : enable, L : output L fixed)  
10  
11  
12  
13  
14  
15  
16  
CLK2 clock output  
Digital GND  
DVSS  
Digital VDD  
DVDD  
NT / PAL select (L : PAL, H : NTSC)  
Output select  
NT_PAL  
SEL  
CLK1 clock outpt  
CLK1  
Output enable pin for CLK1 (H : enable, L :output Lfixed)  
OE_CLK1  
V
V
DD  
2
OE_CLK1  
16  
1
2
3
4
5
6
7
8
SS2  
CLK1  
15  
REF_CLK  
TEST1  
SEL  
14  
NT_PAL  
DVDD  
13  
12  
11  
10  
9
AVDD  
AVSS  
DVSS  
XTAL IN  
XTAL OUT  
CLK2  
OE_CLK2  
3/6  
BU2382FV  
Multimedia ICs  
zInput output circuits  
Pin No.  
Equivalent circuit  
Input PIN  
(Schmidt trigger)  
9, 13, 14, 16  
(With pull_up)  
4
(With pull_down)  
To IC inside  
Output PIN  
3, 10, 15  
From IC inside  
Crystal PIN  
7, 8  
To IC inside  
4/6  
BU2382FV  
Multimedia ICs  
zElectrical characteristics (Unless specified otherwise Ta=25°C, VCC=3.3V, crystal frequency=14.318182MHz )  
Parameter  
Output H voltage  
Output L voltage  
Symbol  
VOH  
VOL  
Min.  
Typ.  
Max.  
Unit  
V
Conditions  
2.4  
0.4  
IOH=4.0mA  
V
IOL=4.0mA  
0.2VDD  
V
Input VthL  
Input VthH  
3
VthL  
VthH  
Vhys  
IDD  
1
0.8VDD  
V
3
1
0.4  
30  
V
Vhys=VthH-VthL  
No load  
Hysteresis width  
3
Operating circuit current  
45  
mA  
CLK1_LL  
CLK1_LH  
CLK1_HL  
CLK1_HH  
48.626786  
70.937900  
48.461539  
71.877274  
XTAL 170/31/2 (XTAL=17.734475MHz)  
XTAL 360/45/2 (XTAL=17.734475MHz)  
XTAL 176/26/2 (XTAL=14.318182MHz)  
XTAL 502/50/2 (XTAL=14.318182MHz)  
CLK1  
MHz  
MHz  
CLK2_L  
CLK2_H  
47.998742  
47.998451  
XTAL 249/46/2 (XTAL=17.734475MHz)  
XTAL 295/44/2 (XTAL=14.318182MHz)  
CLK2  
Duty  
JsSD  
JsABS  
tr  
45  
50  
30  
55  
%
1/2 VDD test  
Duty  
psec  
psec  
nsec  
nsec  
msec  
1σ short time jitter  
MIN.-MAX.  
Jitter 1σ  
Jitter MIN-MAX  
180  
2.5  
2.5  
20% to 80% time of VDD  
20% to 80% time of VDD  
2
Rise time  
tf  
Fall time  
tlock  
1
Output Lock time  
Note) Output frequency is determined by the operation expression (Frequency divide) input to XTAL IN.  
Output at 27MHz input is shown above.  
Jitter is value when using Time interval analyzer with 10000 sampling.  
1) Low and high limit voltage in the schmitt trigger input Pin having hysteresis features shown in 3 diagram.  
2) Time that output takes to stabilize in the specific frequency range after the power supply reaches to 3.0V.  
3) Make reference to the diagram.  
0.2VDD  
0.8VDD  
Vhys  
0
VthL  
1/2VDD  
VthH  
Input (V)  
5/6  
BU2382FV  
Multimedia ICs  
zApplication example  
V
V
DD  
2
OE_CLK1  
CLK1  
H or L  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
SS  
2
CLK1 output  
H or L  
N T : 14.38182MHz  
PAL : 17.734475MHz  
REF_CLK  
TEST1  
SEL  
NT_PAL  
DVDD  
H or L  
AVDD  
AVSS  
DVSS  
XTAL IN  
XTAL OUT  
CLK2  
CLK2 output  
H or L  
OE_CLK2  
Note) The BU2382FV is basically placed on the board.  
Decoupling capacitance (0.1µF) need to be placed between Pin1 (VDD2) and Pin2 (VSS2),  
Pin5 (AVDD) and Pin6 (AVSS), Pin11 (DVSS) and Pin12 (DVDD).  
To obtain accurate frequency, capacitance (pF) need to be placed between Pin8 (XTAL IN)  
and Pin6 (AVSS). Pin7 (XTAL OUT) and Pin6 (AVSS).  
Tantalum capacitance (10 to 100µF), ferrite beads may need to be placed to prevent power  
supply drop in certain board's case.  
To reduce high frequency noise, selected bypass capacitors (<1at problem high frequency)  
maybe used for power pin as close to BU2382FV as possible.  
6/6  
Appendix  
Notes  
No technical content pages of this document may be reproduced in any form or transmitted by any  
means without prior permission of ROHM CO.,LTD.  
The contents described herein are subject to change without notice. The specifications for the  
product described in this document are for reference only. Upon actual use, therefore, please request  
that specifications to be separately delivered.  
Application circuit diagrams and circuit constants contained herein are shown as examples of standard  
use and operation. Please pay careful attention to the peripheral conditions when designing circuits  
and deciding upon circuit constants in the set.  
Any data, including, but not limited to application circuit diagrams information, described herein  
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM  
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any  
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of  
whatsoever nature in the event of any such infringement, or arising from or connected with or related  
to the use of such devices.  
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or  
otherwise dispose of the same, no express or implied right or license to practice or commercially  
exploit any intellectual property rights or other proprietary rights owned or controlled by  
ROHM CO., LTD. is granted to any such buyer.  
Products listed in this document use silicon as a basic material.  
Products listed in this document are no antiradiation design.  
The products listed in this document are designed to be used with ordinary electronic equipment or devices  
(such as audio visual equipment, office-automation equipment, communications devices, electrical  
appliances and electronic toys).  
Should you intend to use these products with equipment or devices which require an extremely high level of  
reliability and the malfunction of with would directly endanger human life (such as medical instruments,  
transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other  
safety devices), please be sure to consult with our sales representative in advance.  
About Export Control Order in Japan  
Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control  
Order in Japan.  
In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause)  
on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction.  
Appendix1-Rev1.0  

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