BU2279F-E1 [ROHM]

Clock Generator, CMOS, PDSO16;
BU2279F-E1
型号: BU2279F-E1
厂家: ROHM    ROHM
描述:

Clock Generator, CMOS, PDSO16

时钟 控制器 微控制器 微控制器和处理器 光电二极管 时钟发生器
文件: 总2页 (文件大小:40K)
中文:  中文翻译
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BU2279F  
Multimedia ICs  
Clock generator for PC  
BU2279F  
BU2279F is an IC that generates multiple clocks from the built-in PLL by inputting standard clocks from outside. This IC is  
suitable for digital appliances.  
54 MHz for video and 33.333MHz of digital system clock for CPU can be generated from widely used 13.5 MHz clock.  
zExternal dimensions (Units : mm)  
zApplications  
DVD recorder, PC  
10.0±0.2  
16  
9
zFeatures  
1
8
0.15±0.1  
0.1  
1) Clock signals are generated by crystal oscillator.  
2) SOP16 package.  
1.27  
0.4±0.1  
3) Single power supply 3.3V.  
4) No external components for PLL  
SOP16  
zAbsolute maximum ratingTa=25°C)  
Parameter  
Impressed voltage  
Input voltage  
Symbol  
Limits  
0.5 ~ 7.0  
0.5 ~ VDD+0.5  
500  
Unit  
V
V
DD  
IN  
V
V
mW  
°C  
Storage temperature range  
Power dissipation  
Pd  
Tstg  
30 ~ 125  
Ratio above does not guarantee the operation.  
When the condition is over Ta=25 C, dissipatioin is decreased 5mWper 1 C.  
Radiation resistance design is not used.  
Power dissipation is.  
zRecommended operational conditionsTa=25°C)  
Parameter  
Symbol  
Min.  
3.0  
0.8VDD  
0
Typ.  
Max.  
3.6  
Unit  
Power supply voltage  
V
DD  
IH  
IL  
V
V
Voltage range of "H" input  
Voltage range of "L" input  
Operation temperature range  
Maximum output load  
V
VDD  
V
0.2VDD  
70  
V
Topr  
CL  
5  
°C  
pF  
15  
1/2  
BU2279F  
Multimedia ICs  
zElectric Characteristics (Unless any specification, Vcc=3.3V, Ta=25°C, Crystal frequency=13.500MHz)  
Parameter  
Output "L" voltage  
Output "H" voltage  
Operation current  
VCLK  
Symbol  
Min.  
Typ.  
Max.  
Unit  
V
Conditions  
V
OL  
OH  
DD  
0.4  
I
I
OL=4.0mA  
V
24  
V
OH=−4.0mA  
I
30  
60  
mA  
MHz  
MHz  
No load  
VCLK  
SCLK  
54.00  
33.333  
Xtal+ 160 20  
Xtal+ 400 27  
2
6
SCLK  
Design assurances  
Duty V  
Duty S  
Jstd1  
Jstd2  
tr  
45  
48  
50  
53  
55  
58  
%
Measured at 1/2VDD  
Measured at 1/2VDD  
Jitter 1σ  
VCLK Duty  
SCLK Duty  
%
80  
psec  
psec  
nsec  
nsec  
msec  
Jitter1  
400  
2.5  
2.5  
Jitter MIN=MAX  
Jitter2  
Rise time  
Fall time  
tr  
tLOCK  
1
LOCK time of output  
Remarks ) The output frequency is calculated from the input frequency of XTALIN. The value of output frequency above is the case of input frequency is 13.5MHz.  
The values of Jitter above are the center value of 10000 sampling by time interval analyzer.  
) The time for output frequency to be stabled after the power supply become 3.0V.  
zApplication circuit  
Fixed to "L"  
CTRL1  
TEST1  
CTRL2  
AGND  
OE  
CTRL3  
TEST2  
1
2
3
4
5
6
7
8
16  
15  
14  
Fixed to "L"  
Fixed to "L"  
AVDD 13  
DGND  
DVDD  
DVDD  
SCLK  
DVDD  
VCLK  
12  
11  
10  
9
33.3MHz output  
0.1µF  
XTALIN  
XTALOUT  
54MHz output  
BU2279F  
0.1µF  
0.1µF  
0.1µF  
Remarks) The IC is basically needed to be on the board. (Unless it is on the board, the characteristics are not guaranteed.) Decoupling capacitance(0.1µF)  
is needed to be placed between 13PIN(AVDD) and 4PIN(AGND).Decoupling capacitance(0.1µF)is needed to be placed between 16PIN(DVDD)  
10PIN(DVDD), 12PIN(DVDD) and 5PIN(DGND) each.  
To adjust the frequency of crystal, place a certain value of capacitance(pF) between 7 or 8PIN and DGND.  
2pin and 4pin are needed to be fixed to "OPEN" through the operation.  
2/2  

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