NLAS9031DFT2G [ROCHESTER]
1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO6, LEAD FREE, SOT-363, SC-70, SC-88, 6 PIN;型号: | NLAS9031DFT2G |
厂家: | Rochester Electronics |
描述: | 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO6, LEAD FREE, SOT-363, SC-70, SC-88, 6 PIN 光电二极管 |
文件: | 总11页 (文件大小:842K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NLAS9031
SPDT, 3 W RON Switch
The NLAS9031 is an advanced CMOS analog switch fabricated
with silicon gate CMOS technology. It achieves very low
propagation delay and RDS
resistances while maintaining CMOS
(on)
low power dissipation. Analog and digital voltages that may vary
across the full power−supply range (from V to GND). This device
is a drop in replacement for the NC7S9031.
The select pin has overvoltage protection that allows voltages
CC
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MARKING
above V
up to 7.0 V to be present on the pin without damage or
CC,
DIAGRAMS
disruption of operation of the part, regardless of the operating
voltage.
SC−88
AF MG
6
DF SUFFIX
CASE 419B
Features
G
1
• High Speed: t = 1.0 ns (Typ) at V = 5.0 V
PD
CC
• Low Power Dissipation: I = 2.0 mA (Max) at T = 25°C
CC
A
WDFN6
MT SUFFIX
CASE 506AS
F M
G
• Standard CMOS Logic Levels
• High Bandwidth, Improved Linearity
• Switches Standard NTSC/PAL Video, Audio, SPDIF and HDTV
• May be used for Clock Switching, Data Multiplexing, etc.
• R Typical = 3 W @ V = 4.5 V
AF, F
M
= Specific Device Code
= Date Code*
= Pb−Free Package
G
ON
CC
(Note: Microdot may be in either location)
• Break Before Make Circuitry, Prevents Inadvertent Shorts
*Date Code orientation may vary depending
upon manufacturing location.
• 2 Devices can Switch Balanced Signal Pairs,
e.g. LVDS u 200 Mb/s
FUNCTION TABLE
• Latchup Performance Exceeds 300 mA
Select Input
Function
• Pin for Pin Drop in for NC7S9031
• Tiny SC88 and WDFN6 Packages
L
H
B0 Connected to A
B1 Connected to A
• ESD Performance:
♦ Human Body Model; u 2000 V;
♦ Machine Model; u 200 V
ORDERING INFORMATION
• Extended Automotive Temperature Range −55°C to +125°C
(See Appendix)
†
Device
Package
Shipping
• Pb−Free Packages are Available
NLAS9031DFT2G
SC−88
(Pb−Free)
3000 Tape & Reel
NLAS9031MTR2G
WDFN6 3000 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2007
1
Publication Order Number:
April, 2007 − Rev. 0
NLAS9031/D
NLAS9031
SC−88
1
2
3
6
5
4
B
Select
1
WDFN6
B
1
2
3
6
5
4
Select
1
GND
V
A
CC
GND
V
A
CC
B
0
B
0
(Top View)
(Top View)
Figure 1. Pin Assignment & Logic Diagram
MAXIMUM RATINGS
Rating
Symbol
Value
−0.5 to +7.0
Unit
V
Supply Voltage
V
CC
DC Switch Voltage (Note 1)
DC Input Voltage (Note 1)
V
−0.5 to V + 0.5
V
S
IN
IK
CC
V
−0.5 to + 7.0
−50
V
DC Input Diode Current @ V t 0 V
I
mA
mA
mA
°C
IN
DC Output Current
I
128
OUT
DC V or Ground Current
I
/I
+100
CC
CC GND
Storage Temperature Range
T
stg
−65 to +150
150
Junction Temperature Under Bias
Junction Lead Temperature (Soldering, 10 Seconds)
Power Dissipation @ +85°C
T
°C
J
T
260
°C
L
D
P
180
mW
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
RecommendedOperating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed.
RECOMMENDED OPERATING CONDITIONS (Note 2)
Characteristic
Symbol
Min
1.65
0
Max
Unit
V
Supply Voltage Operating
Select Input Voltage
Switch Input Voltage
Output Voltage
V
CC
5.5
V
V
CC
V
CC
V
CC
V
IN
IN
V
0
V
V
OUT
0
V
Operating Temperature
Input Rise and Fall Time
T
−55
+125
°C
ns/V
A
t , t
r
f
Control Input V = 2.3 V−3.6 V
0
0
10
5.0
CC
Control Input V = 4.5 V−5.5 V
CC
Thermal Resistance
q
−
350
°C/W
JA
2. Select input must be held HIGH or LOW, it must not float.
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2
NLAS9031
DC ELECTRICAL CHARACTERISTICS
T = +255C
T = −405C to +855C
A
A
V
(V)
CC
Min
Typ
Max
Min
Max
Symbol
Parameter
HIGH Level
Input Voltage
Test Conditions
Unit
V
IH
1.65−1.95
2.3−5.5
0.75 V
V
CC
CC
0.7 V
V
IL
LOW Level
Input Voltage
1.65−1.95
2.3−5.5
0.25 V
0.3 V
V
CC
CC
I
I
Input Leakage Current 0 v V v 5.5 V
0−5.5
"0.05
"0.05
"0.1
"0.1
"1
"1
mA
mA
IN
IN
OFF State Leakage
Current
0 vA, B v V
1.65−5.5
OFF
CC
R
ON
Switch On Resistance
(Note 3)
V
= 0 V, I = 30 mA
4.5
3.0
5.0
7.0
7.0
12
15
W
IN
O
V
IN
= 2.4 V, I = −30 mA
O
V
IN
= 4.5 V, I = −30 mA
O
V
= 0 V, I = 24 mA
3.0
2.3
4.0
10
9.0
20
W
W
IN
O
V
IN
= 3 V, I = −24 mA
O
V
IN
= 0 V, I = 8 mA
5.0
13
12
30
O
V
IN
= 2.3 V, I = −8 mA
O
V
= 0 V, I = 4 mA
1.65
5.5
6.5
17
20
50
W
IN
O
V
IN
= 1.65 V, I = −4 mA
O
I
Quiescent Supply
Current
V
IN
= V or GND
1.0
10
mA
CC
CC
All Channels ON or
I
= 0
OUT
OFF
Analog Signal Range
V
CC
0
V
CC
0
V
CC
V
R
RANGE
On Resistance
Over Signal Range
(Note 3) (Note 7)
I = −30 mA, 0 v V
4.5
3.0
25
W
A
Bn
v V
CC
I = −24 mA, 0 v V
50
A
Bn
v V
CC
I = −8 mA, 0 v V
2.3
100
300
A
Bn
v V
CC
I = −4 mA, 0 v V
1.65
A
Bn
v V
CC
DR
On Resistance Match I = −30 mA, V = 3.15
4.5
3.0
2.3
0.15
0.2
0.5
0.5
W
W
ON
A
Bn
Between Channels
(Note 3) (Note 4)
(Note 5)
I = −24 mA, V = 2.1
A Bn
I = −8 mA, V = 1.6
A
Bn
I = −4 mA, V = 1.15
1.65
A
Bn
R
flat
On Resistance
Flatness (Note 3)
(Note 4) (Note 6)
I = −30 mA, 0 v V
5.0
3.3
2.5
1.8
6.0
12
A
Bn
v V
CC
I = −24 mA, 0 v V
A
Bn
v V
CC
I = −8 mA, 0 v V
28
A
Bn
v V
CC
I = −4 mA, 0 v V
125
A
Bn
v V
CC
3. Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower
of the voltages on the two (A or B Ports).
4. Parameter is characterized but not tested in production.
5. DR = R max − R min measured at identical V , temperature and voltage levels.
ON
ON
ON
CC
6. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions.
7. Guaranteed by Design.
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3
NLAS9031
AC ELECTRICAL CHARACTERISTICS
T = +255C
T = −405C to +855C
A
A
V
(V)
Figure
Number
CC
Min
Typ Max
Min
Max
Symbol
Parameter
Test Conditions
V = OPEN
Unit
t
t
Propagation Delay
Bus to Bus (Note 9)
1.65−1.95
2.3−2.7
3.0−3.6
4.5−5.5
ns
Figures
2, 3
PHL
PLH
I
1.2
0.8
0.3
t
t
Output Enable Time
Turn On Time
V = 2 V for t
1.65−1.95
2.3−2.7
3.0−3.6
4.5−5.5
23
13
6.9
7.0
3.5
2.5
1.7
24
14
7.6
ns
ns
ns
Figures
2, 3
PZL
PZH
I
CC
PZL
V = 0 V for t
I
PZH
(A to B )
n
5.2
5.7
t
t
Output Disable Time
Turn Off Time
(A Port to B Port)
V = 2 V for t
1.65−1.95
2.3−2.7
3.0−3.6
4.5−5.5
12.5
7.0
5.0
3.5
3.0
2.0
1.5
0.8
13
7.5
5.3
3.8
Figures
2, 3
PLZ
PHZ
I
CC
PLZ
V = 0 V for t
I
PHZ
t
Break Before Make
Time (Note 8)
1.65−1.95
2.3−2.7
3.0−3.6
4.5−5.5
0.5
0.5
0.5
0.5
Figure 4
B−M
Q
Charge Injection
(Note 8)
C = 0.1 nF, V
= 0 V
5.0
3.3
7.0
3.0
pC
dB
dB
Figure 5
Figure 6
Figure 7
L
GEN
R
GEN
= 0 W
OIRR
Xtalk
Off Isolation (Note 10) R = 50 W
1.65−5.5
−57
L
f = 10 MHz
Crosstalk
R = 50 W
L
1.65−5.5
−54
f = 10 MHz
BW
−3 dB Bandwidth
R = 50 W
1.65−5.5
250
MHz Figure 10
%
L
THD
Total Harmonic
R = 600 W
L
5.0
0.011
Distortion (Note 8)
0.5 V
P−P
f = 600 Hz to 20 kHz
CAPACITANCE (Note 11)
Figure
Number
Symbol
Parameter
Test Conditions
= 0 V
Typ
Max
Unit
pF
C
C
C
Select Pin Input Capacitance
V
CC
V
CC
V
CC
2.3
6.5
IN
B Port Off Capacitance
= 5.0 V
= 5.0 V
pF
Figure 8
Figure 9
IO−B
IOA−ON
A Port Capacitance when Switch is Enabled
18.5
pF
8. Guaranteed by Design.
9. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
10.Off Isolation = 20 log [V /V ].
10
A
Bn
11. T = +25°C, f = 1 MHz, Capacitance is characterized but not tested in production.
A
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4
NLAS9031
APPENDIX A
DC ELECTRICAL EXTENDED AUTOMOTIVE TEMPERATURE RANGE CHARACTERISTICS
T = +255C
T = −555C to +1255C
A
A
V
(V)
CC
Min
Typ
Max
Min
Max
Symbol
Parameter
HIGH Level
Input Voltage
Test Conditions
Unit
V
IH
1.65−1.95
2.3−5.5
0.75 V
V
CC
CC
0.7 V
V
IL
LOW Level
Input Voltage
1.65−1.95
2.3−5.5
0.25 V
0.3 V
V
CC
CC
I
I
Input Leakage Current 0 v V v 5.5 V
0−5.5
"0.05 "0.1
"0.05 "0.1
"1
"1
mA
mA
IN
IN
OFF State Leakage
Current
0 vA, B v V
1.65−5.5
OFF
CC
R
ON
Switch On Resistance
(Note 12)
V
= 0 V, I = 30 mA
4.5
3.0
5.0
7.0
8.5
13.0
15.0
W
IN
O
V
IN
= 2.4 V, I = −30 mA
O
V
IN
= 4.5 V, I = −30 mA
O
V
= 0 V, I = 24 mA
3.0
2.3
4.0
10
11
20
IN
O
V
IN
= 3 V, I = −24 mA
O
V
IN
= 0 V, I = 8 mA
5.0
13
12
30
O
V
IN
= 2.3 V, I = −8 mA
O
V
= 0 V, I = 4 mA
1.65
5.5
6.5
17
20
50
IN
O
V
IN
= 1.65 V, I = −4 mA
O
I
Quiescent Supply
Current
V
IN
= V or GND
1.0
10
mA
CC
CC
All Channels ON or
I
= 0
OUT
OFF
Analog Signal Range
V
CC
0
V
CC
0
V
CC
V
R
RANGE
On Resistance
Over Signal Range
(Note 12) (Note 14)
I = −30 mA, 0 v V v V
4.5
3.0
25
W
A
Bn
CC
CC
I = −24 mA, 0 v V v V
A Bn
I = −8 mA, 0 v V
50
A
Bn
v V
CC
I = −4 mA, 0 v V
2.3
100
300
A
Bn
v V
CC
1.65
12.Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower
of the voltages on the two (A or B Ports).
13.Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions.
14.Guaranteed by Design.
* For DRON, RFLAT, Q, OIRR, Xtalk, BW, THD, and CIN see −405C to 855C section.
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5
NLAS9031
APPENDIX A
AC ELECTRICAL EXTENDED AUTOMOTIVE TEMPERATURE RANGE CHARACTERISTICS
T = +255C
T = −555C to +1255C
A
A
V
(V)
Figure
Number
CC
Min Typ Max
Min
Max
Symbol
Parameter
Test Conditions
V = OPEN
Unit
t
t
Propagation Delay
Bus to Bus (Note 16)
1.65−1.95
2.3−2.7
3.0−3.6
4.5−5.5
ns
Figures
2, 3
PHL
PLH
I
1.2
0.8
0.3
t
t
Output Enable Time
Turn On Time
V = 2 V for t
1.65−1.95
2.3−2.7
3.0−3.6
4.5−5.5
23
13
6.9
7.0
3.5
2.5
1.7
24
14
9.0
ns
ns
ns
Figures
2, 3
PZL
PZH
I
CC
PZL
V = 0 V for t
I
PZH
(A to B )
n
5.2
7.0
t
t
Output Disable Time V = 2 V for t
Turn Off Time
(A Port to B Port)
1.65−1.95
2.3−2.7
3.0−3.6
4.5−5.5
12.5
7.0
5.0
3.5
3.0
2.0
1.5
0.8
13
7.5
6.5
5.0
Figures
2, 3
PLZ
PHZ
I
CC
PLZ
V = 0 V for t
I PHZ
t
Break Before Make
Time (Note 15)
1.65−1.95
2.3−2.7
3.0−3.6
4.5−5.5
0.5
0.5
0.5
0.5
Figure 4
B−M
15.Guaranteed by Design.
16.This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
* For DRON, RFLAT, Q, OIRR, Xtalk, BW, THD, and CIN see −405C to 855C section.
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6
NLAS9031
AC LOADING AND WAVEFORMS
V
I
RU
FROM
NOTE: Input driven by 50 W source terminated in 50 W
NOTE: C includes load and stray capacitance
OUTPUT
UNDER
TEST
RD
L
C
L
NOTE: Input PRR = 1.0 MHz; t = 500 ns
W
Figure 2. AC Test Circuit
t = 2.5 ns
t = 2.5 ns
r
f
V
CC
90%
50%
90%
t = 2.5 ns
r
t = 2.5 ns
f
SELECT
INPUT
V
CC
50%
90%
50%
90%
50%
SWITCH
INPUT
10%
10%
GND
t
t
t
PZL
PLZ
10%
10%
V
TRI
GND
t
W
t
t
PHL
PLH
OUTPUT
OUTPUT
50%
t
V
+ 0.3 V
V
OH
OL
V
OL
OUTPUT
50%
50%
PZH
PHZ
V
OH
V
OL
V
OH
− 0.3 V
50%
V
TRI
Figure 3. AC Waveforms
V
IN
LOGIC
INPUT
A
B
0
V
OUT
B
S
1
R
L
C
L
V
OUT
0.9 × V
OUT
LOGIC
INPUT
t
D
Figure 4. Break Before Make Interval Timing
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NLAS9031
AC LOADING AND WAVEFORMS
LOGIC
R
OFF
ON
OFF
DV
GEN
A
V
B
S
OUT
INPUT
N
R
C
L
OUT
V
L
GE
V
OUT
W
1 M
100 pF
Q = (DV
)(C )
LOGIC
INPUT
OUT
L
Figure 5. Charge Injection Test
10 nF
10 nF
Signal
Generator
0 dBm
V
CC
V
CC
A
B
B
A
B
0
50 W
50 W
LOGIC INPUT
S
0 V or V
1
IH
50 W
S
N
Analyzer
Analyzer
GND
GND
50 W
Figure 6. Off Isolation
Figure 7. Crosstalk
10 nF
10 nF
Capacitance
V
CC
V
CC
Meter
A
B
A
B
LOGIC INPUT
0 V or V
LOGIC INPUT
0 V or V
f = 1 MHz
Capacitance
Meter
S
S
CC
CC
f = 1 MHz
N
N
GND
GND
Figure 8. Channel Off Capacitance
Figure 9. Channel On Capacitance
10 nF
Signal
Generator
0 dBm
V
CC
A
B
N
50 W
S
LOGIC INPUT
0 V or V
GND
CC
Figure 10. Bandwidth
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NLAS9031
PACKAGE DIMENSIONS
SC−88/SOT−363/SC−70
DF SUFFIX
CASE 419B−02
ISSUE W
NOTES:
D
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B−01 OBSOLETE, NEW STANDARD 419B−02.
e
MILLIMETERS
DIM MIN NOM MAX MIN
0.80
INCHES
NOM MAX
1.10 0.031 0.037 0.043
0.10 0.000 0.002 0.004
0.008 REF
6
1
5
2
4
3
A
0.95
0.05
H
E
−E−
A1 0.00
A3
0.20 REF
0.21
0.14
2.00
1.25
0.65 BSC
0.20
2.10
b
C
D
E
e
0.10
0.10
1.80
1.15
0.30 0.004 0.008 0.012
0.25 0.004 0.005 0.010
2.20 0.070 0.078 0.086
1.35 0.045 0.049 0.053
0.026 BSC
0.30 0.004 0.008 0.012
2.20 0.078 0.082 0.086
b 6 PL
L
0.10
2.00
M
M
0.2 (0.008)
E
H
E
A3
C
A
A1
L
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
mm
ǒinches
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
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9
NLAS9031
PACKAGE DIMENSIONS
WDFN6 1.2x1.0, 0.4P
CASE 506AS−01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
D
A
B
E
MILLIMETERS
PIN ONE
DIM
A
MIN
0.70
0.00
MAX
0.80
0.05
REFERENCE
A1
A3
b
0.20 REF
2X
0.10 C
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
D
E
e
2X
0.10
0.10
C
L
0.30
0.40
0.40
0.50
L1
C
A3
A
MOUNTING FOOTPRINT*
6X
0.42
6X
0.22
7X
0.08
C
A1
SEATING
PLANE
C
4X
e
5X
L
1
3
L1
0.40
PITCH
1.07
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
MountingTechniques Reference Manual, SOLDERRM/D.
6
4
b 6X
0.10
C
C
A
B
BOTTOM VIEW
NOTE 3
0.05
ON Semiconductor and
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NLAS9031/D
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