NLAS9041DFT2G [ONSEMI]

1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO6, LEAD FREE, MO-220VEED-6, SOT-363, SC-70, SC-88, 6 PIN;
NLAS9041DFT2G
型号: NLAS9041DFT2G
厂家: ONSEMI    ONSEMI
描述:

1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO6, LEAD FREE, MO-220VEED-6, SOT-363, SC-70, SC-88, 6 PIN

光电二极管
文件: 总9页 (文件大小:157K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NLAS9041  
SPDT, 1 W RON Switch  
The NLAS9041 is a low R SPDT analog switch. This device is  
ON  
designed for low operating voltage, high current switching of speaker  
output for cell phone applications. It can switch a balanced stereo  
output. The NLAS9041 can handle  
a
balanced  
microphone/speaker/ringtone generator in a monophone mode. The  
device contains a breakbeforemake (BBM) feature.  
http://onsemi.com  
Features  
Single Supply Operation:  
1
1.65 V to 5.5 V V  
CC  
Function Directly from LiON Battery  
Tiny SC88 6Pin PbFree Package:  
Meets JEDEC MO220 Specifications  
SC88 (SOT363)  
CASE 419B  
MARKING DIAGRAM  
R Typical = 0.8 @ V = 4.5 V  
ON  
CC  
6
Low Static Power  
This is a PbFree Device  
AN M  
Typical Applications  
1
Cell Phone Speaker/Microphone Switching  
RingtoneChip/Amplifier Switching  
Stereo Balanced (PushPull) Switching  
AN  
M
= Specific Device Code  
= Date Code  
G or G = PbFree Package  
Important Information  
RingtoneChip/Amplifier Switching  
PIN ASSIGNMENTS  
Continuous Current Rating Through each Switch 300 mA  
Conforms to: JEDEC MO220, Issue H, Variation VEED6  
Pin for Pin Compatible with FSA9041  
1
2
3
6
5
4
B1  
GND  
B0  
S
V
A
CC  
(Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 8 of this data sheet.  
© Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
April, 2007 Rev. 0  
NLAS9041/D  
NLAS9041  
A
B0  
B1  
S
Figure 1. Input Equivalent Circuit  
TRUTH TABLE  
PIN DESCRIPTION  
Pin Name  
A, B0, B1  
S
Description  
Control Input  
Function  
Data Ports  
L
B0 Connected to A  
B1 Connected to A  
Control Input  
H
H = HIGH Logic Level.  
L = LOW Logic Level.  
MAXIMUM RATINGS  
Symbol  
Rating  
Value  
Unit  
V
V
V
V
Positive DC Supply Voltage  
0.5 to +6.0  
CC  
IS  
Analog Input Voltage (V , V , or V  
)
0.5 to V +0.5  
V
NO NC  
COM  
CC  
Digital Select Input Voltage  
0.5 to +6.0  
300  
V
IN  
I
I
I
Continuous DC Current from COM to NC/NO  
mA  
mA  
mA  
anl1  
anlpk1  
clmp  
Peak Current from COM to NC/NO, 10 Duty Cycles (Note 1)  
500  
Continuous DC Current into COM/NC/NO with respect to V or GND  
100  
CC  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. Defined as 10% ON, 90% off duty cycle.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Rating  
Min  
1.65  
0
Max  
Unit  
V
V
V
V
Positive DC Supply Voltage  
5.5  
CC  
IS  
Analog Input Voltage (A, B0, B1)  
Digital Select Input Voltage (S)  
Operating Temperature Range  
Input Rise or Fall Time, SELECT  
V
V
CC  
CC  
0
V
V
IN  
T
A
40  
85  
°C  
ns/V  
t , t  
V
CC  
V
CC  
= 3.0 V  
= 5.5 V  
20  
10  
r
f
http://onsemi.com  
2
NLAS9041  
DC ELECTRICAL CHARACTERISTICS  
T
A
= +25°C  
T = 40°C to +85°C  
A
V
CC  
(V)  
Min  
Typ  
Max  
Min  
Max  
Symbol  
Parameter  
Test Conditions  
Unit  
V
IH  
HIGH Level  
Input Voltage  
2.7  
4.5  
2.0  
2.4  
V
V
IL  
LOW Level  
Input Voltage  
2.7  
4.5  
0.6  
0.8  
V
I
I
Input Leakage Current  
0 v V v 5.5 V  
05.5  
0.1  
1
A
IN  
IN  
OFF State Leakage  
Current (Note 7)  
0 v A, B v V  
5.5  
2.0  
4.0  
+2.0  
20  
nA  
OFF  
CC  
I
ON State Leakage  
Current (Note 7)  
0 v A, B v V  
5.5  
2.7  
4.5  
5.5  
+4.0  
4.0  
40  
4.3  
1.3  
1.0  
nA  
ON  
CC  
R
Switch On Resistance  
(Note 2)  
I
= 100 mA,  
2.0  
0.8  
ON  
O
0
B or B = 3.5 V  
1
I
= 100 mA,  
1.15  
0.5  
O
0
B or B = 1.5 V  
1
I
Quiescent Supply  
Current  
All Channels ON or OFF  
V
IN  
= V or GND, I = 0  
OUT  
A
CC  
CC  
Analog Signal Range  
R
On Resistance Match  
Between Channels  
(Notes 2, 3, 4)  
I
= 100 mA,  
2.7  
4.5  
0.15  
0.12  
ON  
A
B or B = 1.5 V  
0
1
I
= 100 mA,  
0.15  
0.4  
A
B or B = 3.5 V  
0
1
R
On Resistance  
Flatness (Notes 2, 3, 5)  
I
= 100 mA,  
0 1  
= 100 mA,  
2.7  
4.5  
1.4  
0.3  
flat  
A
B or B = 0 V, 0.75 V, 1.5 V  
I
A
B or B = 0 V, 1.0 V, 2.0 V  
0
1
2. Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower  
of the voltages on the two (A or B Ports).  
3. Parameter is characterized but not tested in production.  
4. DR = R max R min measured at identical V , temperature and voltage levels.  
ON  
ON  
ON  
CC  
5. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions.  
6. Guaranteed by Design.  
7. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On  
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).  
http://onsemi.com  
3
NLAS9041  
AC ELECTRICAL CHARACTERISTICS  
T
= +25°C  
T = 40°C to +85°C  
A
A
V
(V)  
Figure  
#
CC  
Min  
Typ  
Max  
Min  
Max  
Symbol  
Parameter  
Test Conditions  
V = OPEN  
Unit  
t
t
Propagation Delay  
BustoBus (Note 9)  
2.7  
4.5  
2.0  
0.3  
ns  
3, 4  
PHL  
PLH  
I
t
t
t
Output Enable Time  
Turn On Time  
B or B = 1.5 V,  
2.7  
4.5  
30  
20  
35  
25  
ns  
ns  
ns  
3, 4  
ON  
0
1
R = 50 , C = 35 pF  
L
L
(A to B )  
B or B = 3.0 V,  
n
0 1  
R = 50 , C = 35 pF  
L
L
Output Disable Time  
Turn Off Time  
(A Port to B Port)  
B or B = 1.5V,  
2.7  
4.5  
20  
15  
25  
20  
3, 4  
2
OFF  
BBM  
0
1
R = 50 , C = 35 pF  
L
L
B or B = 3.0 V,  
0 1  
R = 50 , C = 35 pF  
L
L
Break Before Make Time  
(Note 8)  
2.7  
4.5  
0.5  
0.5  
0.5  
0.5  
Q
O
Charge Injection  
(Note 8)  
C = 1.0 nF, V  
GEN  
= 0 V  
2.7  
4.5  
26  
48  
pC  
dB  
6
5
7
8
9
L
GEN  
R
= 0 ꢀ  
Off Isolation (Note 10)  
R = 50  
2.7 −  
5.5  
52  
57  
40  
IRR  
L
f = 1.0 MHz  
X
talk  
Crosstalk  
R = 50  
2.7 −  
5.5  
dB  
L
f = 1.0 MHz  
BW  
3 dB Bandwidth  
R = 50  
L
2.7 −  
5.5  
MHz  
%
THD  
Total Harmonic  
Distortion (Note 8)  
R = 600  
2.7 −  
5.5  
0.012  
L
0.5 V  
PP  
f = 20 Hz to 20 kHz  
8. Guaranteed by Design.  
9. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On  
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).  
10.Off Isolation = 20 log [V /V ].  
10  
A
Bn  
CAPACITANCE (Note 11)  
Figure  
#
Symbol  
Parameter  
Test Conditions  
= 0 V, f = 1 MHz  
= 4.5 V, f = 1 MHz  
= 4.5 V, f = 1 MHz  
Typ  
10  
Max  
Unit  
pF  
C
C
C
Select Pin Input Capacitance  
V
CC  
V
CC  
V
CC  
IN  
B Port Off Capacitance  
25  
pF  
IOB  
IOAON  
A Port Capacitance when Switch is Enabled  
87  
pF  
11. T = +25°C, f = 1 MHz, Capacitance is characterized but not tested in production.  
A
http://onsemi.com  
4
NLAS9041  
V
CC  
DUT  
Input  
V
Output  
50  
CC  
GND  
V
OUT  
0.1 F  
t
BMM  
35 pF  
90%  
90% of V  
OH  
Output  
Switch Select Pin  
GND  
Figure 2. tBBM (Time BreakBeforeMake)  
V
CC  
Input  
50%  
50%  
90%  
DUT  
0 V  
V
CC  
Output  
50  
V
OUT  
V
0.1 F  
OH  
Open  
90%  
35 pF  
Output  
V
OL  
Input  
t
t
OFF  
ON  
Figure 3. tON/tOFF  
V
CC  
V
CC  
Input  
50%  
50%  
DUT  
0 V  
50  
Output  
V
OUT  
V
OH  
Open  
35 pF  
Output  
V
10%  
10%  
OL  
Input  
t
t
ON  
OFF  
Figure 4. tON/tOFF  
http://onsemi.com  
5
NLAS9041  
50  
DUT  
Reference  
Input  
50 Generator  
Transmitted  
Output  
50  
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is  
the bandwidth of an On switch. V , Bandwidth and V are independent of the input signal direction.  
ISO  
ONL  
V
OUT  
= Off Channel Isolation = 20 Log ǒ Ǔ for V  
V
V
at 100 kHz  
IN  
ISO  
V
IN  
OUT  
V
= On Channel Loss = 20 Log ǒ Ǔ for V  
at 100 kHz to 50 MHz  
ONL  
IN  
V
IN  
Bandwidth (BW) = the frequency 3 dB below V  
= Use V setup and test to all other switch analog input/outputs terminated with 50  
ONL  
V
CT  
ISO  
Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk  
(On Channel to Off Channel)/VONL  
DUT  
V
CC  
V
IN  
Output  
Open  
GND  
C
L
Output  
Off  
V  
OUT  
Off  
On  
V
IN  
Figure 6. Charge Injection: (Q)  
http://onsemi.com  
6
NLAS9041  
0
10  
20  
30  
40  
50  
60  
70  
80  
0
2  
4  
6  
8  
10  
12  
0.1  
1.0  
10  
100  
1000  
0.1  
1.0  
10  
100  
1000  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
Figure 7. Cross Talk vs. Frequency  
@ VCC = 4.5 V  
Figure 8. Bandwidth vs. Frequency  
0.005  
0.0045  
0.004  
0.0035  
0.003  
0.0025  
0.002  
0.0015  
0.001  
0.0005  
0
2.5  
2
25°C  
85°C  
40°C  
1.5  
1
0.5  
0
10  
100  
1000  
10000  
100000  
0.0  
0.5  
1.0  
1.5  
(V)  
2.0  
2.5  
3.0  
FREQUENCY (Hz)  
V
IN  
Figure 9. Total Harmonic Distortion  
Figure 10. OnResistance vs. Input Voltage  
@ VCC = 2.7 V  
1
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
2.5  
2.0  
85°C  
25°C  
2.7 V  
1.5  
1.0  
0.5  
0
3.0 V  
3.6 V  
40°C  
4.5 V  
0.1  
0
0.0 0.5  
1.0 1.5  
2.0 2.5  
(V)  
3.0 3.5 4.0  
4.5  
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0  
V
IN  
V
IN  
(V)  
Figure 11. OnResistance vs. Input Voltage  
Figure 12. OnResistance vs. Input Voltage  
@ VCC = 4.5 V  
http://onsemi.com  
7
NLAS9041  
DEVICE ORDERING INFORMATION  
Circuit  
Device Nomenclature  
Device  
Package Tape & Reel  
Indicator  
Function  
Suffix  
Suffix  
Technology  
Device Order Number  
Package Type  
Tape & Reel Size  
3000 / Tape & Reel  
NLAS9041DFT2G  
NL  
AS  
9041  
DFT  
2
SC88  
(PbFree)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
http://onsemi.com  
8
NLAS9041  
PACKAGE DIMENSIONS  
SC88/SC706/SOT363  
CASE 419B02  
ISSUE W  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. 419B01 OBSOLETE, NEW STANDARD 419B02.  
D
e
MILLIMETERS  
DIM MIN NOM MAX  
0.80  
INCHES  
NOM MAX  
1.10 0.031 0.037 0.043  
0.10 0.000 0.002 0.004  
0.008 REF  
MIN  
A
0.95  
0.05  
A1 0.00  
6
1
5
2
4
3
A3  
0.20 REF  
0.21  
0.14  
2.00  
1.25  
b
C
D
E
e
0.10  
0.10  
1.80  
1.15  
0.30 0.004 0.008 0.012  
0.25 0.004 0.005 0.010  
2.20 0.070 0.078 0.086  
1.35 0.045 0.049 0.053  
0.026 BSC  
H
E−  
E
0.65 BSC  
L
0.10  
2.00  
0.20  
2.10  
0.30 0.004 0.008 0.012  
2.20 0.078 0.082 0.086  
H
E
b 6 PL  
M
M
0.2 (0.008)  
E
A3  
SOLDERING FOOTPRINT*  
C
0.50  
0.0197  
A
A1  
L
0.65  
0.025  
0.65  
0.025  
0.40  
0.0157  
1.9  
0.0748  
mm  
inches  
ǒ
Ǔ
SCALE 20:1  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81357733850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NLAS9041/D  

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