RT8800PS_技术文档

RT8800/B

General Purpose 2/3-Phase PWM Controller for High-Density

Power Supply

General Description

Features

^ꢀ5V Power Supply Voltage

The RT8800/B are general purpose multi-phase

synchronous buck controllers dedicating for high density

power supply regulation. The parts implement 2, and 3

buck switching stages operating in interleaved phase set

automatically. The output voltage is regulated and

controlled following the input voltage of FB pin. With such

a single analog control, the RT8800/B provide a simple,

flexible, wide-range and extreme cost-effective high-

density voltage regulation solutions for various high-density

power supply application. The RT8800/B multi-phase

architecture provide high output current while maintaining

low power dissipation on power devices and low stress

on input and output capacitors. The high equivalent

operating frequency also reduces the component

dimension and the output voltage ripple in load transient.

^ꢀ2/3-Phase Power Conversion with Automatic Phase

Selection (RT8800 : 2/3-Phase, RT8800B : 2-Phase)

^ꢀOutput Voltage Controlled by External Reference

Voltage

^ꢀPrecise Core Voltage Regulation

^ꢀPower Stage Thermal Balance by DCR Current

Sensing

^ꢀExtreme Low-Cost, Lossless Time Sharing Current

Sensing

^ꢀInternal Soft-start

^ꢀHiccup Mode Over-Current Protection

ꢀ Over-Voltage Protection

ꢀ Adjustable Operating Frequency and Typical at

300kHz Per Phase

RT8800/B implement both voltage and current loops to

achieve good regulation, response and power stage

thermal balance. The RT8800/B apply the time sharing

DCR current sensing technology newly as well; with such

a topology, the RT8800/B extract the DCR of output

inductor as sense component to deliver a more precise

load line regulation and better thermal balance capability.

Moreover, the parts monitor the output voltage for over-

current and over-voltage protection; Soft-start and

programmable under-voltage lockout are also provided to

assure the safety of power system.

ꢀ Power Good indication

ꢀ Small 16-Lead VQFN Package (For RT8800 only)

ꢀ RoHS Compliant and 100% Lead (Pb)-Free

Ordering Information

RT8800/B

Package Type

QV : VQFN-16L 3x3 (V-Type)

S : SOP-16

Operating Temperature Range

P : Pb Free with Commercial Standard

G : Green (Halogen Free with Commer-

cial Standard)

Applications

ꢀ Desktop CPU core power

2-Phase

2/3-Phase

ꢀ Low Output Voltage, High power density DC-DC

Converters

Note :

ꢀ Voltage Regulator Modules

ꢀ

RichTek Pb-free and Green products are :

`RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

Marking Information

`Suitable for use in SnPb or Pb-free soldering processes.

`100% matte tin (Sn) plating.

For marking information, contact our sales representative

directly or through a RichTek distributor located in your

area, otherwise visit our website for detail.

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1

RT8800/B

Pin Configurations

(TOP VIEW)

16 15 14 13

16

15

14

13

12

VDD

DACFB

DACQ

FB

DVD

COMP

PI

PWM2

PWM1

N/C

2

3

4

5

DACFB

DACQ

FB

ISP1

12

11

10

9

1

2

3

4

ISP2

GND

ISP1

ISP3

ISP2

PGOOD

GND

DVD

PGOOD

6

7

8

11

10

9

5

6

7

8

RT

ICOMMON

SOP-16

VQFN-16L 3x3

RT8800

RT8800B

Functional Pin Description

ICOMMON

DACFB

Common negative input of current sense amplifiers for all

three channels.

Negative input of internal buffer amplifier for reference

voltage regulation. The pin voltage is locked at internal

V_REF= 0.8V by properly close the buffer amplifier feedback

loop.

PGOOD

Output power-good indication. The signal is implemented

as an output signal with open-drain type.

DACQ

The pin is defined as the output of internal buffer amplifier

for reference voltage regulation.

ISP1 , ISP2 , ISP3

Current sense positive inputs for individual converter

channel current sense.

FB

The pin is defined as the inverting input of internal error

amplifier.

PWM1 , PWM2 , PWM3

PWM outputs for each phase switching drive.

DVD

VDD

The pin is defined as a programmable power UVLO

detection input. Trip threshold = 0.8V at V_DVDrising.

Chip power supply. Connect this pin to a 5V supply.

GND

COMP

Chip power ground.

The pin is defined as the output of the error amplifier and

the input of all PWM comparators.

Exposed Pad (RT8800)

PI

Exposed pad should be soldered to PCB board and

connected to GND.

The pin is defined as the positive input of the error amplifier.

RT

Switching frequency setting. Connect this pin toGNDwith

a resistor to set the frequency.

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DS8800/B-06 March 2007

RT8800/B

Typical Application Circuit

(Note : The inductor’ s DCR value must be large than 0.3mΩ

: X7R/R-type capacitor is required for all time constant setting capacitor of DCR sensing.)

13

15 PWM1

ISP1

1

9

8

VDD

ICOMMON

RT

4

FB

6

5

COMP

DVD

Figure A. 2-phase with resistive DAC

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RT8800/B

N C

D V D

E T 2 L G A

2 C C P V

A T G E L 1

1 C C P V

S E 2 P H A

A S H E P 1

E T 2

U G A

E T 1

U G A

12

8

13 PWM1

ISP1

16

VDD

ICOMMON

RT

3

7

FB

5

4

COMP

DVD

Figure B. 3-phase with resistive DAC

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DS8800/B-06 March 2007

RT8800/B

N C

D V D

E T 2 L G A

2 C C P V

A T G E L 1

1 C C P V

E S 2 P H A

A S H E P 1

E T 2

U G A

E T 1

U G A

12

8

13 PWM1

ISP1

16

VDD

ICOMMON

RT

3

7

FB

5

4

COMP

DVD

Figure C. 3-phase with RT9401A/B DAC generator

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RT8800/B

Function Block Diagram

x

M u

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DS8800/B-06 March 2007

RT8800/B

Table. Output Voltage Program

VID5

VID4

VID3

VID2

VID1

VID0

Nominal Output Voltage (V)

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1.0800

1.1000

1.1125

1.1250

1.1375

1.1500

1.1625

1.1750

1.1875

1.2000

1.2125

1.2250

1.2375

1.2500

1.2625

1.2750

1.2875

1.3000

1.3125

1.3250

1.3375

1.3500

1.3625

1.3750

1.3875

1.4000

1.4125

1.4250

1.4375

1.4500

1.4625

1.4750

1.4875

1.5000

1.5125

1.5250

1.5375

1.5500

To be continued

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RT8800/B

Table. Output Voltage Program

VID5

VID4

VID3

VID2

VID1

VID0

Nominal Output Voltage (V)

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1.5625

1.5750

1.5875

1.6000

1.6250

1.6500

1.6750

1.7000

1.7250

1.7500

1.7750

1.8000

1.8250

1.8500

1

0

1

Note: 1 : Open

0 : V_SSor GND

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8

RT8800/B

Absolute Maximum Ratings (Note 1)

ꢀ Supply Voltage, V_DD------------------------------------------------------------------------------------------- 7V

ꢀ Input, Output or I/O Voltage ---------------------------------------------------------------------------------- GND− 0.3V to V_DD+ 0.3V

ꢀ Power Dissipation, P_D@ T_A= 25°C

VQFN-16L3X3 -------------------------------------------------------------------------------------------------- 1.47W

SOP-16 ----------------------------------------------------------------------------------------------------------- 1W

ꢀ Package Thermal Resistance (Note 4)

VQFN-16L 3X3, θ_JA--------------------------------------------------------------------------------------------- 68°C/W

SOP-16, θ_JA----------------------------------------------------------------------------------------------------- 100°C/W

ꢀ Junction Temperature ------------------------------------------------------------------------------------------ 150°C

ꢀ Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------- 260°C

ꢀ Storage Temperature Range --------------------------------------------------------------------------------- −65°C to 150°C

ꢀ ESD Susceptibility (Note 2)

HBM (Human Body Mode) ----------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ------------------------------------------------------------------------------------------- 200V

Recommended Operating Conditions (Note 3)

ꢀ Supply Voltage, V_DD------------------------------------------------------------------------------------------- 5V 10%

ꢀ Ambient Temperature Range--------------------------------------------------------------------------------- 0°C to 70°C

ꢀ Junction Temperature Range--------------------------------------------------------------------------------- 0°C to 125°C

Electrical Characteristics

(V_DD= 5V, T_A= 25°C, unless otherwise specified)

Parameter

Symbol

Test Conditions

Min

Typ

Max Units

V

DD

Supply Current

Nominal Supply Current

PWM 1,2,3 Open

--

5

--

mA

I

DD

Power-On Reset

Rising

4.0

0.2

0.75

--

4.2

0.5

0.8

65

4.5

--

V

DD

Threshold

Hysteresis

DVD Rising Threshold

DVD Hysteresis

0.85

--

V

mV

Oscillator

Free Running Frequency

Frequency Adjustable Range

Ramp Amplitude

170

50

--

200

--

230

400

--

kHz

V

f

R

= 16kΩ

OSC

RT

OSC_ADJ

1.7

1.0

66

ΔV

OSC

Ramp Valley

--

V

RV

Maximum On-Time of Each Channel

Minimum On-Time of Each Channel

RT Pin Voltage

62

--

75

--

%

120

0.82

ns

V

0.77

0.87

V

R

= 16kΩ

RT

To be continued

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RT8800/B

Parameter

Reference Voltage

DACFB Sourcing Capability

Error Amplifier

Symbol

Test Conditions

Min

Typ

Max

Units

0.79

--

0.8

--

0.81

10

V

DACFB

mA

DC Gain

--

65

10

8

--

dB

Gain-Bandwidth Product

Slew Rate

GBW

SR

C = 10pF

MHz

V/μs

L

C = 10pF

L

Current Sense GM Amplifier

Recommended Full Scale Source Current

--

100

190

--

μA

OCP trip level

I

160

220

OCP

Protection

Over-Voltage Trip (V - V

)

--

500

--

mV

FB

DACQ

Power Good

PGOOD Output Low Voltage

PGOOD Delay

V

I

= 4mA

--

4

--

0.2

8

V

PGOOD

T

90% * V

to PGOOD_H

ms

PGOOD_Delay

OUT

Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may remain possibility to affect device reliability.

Note 2. Devices are ESD sensitive. Handling precaution recommended.

Note 3. The device is not guaranteed to function outside its operating conditions.

Note 4. θ_JAis measured in the natural convection at T_A= 25°C on a low effective thermal conductivity test board of

JEDEC 51-3 thermal measurement standard.

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RT8800/B

Typical Operating Characteristics

Efficiency vs. Output Current

Load Line

100

90

80

70

60

50

40

30

20

10

0

1.4

R_LL= 1.5mΩ, R_ICOMMON2= 10kΩ, R_DROOP= 100Ω

V_IN= 12V, V_OUT= 1.4V

V_IN= 12V

1.38

1.36

1.34

1.32

1.3

1.28

1.26

1.24

Driver RT9605

0

10 20 30 40 50 60 70 80 90 100

Output Current (A)

0

10 20 30 40 50 60 70 80 90 100

Output Current (A)

Frequency vs. R_RT

GM

1000

900

800

700

600

500

400

300

200

100

0

90

R_ICOMMON1= 430Ω

80

70

60

50

40

30

20

10

0

GM3

GM2

GM1

0

5

10 15 20 25 30 35 40 45 50 55 60

0

10 20 30 40 50 60 70 80 90 100 110

V_C(mV)

R_RT((kkΩ))

ٛ

V_REFvs. Temperature

OCP Trip Point vs. Temperature

0.815

0.81

240

210

180

150

120

90

0.805

0.8

0.795

0.79

60

0.785

0.78

30

0

-25 -10

5

20 35 50 65 80 95 110 125

-25

-10

5

20

35

50

65

80

95

Temperature (°C)

(°C)

Temperature

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RT8800/B

Frequency vs. Temperature

Load Transient Response

350

300

250

200

150

100

50

V_CORE

(200mV/Div)

UGATE1

(20V/Div)

UGATE2

(20V/Div)

UGATE3

(20V/Div)

R_RT= 16kΩ

phase 1, I_OUT= 5A to 85A @SR = 93A/us)

0

-25 -10

5

20 35 50 65 80 95 110 125

Time (2.5μs/Div)

Temperature (°C)

Load Transient Response

V_CORE

(200mV/Div)

V_CORE

(200mV/Div)

UGATE1

(20V/Div)

UGATE1

(20V/Div)

UGATE2

(20V/Div)

UGATE2

(20V/Div)

UGATE3

(20V/Div)

UGATE3

(20V/Div)

phase2, I_OUT= 5A to 85A @SR = 93A/us)

phase 3, I_OUT= 5A to 85A @SR = 93A/us)

Time (2.5μs/Div)

Over Current Protection

Short After Turn_On

Short While Turn_On

I_L1+I_L2

(50A/Div)

I_L1+I_L2

(50A/Div)

V_CORE

(1V/Div)

V_CORE

(1V/Div)

PWM1

(10V/Div)

V_COMP

(2V/Div)

V_COMP

(2V/Div)

Time (10ms/Div)

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RT8800/B

V_IDOn the Fly Falling

I_OUT= 5A

I_OUT= 90A

V_CORE

(50mV/Div)

PWM

(5V/Div)

PWM

(5V/Div)

V_CORE

(100mV/Div)

V_FB

(200mV/Div)

V_FB

(200mV/Div)

V_ID0

(2V/Div)

V_ID0

(2V/Div)

Time (25μs/Div)

V_IDOn the Fly Rising

I_OUT= 90A

I_OUT= 5A

PWM

(5V/Div)

PWM

(5V/Div)

V_CORE

(200mV/Div)

V_CORE

(200mV/Div)

V_FB

(200mV/Div)

V_FB

(200mV/Div)

V_ID0

(2V/Div)

V_ID0

(2V/Div)

Time (10μs/Div)

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RT8800/B

Application Information

duty width according to its magnitude above the ramp

signal. The output follows the ramp signal, SS. However

while V_OUTincreases, the difference between V_OUTand

SSE(SS − V_GS) is reduced and COMP leaves the

saturation and declines. The takeover of SS lasts until it

meets the COMP. During this interval, since the feedback

path is broken, the converter is operated in the open loop.

RT8800/B are multiphaseDC/DC controllers for extreme

low cost applications that precisely regulate CPU core

voltage and balance the current of different power channels

using time sharing current sensing method. The converter

consisting of RT8800/B and its companion MOSFET driver

RT96xx series provide high quality CPU power and all

protection functions to meet the requirement of modern

VRM.

3) Mode3 ( Cross-over< SS < V_GS+ V_REF

)

When the Comp takes over the non-inverting input for PWM

Amplifier and when SSE (SS − V_GS) < V_REF, the output of

the converter follows the ramp input, SSE (SS − V_GS).

Before the crossover, the output follows SS signal. And

when Comp takes over SS, the output is expected to follow

SSE (SS − V_GS). Therefore the deviation of V_GSis

represented as the falling of V_OUTfor a short while. The

COMP is observed to keep its decline when it passes the

cross-over, which shortens the duty width and hence the

falling of V_OUThappens.

Phase Setting and Converter Start Up

RT8800/B interface with companion MOSFET drivers (like

RT9602, RT9603, and RT9605) for correct converter

initialization. RT8800/B will sense the voltage on PWM

pins at the instant of POR rising. If the voltage is smaller

than (V_DD− 1.2V) the related channel is activated. Tie the

PWM to V_DDand the corresponding current sense pins to

GNDor left float if the channel is unused. For example, for

2-Channel application, tie PWM3 to V_DDand ISP3 toGND

(or let ISP3 open).

Since there is a feedback loop for the error amplifier, the

output’ s response to the ramp input, SSE (SS − V_GS) is

lower than that in Mode 2.

PGOOD Function and Soft Start

To indicate the condition of multiphase converter,

RT8800/B provide PGOODsignal through an open drain

connection. The output becomes high impedance after

internal SS ramp > 3.5V.

4) Mode 4 (SS > V_GS+ V_REF

)

When SS > V_GS+ V_REF, the output of the converter follows

the desired V_REFsignal and the soft start is completed

now.

Voltage Control

The voltage control loop consists of error amplifier,

multiphase pulse width modulator, driver and power

components. As conventional voltage mode PWM

controller, the output voltage is locked at the positive input

of error amplifier and the error signal is used as the control

signal of pulse width modulator. The PWM signals of

different channels are generated by comparison of EA

output and split-phase sawtooth wave. Power stage

transforms V_INto output by PWM signal on-time ratio.

COMP

V

RAMP_Valley

Cross-over

SS_Internal

V_CORE

SSE_Internal

1) Mode 1 (SS< Vramp_valley)

Output Voltage Program

Initially the COMP stays in the positive saturation. When

SS< V_{RAMP_Valley}, there is no non-inverting input available

to produce duty width. So there is no PWM signal and

V_OUTis zero.

The output voltage of a RT8800/B converter is programmed

to discrete levels between 1.08V and 1.85V. The voltage

identification (V_ID) pins program an external voltage

reference (DACQ) with a 6-bit digital-to-analog converter

(DAC). The level of DACQ also sets the OVP threshold.

The output voltage should not be adjusted while the

converter is delivering power. Remove input power before

2) Mode 2 (V_{RAMP_Valley}< SS< Cross-over)

When SS>V_{RAMP_Valley}, SS takes over the non-inverting

input and produce the PWM signal and the increasing

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DS8800/B-06 March 2007

RT8800/B

V_COREvs. Temperature

changing the output voltage. Adjusting the output voltage

during operation may trigger the over-voltage protection.

TheDAC function is a precision non-inverting summation

amplifier shown in Figure 1. The resistor values shown

are only approximations of the actual precision values

used.Grounding any combination of the V_IDpins increases

the DACQ voltage. The “open” circuit voltage on the V_ID

pins is the band gap reference voltage (V_REF= 0.8V).

1.38

1.375

1.37

CPU : P4-2.8G

_CORE= 1.35V

V

R = 1/3

1.365

1.36

1.355

1.35

R = 1/9

1.345

1.34

The Original R

R

V

VID0

VID1

VID2

VID3

VID4

VID5

REF

+

(0.8V)

R

V

OP

1.335

DACQ

-

30

35

40

45

50

55

60

65

70

V

DACFB

(°C)

Temperature

Figure 3

RF

R

RG

V_COREvs. Temperature

1.66

1.64

1.62

1.6

CPU : Celeron 2.0G

V_CORE= 1.55V

The Original R

Figure 1. The Structure ofDiscreteDACGenerator

DAC Design Guideline

In high temperature environment, V

becomes

CORE

unstable for the leakage current in VID pins is increasing.

The leakage will increase current consumption of CPU,

and then raise RT8800's V_DACQreference output, so does

R = 1/3

R = 1/9

1.58

1.56

1.54

1.52

V

voltage. Below are four comparison charts for

CORE

different CPUs.

Note: In Below Figure 2 to Figure 5, The Original R means

the resister values shown in typical application circuit.

R=1/3 and R=1/9 mean that The Original R is divided

by 3 or 9.

30

35

40

45

50

55

60

65

70

Temperature (°C)

Figure 4

V_COREvs. Temperature

1.68

1.64

1.63

1.62

1.61

1.6

CPU : P4-3.06G

V_CORE= 1.55V

CPU : P4-3.2G

V_CORE= 1.55V

The Original R

1.66

The Original R

1.64

1.62

R = 1/3

1.59

1.58

1.57

1.56

1.55

1.54

R = 1/3

1.6

1.58

R = 1/9

1.56

1.54

30

35

40

45

50

55

60

65

70

30

35

40

45

50

55

60

65

70

(°C)

Temperature

(°C)

Temperature

Figure 5

Figure 2

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RT8800/B

In order to maintain the V_DACQwithin 1% tolerance in the

worst case, the total driver current of the DAC regulator

should support up to 40mA. As the design of RT8800/B,

the maximum driving current of the internal OP is 10mA.

As shown in Figure 6, we suggest to add an external

transistor 2N3904 for higher current for V_DACregulation.

for switching, period = T^S

V^IN- V^O

⎡

⎢

⎤

⎥

V^O- (

) x T^S

DCR

V^IN

2L

I^X(S/H)= IL(AVG) -

x

⎢

RICOMMON1

⎢

⎣

⎥

⎦

V

CC

Falling Slope = Vo/L

Inductor Current

I

L

1.34k

V

I

VID0

VID1

VID2

VID3

VID4

VID5

REF

L(AVG)

+

VDACQ

(0.8V)

Q1

2N3904

645

310

OP

I

-

L(S/H)

VDACFB

43

162

81

PI

2.63k

121

PWM Signal & High Side MOSFET Gate Signal

Figure 6. Immune circuit against CPU Leakage Current

Current Sensing Setting

Low Side MOSFET Gate Signal

RT8800/B senses the current flowing through inductor

via itsDCR for channel current balance and droop tuning.

The differential sensing GM amplifier converts the

voltage on the sense component (can be a sense

resistor or the DCR of the inductor) to current signal

into internal circuit (see Figure 7).

Figure 8. Inductor current and PWM signal

Figure 9 is the test circuit for GM. We apply test signal at

GM inputs and observe its signal process output by PI

pin sinking current. Figure 10 shows the variation of signal

processing of all channels. We observe zero offsets and

good linearity between phases.

L

V

C

= R×C V = DCR×I

I =

X

C

L

DCR

R

ICOMMON1

L

DCR

C

L

DCR

I

L

C

R

+

-

V

C

+

-

ESR

+

-

V

C

V

ISPX

+

-

R

ICOMMON

GMx

R

ICOMMON1

GMx

I

1k

x

Figure 7. Current Sense Circuit

I

x

I^Lx DCR

Figure 9. The Test Circuit of GM

I^X=

The sensing circuit gets

feedback.

by local

RICOMMON1

I_Xis sampled and held just before low side MOSFET turns

off (Figure 8).

I^L(S/H)x DCR

R^ICOMMON1

V^OT^OFF

I^X(S/H)=

;I^L(S/H)= I^L(AVG)-

x

L

2

TOFF = (^{VIN - VO}) x TS

V^IN

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16

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RT8800/B

For some case with preferable current ratio instead of

current balance, the corresponding technique is provided.

Due to different physical environment of each channel, it

is necessary to slightly adjust current loading between

channels. Figure 12. shows the application circuit of GM

for current ratio requirement. Applying KVL along L+DCR

branch and R1+C//R2 branch:

GM

70

60

50

40

30

20

10

0

GM3

GM2

dI^L

dt

V^C

R2

dV^C

dt

⎛

⎜

⎞

⎟

L

+ DCR x I^L= R1

+ C

+ V^C

GM1

⎝

⎠

dV^CR1+ R2

= R1x C

For V^C=

+

V^C

dt

R2

R1+ R2

R2

DCR x IL

0

20

40

60

80

100

V_C(mV)

Figure 10. The Linearity of GMx

Look for its corresponding conditions:

dI^L

dt

L

+ DCR x I^L= (R1//R2) x C x DCR x

+ DCR x I^L

dt

Figure 11 shows the time sharing technique of GM

amplifier. We apply test signal at phase 3 and observe the

waveforms at both pins of GM amplifier. The waveforms

show time sharing mechanism and the perfomance ofGM

to hold both input pins equal when the shared time is on.

L

Let

= (R1//R2) x C

DCR

L

Thus if

= (R1//R2) x C

DCR

R2

Then VC =

x DCR x IL

Time Sharing of GM

R1+ R2

CH1:(2V/Div)

With internal current balance function, this phase would

share (R₁+R₂)/R₂times current than other phases.

Figure 13 &14 show different settings for the power stages.

CH2:(50mV/Div)

CH3:(50mV/Div)

PWM3

I

L

1.5uH

1m

V_ISP3

V_ICOMMON

V_ISP3

and

3k

1uF

3k

V_I

COMMON

Time (1μs/Div)

Figure 13. GM3 Setting for current ratio function

Figure 11

Current Ratio Setting

I

L

I

L

1.5uH

1m

L

DCR

C

1.5k

1uF

+

-

R1

V

C

Figure 14. GM1,2 Setting for current ratio function

R2

Figure 12. Application circuit for current ratio setting

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17

RT8800/B

L

DCR

C

Load Line without dead zone at light loads

1.31

1.3

1.29

1.28

1.27

1.26

1.25

1.24

1.23

ESR

+

-

V

C

V

ISPX

+

ICOMMON

-

R_ICOMMOM2open

R

ICOMMON1

GMx

Ix

R

ICOMMON2

R_ICOMMON2= 82k

Figure 15. Application circuit of GM

0

5

10

15

20

25

For load line design, with application circuit in Figure 15,

it can eliminate the dead zone of load line at light loads.

I_OUT(A)

V_ISPX= V_OUT+I_Lx DCR

Figure 16

if GM holds input voltages equal, then

V_ISPX= V_ICOMMON

Current Balance

RT8800/B senses the inductor current via inductor’ sDCR

for channel current balance and droop tuning. The

differential sensing GM amplifier converts the voltage on

the sense component (can be a sense resistor or the

DCR of the inductor) to current signal into internal balance

circuit.

V

I_L×DCR

ICOMMON

I_X

=

+

R_ICOMMON2R_ICOMMON1

V_OUT+I_L×DCR

R_ICOMMON2

I_L×DCR

R_ICOMMON1

+

The current balance circuit sums and averages the current

signals and then produces the balancing signals injected

to pulse width modulator. If the current of some power

channel is larger than average, the balancing signal

reduces that channels pulse width to keep current balance.

V_OUT

I_L×DCR

=

+

R_ICOMMON2R_ICOMMON2R_ICOMMON1

For the lack of sinking capability ofGM, R_ICOMMON2should

be small enough to compensate the negative inductor

valley current especially at light loads.

The use of singleGM amplifier via time sharing technique

to sense all inductor currents can reduce the offset errors

and linearity variation between GMs. Thus it can greatly

improve signal processing especially when dealing with

such small signal as voltage drop across DCR.

V

I ×DCR

ICOMMON

L

≥

R

ICOMMON1

ICOMMON2

Assume the negative inductor valley current is −5A at no

load, then for

Voltage Reference for Converter Output & Load Droop

The positive input of error amplifier is PI pin that sinks

current proportional to the sum of converter output current.

V_DRP= 2I_SINKx R_DRP. The load droop proportional to load

current can be set by the resistor between PI pin & external

V_DACQproduced by either buffer amplifier or other voltage

source. The PI pin voltage should be larger than 0.8V for

good droop circuit performance.

R_ICOMMON1= 330Ω, R_ADJ= 160Ω, V_OUT= 1.300

1.3V

-5A ×1mΩ

330Ω

≥

R

ICOMMON2

R_ICOMMON2≤ 85.8kΩ

Choose R_ICOMMON2= 82kΩ

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DS8800/B-06 March 2007

RT8800/B

Over Current Protection

-

FB

V

EA

PI

-

CH1:(5V/Div)

CH2:(5V/Div)

V

+

DACQ

+

DRP

I

SINK

2xI

X1

X2

X3

PWM

Figure 17. LoadDroop Circuit

DAC Offset Voltage Tuning

I_L

The Intel specification requires that at no load the nominal

output voltage of the regulator be offset to a value lower

than the nominal voltage corresponding to the V_IDcode.

The offset is tuning from RG in the DAC generator as

Figure 18.

Time (25ms/Div)

Figure 19. The Over Current Protection in the interval

R

V

VID0

VID1

VID2

VID3

VID4

VID5

REF

+

Over Current Protection

(0.8V)

R

VDACQ

OP

-

VDACFB

CH1:(5V/Div)

CH2:(5V/Div)

RF

R

RG

PWM

Figure 18. The Structure ofDiscreteDACGenerator

If VID0~6 is set at VSS (Ground), and to suppose that

shunt resistance is Rs.

V_SS

From below equation, we can tune the value of RG to

Time (25ms/Div)

increase or decrease the base voltage of V_DACQ

.

Figure 20. Over Current Protection at steady state

R^F

V^DACQ= (1+ ^RF) x V^REF+

x VREF

R^G

R^S

Fault Detection

Over Current Protection

The “hiccup mode” operation of over current protection

is adopted to reduce the short circuit current. The in-rush

current at the start up is suppressed by the soft start

circuit through clamping the pulse width and output voltage

by an internal slow rising ramp.

OCP comparator co\mpares each inductor current sensed

& sample/hold by current sense circuit with this reference

current(150uA). RT8800/B uses hiccup mode to eliminate

fault detection of OCP or reduce output current when

output is shorted to ground.

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19

RT8800/B

LC Filter Pole = 1.45kHz and

ESR Zero =3.98kHz

Design Procedure Suggestion

a.Output filter pole and zero (Inductor, output capacitor

value & ESR).

b. EA Compensation Network:

b.Error amplifier compensation & sawtooth wave amp-

litude (compensation network).

Select R1 = 4.7k, R2 = 15k, C1 = 12nF, C2 = 68pF

and use the Type 2 compensation scheme shown in

Figure 21. By calculation, the F_Z= 0.88kHz,

F_P= 322kHz and Middle Band Gain is 3.19 (i.e

10.07dB).

Current Loop Setting

a.GM amplifier S/H current (current sense component

DCR, ICOMMON pin external resistor value).

C2 68pF

b.Over-current protection trip point (R_ICOMMON1resistor).

C1

RB2

VRM Load Line Setting

15k

12nF

RB1

4.7k

-

a.Droop amplitude (PI pin resistor).

EA

+

b.No load offset (R_ICOMMON2

)

Figure 21. Type 2 compensation network of EA

Power Sequence & SS

DVD pin external resistor and SS pin capacitor.

2. Over-Current Protection Setting

PCB Layout

Consider the temperature coefficient of copper

3900ppm/°C,

a.Sense for current sense GM amplifier input.

b.Refer to layout guide for other items.

I_L×DCR

= 150μA

R_ICOMMON1

Voltage Loop Setting

Design Example

I_L×1.39mΩ

= 150μA

330Ω

I_L= 35.6A

Given:

Apply for four phase converter

V_IN= 12V

V_CORE= 1.5V

I_LOAD(MAX)= 100A

V_DROOP= 100mV at full load (1mΩ Load Line)

OCP trip point set at 35A for each channel (S/H)

DCR = 1mΩ of inductor at 25°C

L = 1.5μH

C_OUT= 8000μF with 5mΩ equivalent ESR.

1. Compensation Setting

a. ModulatorGain, Pole and Zero:

From the following formula:

Modulator Gain =V_IN/V_RAMP=12/2.4=5 (i.e 14dB)

where V_RAMP: ramp amplitude of saw-tooth wave

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20

DS8800/B-06 March 2007

RT8800/B

Layout Guide

Place the high-power switching components first, and separate them from sensitive nodes.

1. Most critical path:

The current sense circuit is the most sensitive part of the converter. The current sense resistors tied to ISP1,2,3 and

ICOMMONshould be located not more than 0.5 inch from the IC and away from the noise switching nodes. The PCB

trace of sense nodes should be parallel and as short as possible. R&C filter of choke should place close to PWM and

the R & C connect directly to the pin of each output choke, use 10 mil differencial pair, and 20 mil gap to other phase

pair. Less via as possible.

2. Switching ripple current path:

a. Input capacitor to high side MOSFET.

b. Low side MOSFET to output capacitor.

c. The return path of input and output capacitor.

d. Separate the power and signalGND.

e. The switching nodes (the connection node of high/low side MOSFET and inductor) is the most noisy points.Keep

them away from sensitive small-signal node.

f . Reduce parasitic R, L by minimum length, enough copper thickness and avoiding of via.

3. MOSFET driver should be closed to MOSFET.

L1

SW1

V

OUT

IN

R

IN

C

OUT

R

C_IN

L

V

L2

SW2

Figure 22. Power Stage Ripple Current Path

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21

RT8800/B

Next to IC

0.1uF

+12V or +5V

+12V

VCC

IN

PWM

RT

+5V

VCC

IN

C

BP

C

BOOT

BST

DRVH

SW

Next to IC

COMP

GND

L

O1

V_CORE

C

RT8800/B

C

R

OUT

ICOM

C

RT9603

DRVL

IN

R

C

ICOMMON

Locate next

to FB Pin

FB

PI

GND

R

FB

R

CSPx

Locate near MOSFETs

DRD

GND

Figure 23. Layout Consideration

Figure 24

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22

DS8800/B-06 March 2007

RT8800/B

Figure 25

Figure 26

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23

RT8800/B

Figure 27

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24

DS8800/B-06 March 2007

RT8800/B

Outline Dimension

SEE DETAIL A

D

D2

L

1

E

E2

1

2

1

2

e

b

DETAILA

A

A3

Pin #1 ID and Tie Bar Mark Options

A1

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

A

A1

A3

b

0.800

0.000

0.175

0.180

2.950

1.300

2.950

1.300

1.000

0.050

0.250

0.300

3.050

1.750

3.050

1.750

0.031

0.000

0.007

0.116

0.051

0.116

0.051

0.039

0.002

0.010

0.012

0.120

0.069

0.120

0.069

D

D2

E

E2

e

0.500

0.020

L

0.350

0.450

0.014

0.018

V-Type 16L QFN 3x3 Package

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25

RT8800/B

H

A

M

J

B

F

C

I

D

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

10.008

3.988

1.753

0.508

1.346

0.254

6.198

1.270

Min

Max

A

B

C

D

F

H

I

9.804

3.810

1.346

0.330

1.194

0.178

0.102

5.791

0.406

0.386

0.150

0.053

0.013

0.047

0.007

0.004

0.228

0.016

0.394

0.157

0.069

0.020

0.053

0.010

0.244

0.050

J

M

16–Lead SOP Plastic Package

Richtek Technology Corporation

Headquarter

Richtek Technology Corporation

Taipei Office (Marketing)

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

8F, No. 137, Lane 235, Paochiao Road, Hsintien City

Taipei County, Taiwan, R.O.C.

Tel: (8863)5526789 Fax: (8863)5526611

Tel: (8862)89191466 Fax: (8862)89191465

Email: marketing@richtek.com

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26

DS8800/B-06 March 2007


型号：	RT8800PS
厂家：	RICHTEK TECHNOLOGY CORPORATION
描述：	General Purpose 2/3-Phase PWM Controller for High-Density Power Supply 通用三分之二相PWM控制器，用于高密度电源控制器
文件：	总26页 (文件大小：533K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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