RF2418PCBA [RFMD]
LOW CURRENT LNA/MIXER; 低电流低噪声放大器/混频器
| 型号： | RF2418PCBA |
| 厂家： | 
RF MICRO DEVICES |
| 描述： | LOW CURRENT LNA/MIXER |
| 文件： | 总10页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RF2418
LOW CURRENT LNA/MIXER
8
Typical Applications
• UHF Digital and Analog Receivers
• Digital Communication Systems
• Commercial and Consumer Systems
• 433MHz and 915MHz ISM Band Receivers
• Spread-Spectrum Communication Systems • General Purpose Frequency Conversion
Product Description
0.156
0.148
0.010
The RF2418 is a monolithic integrated UHF receiver
front-end. The IC contains all of the required components
to implement the RF functions of the receiver except for
the passive filtering and LO generation. It contains an
LNA (low-noise amplifier), a second RF amplifier, a dual-
gate GaAs FET mixer, and an IF output buffer amplifier
which will drive a 50Ω load. In addition, the IF buffer
amplifier may be disabled and a high impedance output is
provided for easy matching to IF filters with high imped-
ances. The output of the LNA is made available as an
output to permit the insertion of a bandpass filter between
the LNA and the RF/Mixer section. The LNA section may
be disabled by removing the VDD1 connection to the IC.
.014
0.347
0.339
0.050
0.252
0.236
0.057
8° MAX
0° MIN
8
0.0500
0.0164
0.010
0.007
Optimum Technology Matching® Applied
Package Style: SOIC-14
Si BJT
GaAs HBT
üGaAs MESFET
Si CMOS
Si Bi-CMOS
SiGe HBT
Features
• Single 3V to 6.5V Power Supply
• High Dynamic Range
LNA
LNA IN
GND
1
14 LNA OUT
13 GND
• Low Current Drain
2
3
4
5
6
7
• High LO Isolation
VDD1
12 GND
RF AMP
• LNA Power Down Mode for Large Signals
VDD2
11 RF IN
10 GND
10pF
IF BYP
IF2 OUT
IF1 OUT
9
8
DEC
BUFFER
MIXER
Ordering Information
LO IN
RF2418
Low Current LNA/Mixer
RF2418 PCBA
Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Functional Block Diagram
Rev A6 010717
8-35
RF2418
Absolute Maximum Ratings
Parameter
Supply Voltage
Rating
-0.5 to 7
Unit
Caution! ESD sensitive device.
V
DC
Input LO and RF Levels
Ambient Operating Temperature
Storage Temperature
+6
dBm
°C
°C
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
-40 to +85
-40 to +150
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
T = 25°C, V =5V, RF=850MHz,
LO=921MHz
CC
Overall
RF Frequency Range
Cascade Power Gain
400 to 1100
MHz
dB
dBm
23
-13
High impedance output
Referenced to the input
Cascade IP
3
Cascade Noise Figure
2.4
dB
Single sideband, includes image filter with
1.0dB insertion loss
First Section (LNA)
Noise Figure
Input VSWR
Input IP3
Gain
1.8
1.5:1
+4.0
14
2.0
dB
With external series matching inductor
+3.0
13
dBm
dB
Reverse Isolation
Output VSWR
40
1.5:1
dB
8
High impedance output
Second Section (RF Amp,
Mixer, IF1)
Noise Figure
9.5
dB
Single Sideband
Input VSWR
1.5:1
With external series matching inductor
Input IP3
+1
9
dBm
dB
Ω
Conversion Power Gain
Output Impedance
Second Section (RF Amp,
7
4000||10pF
Open Collector
Buffered output, 50Ω load
Mixer, IF2)
Noise Figure
Input VSWR
Input IP3
Conversion Gain
Output Impedance
LO Input
10
1.5:1
0
6
30
dB
Single Sideband
With external series matching inductor
-0.5
5
dBm
dB
Ω
LO Frequency
LO Level
LO to RF Rejection
LO to IF Rejection
LO Input VSWR
300 to 1200
-6 to +6
15
MHz
dBm
dB
40
1.3:1
dB
With pin 5 connected to ground.
In order to achieve a low VSWR match at
this input, an 82Ω resistor to ground is
placed in parallel with this port.
Power Supply
Voltage
3.0
6.5
V
Current Consumption
14
20
9
mA
V
V
V
=5.0V, LNA On, Mixer On, Buffer Off
=5.0V, LNA On, Mixer On, Buffer On
=5.0V, LNA Off, Mixer On, Buffer Off
CC
CC
CC
12
6
26
20
mA
mA
8-36
Rev A6 010717
RF2418
Pin
1
Function Description
Interface Schematic
A series 10nH matching inductor is necessary to achieve specified gain
LNA IN
and noise figure at 900MHz. This pin is NOT internally DC-blocked. An
external blocking capacitor must be provided if the pin is connected to a
device with DC present. A DC path to ground (i.e. an inductor or resis-
tor to ground) is, however, acceptable at this pin. If a blocking capacitor
is required, a value of 22pF is recommended.
LNA IN
Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performance.
2
3
GND
Supply Voltage for the LNA only. A 22pF external bypass capacitor is
required and an additional 0.01µF is required if no other low frequency
bypass capacitors are near by. The trace length between the pin and
the bypass capacitors should be minimized. The ground side of the
bypass capacitors should connect immediately to ground plane.
VDD1
For large input signals, VDD1 may be disconnected, resulting in the
LNA’s gain changing from +11dB to -26dB and current drain decreas-
ing by 4mA. If the LNA is never required for use, then this pin can be
left unconnected or grounded, and Pin 11 is used as the first input.
Power supply for the IF buffer amplifier. If the high impedance mixer
output is being used, then this pin is not connected.
4
5
VDD2
If this pin is connected to ground, an internal 10pF capacitor is con-
nected in parallel with the mixer output. This capacitor functions as an
LO trap, which reduces the amount of LO to IF bleed-through and pre-
vents high LO voltages at the mixer output from degrading the mixer’s
dynamic range. At higher IF frequencies, this capacitance, along with
parasitic layout capacitance, should be parallel resonated out by the
choice of the bias inductor value at pin 7. If the internal capacitor is not
connected to ground, the buffer amplifier could become unstable. A
~10pF capacitor should be added at the output to maintain the buffer’s
stability, but the gain will not be significantly affected.
IF BYP
8
50Ω buffered (open source) output port, one of two output options. Pin
6
7
IF2 OUT
IF1 OUT
7 must have a bias resistor to V and pin 6 must have a bias resistor
DD
IF2 OUT
to ground (see Buffered Output Application Schematic) in order to turn
the buffer amplifier on. Current drain will increase by approximately
8mA at 5V, and by approximately 5mA at 3V. It is recommended that
these bias resistors be less than 1kΩ.
High impedance (open drain) output port, one of two output options.
This pin must be connected to V through a resistor or inductor in
DD
order to bias the mixer, even when using IF2 Output. In addition, a
0.01µF bypass capacitor is required at the other end of the bias resistor
or inductor. The ground side of the bypass capacitor should connect
immediately to ground plane. This output is intended to drive high
impedance IF filters. The recommended matching network is shunt L,
series C (see the application schematic, high impedance output). This
topology will provide matching, bias, and DC-blocking.
IF1 OUT
Mixer LO input. A high-pass matching network, such as a single shunt
inductor (as shown in the application schematics), is the recommended
topology because it also rejects IF noise at the mixer input. This filtering
is required to achieve the specified noise figures. This pin is NOT inter-
nally DC-blocked. An external blocking capacitor must be provided if
the pin is connected to a device with DC present. A DC path to ground
(i.e. an inductor or resistor to ground) is, however, acceptable at this
pin. If a blocking capacitor is required, a value of 22pF is recom-
mended.
8
9
LO IN
LO IN
Connection for the external bypass capacitor for the mixer RF input
preamp. 1000pF is recommended. The trace length between the pin
and the capacitor should be minimized. The ground side of the bypass
capacitor should connect immediately to ground plane.
RF BYP
Rev A6 010717
8-37
RF2418
Pin
10
Function Description
Interface Schematic
Same as pin 2.
GND
Mixer RF Input port. For a 50Ω match at 900MHz use a 15nH series
inductor. This pin is NOT internally DC-blocked. An external blocking
capacitor must be provided if the pin is connected to a device with DC
present. A DC path to ground (i.e. an inductor or resistor to ground) is,
however, acceptable at this pin. If a blocking capacitor is required, a
value of 22pF is recommended.To minimize the mixer’s noise figure, it
is recommended to have a RF bandpass filter before this input. This will
prevent the noise at the image frequency from being converted to the
IF.
11
RF IN
RF IN
Same as pin 2.
12
13
14
GND
GND
LNA OUT
Same as pin 2.
50Ω output. Internally DC-blocked.
LNA OUT
Application Schematic
High Impedance Output Configuration
850MHz
8
10 nH
LNA
RF IN
1
2
3
4
5
6
7
14
13
12
11
10
9
Image Filter 50 Ω
VDD
RF AMP
15 nH
100 nF
47 pF
10pF
1 nF
4 pF
IF Filter, Hi Z
BUFFER
MIXER
C1
IF OUT
LO IN
8
L1
10 nH
VDD
100 nF
L1 and C1 are picked to match the mixer's output impedance (4 kΩ II 10 pF) to the IF
filter's impedance, at the IF frequency. C1 also serves as a DC block, in case the IF filter
is not an open circuit at DC.
8-38
Rev A6 010717
RF2418
Application Schematic
Buffered Output Configuration
850MHz
10 nH
LNA
RF IN
1
2
3
4
5
6
7
14
13
12
11
10
9
Image Filter, 50 Ω
VDD
RF AMP
15nH
100 nF
47 pF
10pF
C1
R1
1 nF
4 pF
IF OUT
BUFFER
MIXER
IF Filter, 50Ω
LO IN
8
10 nH
R2
L1
VDD
L1 should parallel resonate, at the IF frequency, with the internal
10pF capacitor plus any extra parasitic layout capacitance.
8
100 nF
100 nF
R1 and R2 are bias resistors that set the bias current for the buffer
amplifier. The value recommended is 510 W, each. Higher values
will decrease the current consumption but also decrease the output
level at which voltage clipping begins to occur. At lower IF
frequencies, where the internal 10 pF capacitor does not roll off the
conversion gain, L1 may be eliminated.
C1 is a blocking capacitor, in case the IF filter's input is not an open
circuit at DC.
Rev A6 010717
8-39
RF2418
Evaluation Board Schematic
RF=850MHz, IF=71MHz
(Download Bill of Materials from www.rfmd.com.)
L3
10 nH
LNA
50 Ω µstrip
50 Ω µstrip
50 Ω µstrip
50 Ω µstrip
J1
LNA IN
J5
1
2
3
4
5
6
7
14
13
12
11
10
9
LNA OUT
R4
5.11 kΩ
L2
18 nH
RF AMP
P1-3
50 Ω µstrip
J4
RF IN
C3
47 pF
Jumper
E2 E1
see note
10pF
C2
1 nF
R3
610 Ω
J2
IF OUT
C5
BUFFER
MIXER
C1
0.1 µF
3 pF to 5 pF
J3
LO IN
8
L4
10 nH
TP1
see note
R1
300 Ω
L1
1 µH
2418400C
C4
0.1 µF
P1
1
NC
8
Notes:
2
3
GND
VDD
For high impedance output
1) Populate L1 and TP1
2) Remove jumper E1 to E2
P1-3
VDD
8-40
Rev A6 010717
RF2418
Evaluation Board Layout
Board Size 1.52” x 1.52”
Board Thickness 0.031”, Board Material FR-4
8
Rev A6 010717
8-41
RF2418
High Impedance Mixer Gain versus Voltage, RF=850MHz
High Impedance Casc. Gain versus Voltage,
RF=850MHz
10.0
26.0
24.0
22.0
20.0
18.0
16.0
14.0
9.5
9.0
8.5
8.0
T =-40
T =26
T = 85
T =-40
7.5
7.0
T = 26
T = 85
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
6.5
6.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
6.5
6.5
Voltage (V)
Voltage (V)
High Impedance Mixer Input IP3 versus Voltage,
RF=850MHz
High Impedance Casc. Input IP3 versus Voltage,
RF=850MHz
4.0
-10.0
-10.5
-11.0
-11.5
-12.0
-12.5
-13.0
-13.5
-14.0
-14.5
-15.0
T =-40
T = 26
T = 85
T =-40
T =26
T = 85
3.5
3.0
2.5
2.0
1.5
1.0
0.5
8
3.0
3.5
4.0
4.5
5.0
5.5
6.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Voltage (V)
Voltage (V)
Buffered LNA Gain versus Voltage,
RF=850MHz
Buffered Mixer Gain versus Voltage,
RF=850MHz
17.0
16.0
15.0
14.0
13.0
12.0
11.0
10.0
9.0
15.0
14.0
13.0
12.0
11.0
10.0
9.0
T =-40
T = 26
T = 85
8.0
T =-40
T = 26
T =85
7.0
8.0
6.0
7.0
5.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Voltage (V)
Voltage (V)
8-42
Rev A6 010717
RF2418
Buffered Casc. Gain versus Voltage,
RF=850MHz
Buffered LNA Input versus Voltage,
RF=850MHz
30.0
25.0
20.0
15.0
10.0
5.0
6.0
4.0
T =-40
T = 26
T =85
T =-40
T =26
T = 85
2.0
0.0
-2.0
-4.0
-6.0
-8.0
-10.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
6.5
6.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
6.5
6.5
Voltage (V)
Voltage (V)
Buffered Mixer Input IP3 versus Voltage,
RF=850MHz
Buffered Casc. Input IP3 versus Voltage,
RF=850MHz
2.0
1.5
-10.0
-11.0
-12.0
-13.0
-14.0
-15.0
-16.0
T =-40
T = 26
T = 85
T =-40
T =26
T = 85
1.0
8
0.5
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Voltage (V)
Voltage (V)
Buffered LNA Noise Figure versus Voltage,
RF=850MHz Part to Part Variation
Buffered Mixer Noise Figure versus Voltage,
RF=850MHz Part to Part Variation
2.0
1.8
1.6
1.4
11.0
10.5
10.0
9.5
Part 1
Part 2
Part 3
Part 4
Part 5
Part 1
Part 2
Part 3
Part 4
Part 5
9.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Voltage (V)
Voltage (V)
Rev A6 010717
8-43
RF2418
8
8-44
Rev A6 010717
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