HS0-OP470AEH-Q [RENESAS]
QUAD OP-AMP, 2100uV OFFSET-MAX, 8MHz BAND WIDTH, UUC14;
| 型号： | HS0-OP470AEH-Q |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | QUAD OP-AMP, 2100uV OFFSET-MAX, 8MHz BAND WIDTH, UUC14 放大器 |
| 文件： | 总4页 (文件大小：165K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Radiation Hardened, Very Low Noise Quad Operational
Amplifiers
HS-OP470ARH, HS-OP470AEH
Features
The HS-OP470ARH, HS-OP470AEH are a radiation hardened,
monolithic quad operational amplifiers that provide highly
reliable performance in harsh radiation environments. Excellent
noise characteristics coupled with a unique array of dynamic
specifications make these amplifiers well-suited for a variety of
satellite system applications. Dielectrically isolated, bipolar
processing makes these devices immune to Single Event
Latch-up.
• Electrically screened to SMD # 5962-98533
• QML Qualified Per MIL-PRF-38535 requirements
• Radiation environment
- High dose rate (50-300rad(Si)/s). . . . . . . . . . . 100krad(Si)
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . . . .50krad(Si)
• Low noise
- At 1kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3nV/√Hz (Typ)
- At 1kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6pA/√Hz (Typ)
The HS-OP470ARH, HS-OP470AEH shows almost no change in
offset voltage after exposure to 100krad(Si) gamma radiation,
with only a minor increase in current. Complementing these
specifications is a post radiation open loop gain in excess of
40kV/V.
• Low offset voltage . . . . . . . . . . . . . . . . . . . . . . . . .2.1mV (Max)
• High slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . .1.7V/µs (Min)
• Gain bandwidth product . . . . . . . . . . . . . . . . . . . .8.0MHz (Typ)
These quad operational amplifiers are available in an industry
standard pinout, allowing for immediate interchangeability
with most other quad operational amplifiers.
Applications
• High Q, active filters
• Voltage regulators
• Integrators
Pin Configuration
HS-OP407ARH, HS-OP470AEH
(14 LD FLATPACK)
TOP VIEW
• Signal generators
• Voltage references
• Space environments
1
2
3
4
5
6
7
14
13
OUT 1
-IN1
OUT 4
-IN4
12
11
10
+IN1
V+
+IN4
V-
+IN2
-IN2
+IN3
-IN3
9
8
OUT 2
OUT 3
August 8, 2013
FN4471.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas LLC 2002, 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
HS-OP470ARH, HS-OP470AEH
Ordering Information
PACKAGE
(RoHS Compliant)
(Note 2)
PART NUMBER
(Note 1)
TEMP. RANGE
(°C)
PKG.
DWG. #
ORDERING/SMD NUMBER
5962R9853301VXC
5962R9853302VXC
5962R9853301V9A
5962R9853302V9A
HS0-OP470ARH/SAMPLE
5962R9853301QXC
HS9-OP470ARH/PROTO
HS-OP470ARHEV1Z
PART MARKING
Q 5962R98 53301VXC
Q 5962R98 53302VXC
HS9-OP470ARH-Q
HS9-OP470AEH-Q
-55 to +125
-55 to +125
14 Ld Flatpack
14 Ld Flatpack
Die
K14.A
K14.A
HS0-OP470ARH-Q
-55 to +125
HS0-OP470AEH-Q
-55 to +125
Die
HS0-OP470ARH/SAMPLE
HS9-OP470ARH-8
-55 to +125
Die
-55 to +125
Q 5962R98 53301QXC
HS9-OP470ARH/PROTO
14 Ld Flatpack
14 Ld Flatpack
K14.A
K14.A
HS9-OP470ARH/PROTO
HS-OP470ARHEV1Z
-55 to +125
Evaluation Board
1. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in
the“Ordering Information” table must be used when ordering.
2. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with
both SnPb and Pb-free soldering operations.
FN4471.2
August 8, 2013
2
HS-OP470ARH, HS-OP470AEH
PASSIVATION:
Die Characteristics
Type: Nitride (SI3N4) over Silox (SIO2, 5% Phos.)
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
DIE DIMENSIONS:
95 mils x 99 mils x 19 mils ±1 mil
(2420µm x 2530µm x 483µm ±25.4µm)
WORST CASE CURRENT DENSITY:
METALLIZATION:
5
2
<2.0 x 10 A/cm
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
TRANSISTOR COUNT:
175
SUBSTRATE POTENTIAL (Powered Up):
PROCESS:
Unbiased
BACKSIDE FINISH:
Silicon
Bipolar Dielectric Isolation
Metallization Mask Layout
HS-OP470ARH, HS-OP470AEH
+IN2
V+
+IN1
-IN1
-IN2
OUT1
OUT4
OUT2
OUT3
-IN3
-IN4
+IN3
V-
+IN4
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN4471.2
August 8, 2013
3
HS-OP470ARH, HS-OP470AEH
Ceramic Metal Seal Flatpack Packages (Flatpack)
K14.A MIL-STD-1835 CDFP3-F14 (F-2A, CONFIGURATION B)
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
A
A
e
INCHES MILLIMETERS
MIN
PIN NO. 1
ID AREA
SYMBOL
MAX
0.115
0.022
0.019
0.009
0.006
0.390
0.260
0.290
-
MIN
1.14
0.38
0.38
0.10
0.10
-
MAX
2.92
0.56
0.48
0.23
0.15
9.91
6.60
7.11
-
NOTES
D
A
b
0.045
0.015
0.015
0.004
0.004
-
-
-
-A-
-B-
S1
b1
c
-
-
b
c1
D
-
E1
3
-
0.004
Q
H
A - B
D
0.036
H
A - B
D
S
M
S
S
M
S
C
E
0.235
-
5.97
-
E
E1
E2
E3
e
3
-
-D-
A
0.125
0.030
3.18
0.76
-H-
-C-
-
-
7
-
L
E2
L
E3
E3
0.050 BSC
1.27 BSC
SEATING AND
BASE PLANE
c1
LEAD FINISH
k
0.008
0.270
0.026
0.005
-
0.015
0.370
0.045
-
0.20
6.86
0.66
0.13
-
0.38
9.40
1.14
-
2
-
L
BASE
METAL
Q
S1
M
N
8
6
-
(c)
b1
0.0015
0.04
M
M
(b)
14
14
-
SECTION A-A
Rev. 0 5/18/94
NOTES:
1. Index area: A notch or a pin one identification mark shall be located
adjacent to pin one and shall be located within the shaded area
shown. The manufacturer’s identification shall not be used as a pin
one identification mark. Alternately, a tab (dimension k) may be
used to identify pin one.
2. If a pin one identification mark is used in addition to a tab, the limits
of dimension k do not apply.
3. This dimension allows for off-center lid, meniscus, and glass over-
run.
4. Dimensions b1 and c1 apply to lead base metal only. Dimension M
applies to lead plating and finish thickness. The maximum limits of
lead dimensions b and c or M shall be measured at the centroid of
the finished lead surfaces, when solder dip or tin plate lead finish is
applied.
5. N is the maximum number of terminal positions.
6. Measure dimension S1 at all four corners.
7. For bottom-brazed lead packages, no organic or polymeric materi-
als shall be molded to the bottom of the package to cover the leads.
8. Dimension Q shall be measured at the point of exit (beyond the me-
niscus) of the lead from the body. Dimension Q minimum shall be
reduced by 0.0015 inch (0.038mm) maximum when solder dip lead
finish is applied.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
FN4471.2
August 8, 2013
4
相关型号：
HS0-OP470ARH-Q
QUAD OP-AMP, 2100uV OFFSET-MAX, 8MHz BAND WIDTH, UUC14, ROHS COMPLIANT, DIE14
RENESAS
HS0-OP470ARH/SAMPLE
QUAD OP-AMP, 2100uV OFFSET-MAX, 8MHz BAND WIDTH, UUC14, ROHS COMPLIANT, DIE-14
RENESAS
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