HD74CBT1G125CME-E [RENESAS]
CBT/FST/QS/5C/B SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, CMPAK-5;
| 型号： | HD74CBT1G125CME-E |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | CBT/FST/QS/5C/B SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, CMPAK-5 驱动 ISM频段 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总9页 (文件大小：86K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74CBT1G125
Single FET Bus Switch
ADE-205-645 (Z)
Rev. 0
Jan. 2002
Description
The HD74CBT1G125 features a single high-speed line switch. The switch is disabled when the output
enable (OE) input is high.
Features
•
•
•
•
Minimal propagation delay through the switch.
5 Ω switch connection between two ports.
TTL-compatible input levels.
Ultra low quiescent power.
-Ideally suited for notebook applications.
Package type
•
Package type
Package code
Package suffix
Taping code
CMPAK–5pin
CMPAK–5
CM
E (3000pcs / Reel)
HD74CBT1G125
Outline and Article Indication
• HD74CBT1G125
Index band
Marking
B B
= Control code
or blank)
CMPAK–5
(
Function Table
Input OE
Function
L
A port = B port
Disconnect
H
H:
L:
High level
Low level
Pin Arrangement
1
2
3
OE
A
5
VCC
GND
4
B
(Top view)
Rev.0, Jan. 2002, page 2 of 9
HD74CBT1G125
Absolute Maximum Ratings
Item
Symbol
Ratings
−0.5 to 7.0
−0.5 to 7.0
−50
Unit
V
Conditions
Supply voltage range
Input voltage range *1
Input clamp current
Continuous output current
VCC
VI
V
IIK
mA
mA
mA
VI < 0
IO
128
VO = 0 to VCC
Continuous current through
VCC or GND
I
CC or IGND
100
Maximum power dissipation
PT
200
mW
at Ta = 25°C (in still air) *2
Storage temperature
Tstg
−65 to 150
°C
Notes:
The absolute maximum ratings are values which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current
ratings are observed.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Recommended Operating Conditions
Item
Symbol
VCC
Min
4.0
0
Max
5.5
5.5
5.5
5
Unit
V
Conditions
Supply voltage range
Input voltage range
Output voltage range
Input transition rise or fall rate
Operating free-air temperature
VI
V
VI/O
0
V
∆t / ∆v
Ta
0
ns / V
°C
VCC = 4.5 to 5.5 V
−40
85
Note: Unused or floating inputs must be held high or low.
Rev.0, Jan. 2002, page 3 of 9
HD74CBT1G125
DC Electrical Characteristics
(Ta = −40 to 85°C)
Item
Symbol
VCC (V)
Min
Typ*1
Max
−1.2
Unit
V
Test conditions
Clamp diode voltage VIK
4.5
IIN = −18 mA
Input voltage
VIH
VIL
4.0 to 5.5 2.0
V
4.0 to 5.5
4.0
0.8
20
On-state switch
resistance *2
RON
14
Ω
VIN = 2.4 V,
IIN = 15 mA
Typ at VCC = 4.0 V
4.5
4.5
4.5
5
7
VIN = 0 V,
IIN = 64 mA
5
7
VIN = 0 V,
IIN = 30 mA
10
15
VIN = 2.4 V,
IIN = 15 mA
Input current
IIN
0 to 5.5
5.5
1.0
1.0
µA
µA
VIN = 5.5 V or GND
Off-state leakage
current
IOZ
0 ≤ A, B ≤ VCC
Quiescent supply
current
ICC
5.5
5.5
1.0
2.5
µA
VIN = VCC or GND,
IO = 0 mA
Increase in ICC
per input *3
∆ICC
mA
One input at 3.4 V,
other inputs at VCC or
GND
Notes:
For condition shown as Min or Max use the appropriate values under recommended operating
conditions.
1. All typical values are at VCC = 5 V (unless otherwise noted), Ta = 25°C.
2. Measured by the voltage drop between the A and B terminals at the indicated current through the
switch. On-state resistance is determined by the lower voltage of the two (A or B) terminals.
3. This is the increase in supply current for each input that is at the specified TTL voltage level
rather than VCC or GND.
Capacitance
(Ta = 25°C)
Item
Symbol VCC (V)
Min
Typ
Max
Unit
Test conditions
Control input
capacitance
CIN
5.0
3
pF
VIN = 0 or 3 V
Input / output
capacitance
CI/O (OFF)
5.0
5
pF
V = 0 or 3 V
OOE = VCC
Note: This parameter is determined by device characterization is not production tested.
Rev.0, Jan. 2002, page 4 of 9
HD74CBT1G125
Switching Characteristics
(Ta = −40 to 85°C)
•
VCC = 4.0 V
Test
conditions
FROM
(Input)
TO
(Output)
Item
Symbol
Min
Max
Unit
Propagation delay
time *1
tPLH
tPHL
0.35
ns
CL = 50 pF
RL = 500 Ω
A or B
B or A
A or B
A or B
Enable time
tZH
tZL
5.5
ns
ns
CL = 50 pF
RL = 500 Ω
OE
Disable time
tHZ
tLZ
4.5
4.5
CL = 50 pF
RL = 500 Ω
OE
•
VCC = 5.0 0.5 V
Test
conditions
FROM
(Input)
TO
(Output)
Item
Symbol
Min
Max
Unit
Propagation delay
time *1
tPLH
tPHL
0.25
ns
CL = 50 pF
RL = 500 Ω
A or B
B or A
A or B
A or B
Enable time
tZH
tZL
1.6
4.9
ns
ns
CL = 50 pF
RL = 500 Ω
OE
Disable time
tHZ
tLZ
1.0
1.0
4.2
4.8
CL = 50 pF
RL = 500 Ω
OE
Note: 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the
switch and the specified load capacitance, when driven by an ideal voltage source (zero output
impedance).
Rev.0, Jan. 2002, page 5 of 9
HD74CBT1G125
Test Circuit
See under table
S1
500 Ω
OPEN
GND
*1
CL = 50 pF
500 Ω
Load circuit for outputs
Symbol
tPLH/ tPHL
tZH / tHZ
tZL / tLZ
S1
OPEN
OPEN
7 V
Note: 1. CL includes probe and jig capacitance.
Rev.0, Jan. 2002, page 6 of 9
HD74CBT1G125
Waveforms – 1
tr
tf
3 V
90 %
1.5 V
90 %
1.5 V
Input
10 %
10 %
tPHL
GND
VOH
tPLH
1.5 V
1.5 V
Output
VOL
Waveforms – 2
tf
tr
3 V
90 %
1.5 V
90 %
1.5 V
Output
Control
10 %
tZL
10 %
GND
3.5 V
tLZ
Waveform - A
Waveform - B
1.5 V
VOL + 0.3 V
VOL
VOH
tZH
tHZ
VOH - 0.3 V
1.5 V
GND
Notes: 1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
2. Waveform - A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.0, Jan. 2002, page 7 of 9
HD74CBT1G125
Package Dimensions
As of July, 2001
Unit: mm
1.3 0.2
+ 0.1
– 0.05
(0.65)
(0.65)
0.15
0 – 0.1
5 – 0.2 0.05
2.0 0.2
Hitachi Code
JEDEC
CMPAK-5(T)
—
JEITA
Mass (reference value)
Conforms
0.006 g
Rev.0, Jan. 2002, page 8 of 9
HD74CBT1G125
Disclaimer
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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For further information write to:
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Copyright © Hitachi, Ltd., 2002. All rights reserved. Printed in Japan.
Colophon 5.0
Rev.0, Jan. 2002, page 9 of 9
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