HAT1044M-EL-E [RENESAS]
Silicon P Channel Power MOS FET Power Switching; 硅P沟道功率MOS FET电源开关
| 型号： | HAT1044M-EL-E |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Silicon P Channel Power MOS FET Power Switching |
| 文件： | 总4页 (文件大小：64K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HAT1044M
Silicon P Channel Power MOS FET
Power Switching
REJ03G1152-0600
(Previous: ADE-208-753D)
Rev.6.00
Sep 07, 2005
Features
•
•
•
•
Low on-resistance
Low drive current
High density mounting
4.5 V gate drive device can be driven from 5 V source
Outline
RENESAS Package code: PTSP0006FA-A
(Package name: TSOP-6)
1 2 5 6
D D
D D
4
5
6
4
Source
Gate
Drain
3
G
3
1, 2, 5, 6
3
2
1
S
4
Rev.6.00 Sep 07, 2005 page 1 of 3
HAT1044M
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Symbol
VDSS
Value
–30
Unit
V
VGSS
±20
V
Note 2
ID
–4.5
A
Note 1
Drain peak current
ID (pulse)
–18
A
Note 2
Body-drain diode reverse drain current
Channel dissipation
IDR
Pch (pulse)
–4.5
A
Note 2
Note 3
2.0
W
W
°C
°C
Channel dissipation
Pch (continuous)
Tch
1.05
Channel temperature
150
Storage temperature
Tstg
–55 to +150
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. When using the alumina ceramic board (50 × 50 × 0.7 mm), PW ≤ 5 s, Ta = 25°C
3. When using the alumina ceramic board (50 × 50 × 0.7 mm), Ta = 25°C
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
V (BR) DSS
IGSS
Min
–30
—
Typ
—
Max
—
Unit
V
Test Conditions
Drain to source breakdown voltage
Gate to source leak current
ID = –10 mA, VGS = 0
VGS = ±20 V, VDS = 0
VDS = –30 V, VGS = 0
VDS = –10 V, ID = –1 mA
ID = –3 A, VGS = –10 V Note 4
ID = –3 A, VGS = –4.5 V Note 4
ID = –3 A, VDS = –10 V Note 4
VDS = –10 V
—
±0.1
–1
–2.5
60
105
—
µA
µA
V
Zero gate voltage drain current
Gate to source cutoff voltage
Static drain to source on state resistance
IDSS
—
—
VGS (off)
RDS (on)
RDS (on)
|yfs|
–1.0
—
—
50
mΩ
mΩ
S
—
80
Forward transfer admittance
Input capacitance
3
5.5
600
220
150
13
Ciss
Coss
Crss
Qg
—
—
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
V
V
GS = 0
Output capacitance
—
—
f = 1 MHz
Reverse transfer capacitance
Total gate charge
—
—
—
—
VDS = 10 V
V
GS = 0
Gate to source charge
Gate to drain charge
Turn-on delay time
Qgs
Qgd
td (on)
tr
—
2
—
f = 1 MHz
—
3
—
—
12
—
VGS = –10 V, ID = –3 A,
RL = 3.3 Ω
Rise time
—
85
—
Turn-off delay time
td (off)
tf
—
55
—
Fall time
—
55
—
Body-drain diode forward voltage
Body-drain diode reverse recovery time
VDF
—
–0.95
50
—
IF = –4.5 A, VGS = 0 Note 4
IF = –4.5 A, VGS = 0
diF/dt = –20 A/µs
trr
—
—
ns
Note: 4. Pulse test
Rev.6.00 Sep 07, 2005 page 2 of 3
HAT1044M
Package Dimensions
JEITA Package Code
SC-95 Modified
RENESAS Code
Package Name
MASS[Typ.]
0.012g
PTSP0006FA-A
TSOP-6 / TSOP-6V
D
A
e
Q
c
E
HE
L
L
P
L
1
Dimension in Millimeters
Reference
Symbol
Min
0.8
0
Nom
Max
1.1
0.1
1.0
A3
A
A
A
b
A1
A2
A3
x
S
A
M
e
0.8
0.9
0.25
0.32
0.3
b
0.25
0.1
0.4
b
1
A
A
2
1
A
c
0.13
0.11
2.95
1.6
0.15
c1
D
E
e
2.8
3.1
1.45
1.75
e
1
1.0
y
S
H
E
2.6
0.3
0.1
0.2
2.8
3.0
0.7
S
L
b
L
1
0.5
L
P
0.6
b
1
I1
x
0.05
0.05
0.45
c1
y
b
2
c
b
2
e
1
2.2
0.2
I1
0.8
A-A Section
Pattern of terminal position areas
Q
Ordering Information
Part Name
Quantity
Shipping Container
HAT1044M-EL-E
3000 pcs
Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
Rev.6.00 Sep 07, 2005 page 3 of 3
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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Colophon .3.0
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