2SK3211STL-E [RENESAS]

Silicon N Channel MOS FET High Speed Power Switching; 硅N沟道MOS FET高速电源开关
2SK3211STL-E
型号: 2SK3211STL-E
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

Silicon N Channel MOS FET High Speed Power Switching
硅N沟道MOS FET高速电源开关

晶体 开关 晶体管 功率场效应晶体管 脉冲 电源开关 ISM频段
文件: 总9页 (文件大小:94K)
中文:  中文翻译
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2SK3211(L), 2SK3211(S)  
Silicon N Channel MOS FET  
High Speed Power Switching  
REJ03G1091-0400  
Rev.4.00  
May 15, 2006  
Features  
Low on-resistance  
RDS = 60 mtyp.  
High speed switching  
4 V gate drive device can be driven from 5 V source  
Outline  
RENESAS Package code: PRSS0004AE-A RENESAS Package code: PRSS0004AE-B  
(Package name: LDPAK(S)-(1))  
(Package name: LDPAK(L))  
4
D
4
1. Gate  
G
2. Drain  
3. Source  
4. Drain  
1
2
3
1
S
2
3
Rev.4.00 May 15, 2006 page 1 of 8  
2SK3211(L), 2SK3211(S)  
Absolute Maximum Ratings  
(Ta = 25°C)  
Item  
Drain to source voltage  
Gate to source voltage  
Drain current  
Symbol  
VDSS  
VGSS  
ID  
Ratings  
Unit  
200  
V
V
±20  
25  
A
Note1  
Drain peak current  
ID(pulse)  
100  
A
Body-drain diode reverse drain current  
Avalanche current  
IDR  
25  
25  
A
Note3  
IAP  
A
Note3  
Avalanche energy  
EAR  
Pch Note2  
41  
mJ  
W
°C  
°C  
Channel dissipation  
100  
Channel temperature  
Tch  
150  
Storage temperature  
Tstg  
–55 to +150  
Notes: 1. PW 10 µs, duty cycle 1%  
2. Value at Tc = 25°C  
3. Value at Tch = 25°C, Rg 50 Ω  
Electrical Characteristics  
(Ta = 25°C)  
Item  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Drain to source breakdown voltage  
Gate to source breakdown voltage  
Gate to source leak current  
Zero gate voltage drain current  
Gate to source cutoff voltage  
V(BR)DSS  
V(BR)GSS  
IGSS  
200  
±20  
V
V
ID = 10 mA, VGS = 0  
IG = ±100 µA, VDS = 0  
VGS = ±16 V, VDS = 0  
VDS = 200 V, VGS = 0  
ID = 1 mA, VDS = 10 V  
ID = 15 A, VGS = 10 VNote4  
ID = 15 A, VGS = 4 V Note4  
ID = 15 A, VDS = 10 V Note4  
±10  
10  
2.5  
75  
85  
µA  
µA  
V
IDSS  
VGS(off)  
RDS(on)  
RDS(on)  
|yfs|  
1.0  
Static drain to source on state  
resistance  
60  
mΩ  
mΩ  
S
65  
Forward transfer admittance  
Input capacitance  
18  
30  
Ciss  
Coss  
Crss  
td(on)  
tr  
2420  
790  
340  
20  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
V
VDS = 10 V, VGS = 0,  
f = 1 MHz  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
ID = 15 A, VGS = 10 V,  
RL = 2 Ω  
230  
590  
330  
0.95  
230  
Turn-off delay time  
Fall time  
td(off)  
tf  
Body–drain diode forward voltage  
VDF  
IF = 25 A, VGS = 0  
Body–drain diode reverse recovery  
time  
trr  
ns  
IF = 25 A, VGS = 0  
diF/ dt = 50 A/ µs  
Note: 4. Pulse test  
Rev.4.00 May 15, 2006 page 2 of 8  
2SK3211(L), 2SK3211(S)  
Main Characteristics  
Power vs. Temperature Derating  
Maximum Safe Operation Area  
1000  
100  
10  
160  
120  
80  
40  
0
DC Operation  
(Tc = 2  
5°C)  
1
Operation in  
this area is  
limited by RDS (on)  
0.1  
0.01  
Ta = 25°C  
1
3
10  
30  
100 300 1000  
0
50  
100  
150  
200  
Case Temperature Tc (°C)  
Drain to Source Voltage VDS (V)  
Typical Output Characteristics  
Typical Transfer Characteristics  
50  
40  
30  
20  
10  
0
20  
16  
12  
8
Pulse Test  
3.5 V  
10 V  
6 V  
VDS = 10 V  
Pulse Test  
4 V  
3 V  
Tc = 75°C  
25°C  
4
VGS = 2.5 V  
–25°C  
0
0
2
4
6
8
10  
0
1
2
3
4
5
Drain to Source Voltage VDS (V)  
Gate to Source Voltage VGS (V)  
Drain to Source Saturation Voltage vs.  
Gate to Source Voltage  
Static Drain to Source on State Resistance  
vs. Drain Current  
2.5  
500  
Pulse Test  
Pulse Test  
2.0  
1.5  
1.0  
0.5  
0
200  
100  
VGS = 4 V  
50  
ID = 15 A  
10 A  
10 V  
20  
10  
5 A  
1
2
5
10 20  
50 100  
0
4
8
12  
16  
20  
Gate to Source Voltage VGS (V)  
Drain Current ID (A)  
Rev.4.00 May 15, 2006 page 3 of 8  
2SK3211(L), 2SK3211(S)  
Static Drain to Source on State  
Resistance vs. Temperature  
Forward Transfer Admittance  
vs. Drain Current  
50  
250  
200  
150  
100  
50  
Pulse Test  
Tc = –25°C  
25°C  
20  
10  
5
75°C  
5,10,15 A  
VGS = 4 V  
5,10,15 A  
2
1
10 V  
VDS = 10 V  
Pulse Test  
0
0.5  
–40  
0
40  
80  
120  
160  
0.1 0.3  
1
3
10  
30  
100  
Case Temperature TC (°C)  
Drain Current ID (A)  
Body to Drain Diode Reverse  
Recovery Time  
Typical Capacitance  
vs. Drain to Source Voltage  
1000  
500  
10000  
5000  
di / dt = 50 A / µs  
VGS = 0, Ta = 25°C  
Ciss  
2000  
1000  
500  
200  
100  
50  
Coss  
Crss  
200  
100  
50  
20  
10  
VGS = 0  
20  
10  
f = 1 MHz  
0.1 0.3  
1
3
10  
30  
100  
0
10  
20  
30  
40  
50  
Reverse Drain Current IDR (A)  
Drain to Source Voltage VDS (V)  
Dynamic Input Characteristics  
ID = 20 A  
Switching Characteristics  
1000  
500  
200  
160  
120  
80  
20  
16  
12  
8
t
d(off)  
VDD = 150 V  
100 V  
50 V  
t
f
200  
100  
VGS  
t
r
50  
VGS = 10 V, VDD = 30 V  
PW = 5 µs, duty < 1 %  
t
d(on)  
40  
4
0
VDD = 150 V  
100 V  
50 V  
20  
10  
VDS  
0
20  
2
0.1 0.2  
1
10  
40  
80  
120  
160  
200  
0.5  
5
Drain Current ID (A)  
Gate Charge Qg (nc)  
Rev.4.00 May 15, 2006 page 4 of 8  
2SK3211(L), 2SK3211(S)  
Reverse Drain Current vs.  
Source to Drain Voltage  
Maximum Avalanche Energy vs.  
Channel Temperature Derating  
20  
16  
12  
8
50  
40  
30  
20  
Pulse Test  
IAP = 25 A  
VDD = 50 V  
duty < 0.1 %  
Rg > 50 Ω  
10 V  
5 V  
4
10  
0
VGS = 0, –5 V  
0
0.2  
0.4  
0.6  
0.8  
1.0  
25  
50  
75  
100  
125  
150  
Source to Drain Voltage VSD (V)  
Channel Temperature Tch (°C)  
Normalized Transient Thermal Impedance vs. Pulse Width  
3
1
Tc = 25°C  
D = 1  
0.5  
0.3  
0.1  
θ
θ
γ
θ
ch – c(t) = s (t) ch – c  
ch – c = 1.25°C/W, Tc = 25°C  
PW  
T
P
DM  
D =  
0.03  
0.01  
PW  
T
10 µ  
100 µ  
1 m  
10 m  
100 m  
1
10  
Pulse Width PW (S)  
Avalanche Test Circuit  
Avalanche Waveform  
VDSS  
L
1
2
2
EAR  
=
L IAP •  
VDS  
Monitor  
VDSS – VDD  
IAP  
Monitor  
VV(BR)DSS  
IAP  
Rg  
VDS  
VDD  
D. U. T  
ID  
Vin  
15 V  
50 Ω  
VDD  
0
Rev.4.00 May 15, 2006 page 5 of 8  
2SK3211(L), 2SK3211(S)  
Switching Time Test Circuit  
Switching Time Waveforms  
90%  
Vout  
Monitor  
Vin Monitor  
D.U.T.  
10%  
10%  
Vin  
RL  
Vout  
10%  
VDD  
= 30 V  
Vin  
10 V  
50 Ω  
90%  
90%  
t
t
t
r
d(on)  
t
f
d(off)  
Rev.4.00 May 15, 2006 page 6 of 8  
2SK3211(L), 2SK3211(S)  
Package Dimensions  
Package Name  
LDPAK(L)  
JEITA Package Code  
RENESAS Code  
PRSS0004AE-A  
Previous Code  
MASS[Typ.]  
1.40g  
Unit: mm  
LDPAK(L) / LDPAK(L)V  
4.44 0.2  
1.3 0.15  
10.2 0.3  
1.3 0.2  
1.37 0.2  
2.49 0.2  
+ 0.2  
0.86  
– 0.1  
0.76 0.1  
2.54 0.5  
0.4 0.1  
2.54 0.5  
Package Name  
LDPAK(S)-(1)  
JEITA Package Code  
SC-83  
RENESAS Code  
PRSS0004AE-B  
Previous Code  
MASS[Typ.]  
1.30g  
Unit: mm  
LDPAK(S)-(1) / LDPAK(S)-(1)V  
4.44 0.2  
7.8  
6.6  
10.2 0.3  
1.3 0.15  
2.49 0.2  
+ 0.2  
0.1  
– 0.1  
2.2  
1.37 0.2  
0.4 0.1  
+ 0.2  
– 0.1  
1.3 0.2  
0.86  
2.54 0.5  
2.54 0.5  
Rev.4.00 May 15, 2006 page 7 of 8  
2SK3211(L), 2SK3211(S)  
Ordering Information  
Part Name  
Quantity  
Shipping Container  
2SK3211L-E  
500 pcs  
1000pcs  
Box (Sack)  
Taping  
2SK3211STL-E  
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of  
production before ordering the product.  
Rev.4.00 May 15, 2006 page 8 of 8  
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan  
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