PLL602-14 [PLL]
192MHz - 400MHz Low Phase Noise LVDS XO (12 - 25MHz Crystal); 192MHz - 400MHz的低相位噪声的LVDS XO ( 12 - 25MHz晶振)型号: | PLL602-14 |
厂家: | PHASELINK CORPORATION |
描述: | 192MHz - 400MHz Low Phase Noise LVDS XO (12 - 25MHz Crystal) |
文件: | 总5页 (文件大小:196K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PLL602-14
192MHz – 400MHz Low Phase Noise LVDS XO (12 – 25MHz Crystal)
FEATURES
PIN CONFIGURATION
•
Low phase noise output for the 192MHz to
400MHz range (-134 dBc at 10kHz offset).
LVDS output.
12 to 25MHz crystal input.
Integrated crystal load capacitor: no external
load capacitor required.
Output Enable selector.
3.3V operation.
VDD
VDD
XIN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDD
•
•
•
GND_BUF
CLKBAR
VDD_BUF
CLK
XOUT
OE^
•
•
•
N/C
GND_BUF
GND
Available in 16 Pin TSSOP.
GND
GND
GND
Note: ^ denotes internal pull up
FOUT = FXIN x 16
DESCRIPTION
The PLL602-14 is a monolithic low jitter and low
phase noise (-134dBc/Hz @ 10kHz offset) XO IC
with LVDS output, for 192MHz to 400MHz output
range. It provides a low phase noise reference
frequency using a low cost crystal.
The chip delivers an output frequency of FXIN x 16.
This makes the PLL602-14 ideal for a wide range of
applications.
OE (Pin 5)
Output State
Tri-state
0
1 (Default)
Output enabled
BLOCK DIAGRAM
VCO
Divider
CLKBAR
CLK
Reference
Divider
Phase
Charge
Pump
Loop
Filter
VCO
OE
Comparator
XIN
XOUT
XTAL
OSC
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 1
PLL602-14
192MHz – 400MHz Low Phase Noise LVDS XO (12 – 25MHz Crystal)
PIN DESCRIPTIONS
Name
Number
Type
Description
VDD
XIN
1,2,16
P
I
Power supply.
3
4
Crystal input. See Crystal Specifications on page 2.
Crystal output. See Crystal Specifications on page 2.
XOUT
I
Output enable input. Disables (tri-state) output when low. Internal pull-up
enables output by default if pin is not connected to low.
OE
5
I
N/C
GND
6
7,8,9,10
11,15
12
-
Not connected.
P
P
O
P
O
Ground.
GND_BUF
CLK
Ground for output buffers.
True clock output.
VDD_BUF
CLKB
13
Power supply for output buffers.
Complementary clock output.
14
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
VDD
VI
4.6
VDD+0.5
VDD+0.5
150
V
Input Voltage, dc
-0.5
-0.5
-65
V
Output Voltage, dc
VO
TS
TA
TJ
V
Storage Temperature
°C
°C
°C
°C
kV
Ambient Operating Temperature*
Junction Temperature
-40
85
125
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
260
2
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. Crystal Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
Crystal Loading Rating
Recommended ESR
FXIN
CL (xtal)
RE
Parallel Fundamental Mode
12
25
MHz
pF
20
AT cut
30
Ω
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2
PLL602-14
192MHz – 400MHz Low Phase Noise LVDS XO (12 – 25MHz Crystal)
3. General Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Supply Current, Dynamic
(with Loaded Outputs)
IDD
LVDS
60
mA
Operating Voltage
VDD
2.97
45
3.63
55
V
%
Output Clock Duty Cycle
Short Circuit Current
@ 1.25V (LVDS)
50
mA
±50
4. Jitter and Phase Noise Specification
PARAMETERS
Period jitter RMS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
With capacitive decoupling
between VDD and GND.
With capacitive decoupling
between VDD and GND. Over
10,000 cycles.
5
ps
ps
Accumulated jitter RMS
11
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
311MHz @100Hz offset
311MHz @1kHz offset
311MHz @10kHz offset
311MHz @100kHz offset
-90
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
-114
-134
-134
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3
PLL602-14
192MHz – 400MHz Low Phase Noise LVDS XO (12 – 25MHz Crystal)
5. LVDS Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Output Differential Voltage
VDD Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
VOD
∆VOD
VOH
247
-50
355
454
50
mV
mV
V
1.4
1.1
1.2
3
1.6
RL = 100 Ω
(see figure)
VOL
0.9
1.125
0
V
VOS
1.375
25
V
Offset Magnitude Change
mV
∆VOS
Vout = VDD or GND
VDD = 0V
Power-off Leakage
IOXD
IOSD
uA
±1
±10
Output Short Circuit Current
-5.7
-8
mA
6. LVDS Switching Characteristics
PARAMETERS
Differential Clock Rise Time
Differential Clock Fall Time
SYMBOL
CONDITIONS
MIN.
0.2
TYP.
0.7
MAX.
1.0
UNITS
ns
RL = 100 Ω
CL = 10 pF
(see figure)
tr
tf
0.2
0.7
1.0
ns
LVDS Levels Test Circuit
LVDS Switching Test Circuit
OUT
OUT
CL = 10pF
50
50
Ω
Ω
VOD
VOS
VDIFF
RL = 100Ω
C
L = 10pF
OUT
OUT
LVDS Transistion Time Waveform
OUT
OUT
0V (Differential)
80%
80%
VDIFF
0V
20%
20%
tR
tF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 4
PLL602-14
192MHz – 400MHz Low Phase Noise LVDS XO (12 – 25MHz Crystal)
PACKAGE INFORMATION
16 PIN TSSOP ( mm )
Symbol
Min.
-
Max.
1.20
0.15
0.30
0.20
5.10
4.50
E
H
A
A1
B
C
D
E
0.05
0.19
0.09
4.90
4.30
D
A
H
L
e
6.40 BSC
A1
0.45
0.75
C
0.65 BSC
L
B
e
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL602-14 S C
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PART NUMBER
PACKAGE TYPE
O=TSSOP
Order Number
Marking
Package Option
PLL602-14OC-R
PLL602-14OC
P602-14OC
P602-14OC
TSSOP - Tape and Reel
TSSOP – Tube
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 5
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