934056745118 [NXP]
47A, 100V, 0.028ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-3;型号: | 934056745118 |
厂家: | NXP |
描述: | 47A, 100V, 0.028ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-3 开关 脉冲 晶体管 |
文件: | 总14页 (文件大小:256K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PHP47NQ10T; PHB47NQ10T
N-channel enhancement mode field-effect transistor
Rev. 01 — 16 May 2001
Product data
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using
TrenchMOS™1 technology.
Product availability:
PHP47NQ10T in SOT78 (TO-220AB)
PHB47NQ10T in SOT404 (D2-PAK).
2. Features
■ Fast switching
■ Very low on-state resistance.
3. Applications
■ DC to DC converters
■ Switched mode power supplies.
c
c
4. Pinning information
Table 1: Pinning - SOT78 and SOT404, simplified outline and symbol
Pin
1
Description
gate (g)
Simplified outline
Symbol
mb
mb
[1]
2
drain (d)
3
source (s)
d
s
mb
mounting base;
connected to
drain (d)
g
2
1
3
MBK116
MBB076
MBK106
1
2 3
SOT404 (D2-PAK)
SOT78 (TO-220AB)
[1] It is not possible to make connection to pin 2 of the SOT404 package.
1. TrenchMOS is a trademark of Royal Philips Electronics.
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2: Quick reference data
Symbol Parameter
Conditions
Typ
−
Max
100
47
Unit
V
VDS
ID
drain-source voltage (DC)
drain current (DC)
Tj = 25 to 175 °C
Tmb = 25 °C; VGS = 10 V
Tmb = 25 °C
−
A
Ptot
Tj
total power dissipation
junction temperature
−
166
175
28
W
−
°C
mΩ
RDSon
drain-source on-state resistance
Tj = 25 °C; VGS = 10 V; ID = 25 A
20
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
−
Max
100
100
±20
47
Unit
V
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
Tj = 25 to 175 °C
VDGR
VGS
Tj = 25 to 175 °C; RGS = 20 kΩ
−
V
−
V
ID
Tmb = 25 °C; VGS = 10 V
−
A
Figure 2 and 3
T
mb = 100 °C; VGS = 10 V
−
−
33
A
A
Figure 2
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
187
Figure 3
Ptot
Tstg
Tj
total power dissipation
storage temperature
Tmb = 25 °C; Figure 1
−
166
175
175
W
−55
−55
°C
°C
operating junction temperature
Source-drain diode
IS
source (diode forward) current
(DC)
Tmb = 25 °C
−
−
47
A
A
ISM
peak source (diode forward)
current
Tmb = 25 °C; pulsed; tp ≤ 10 µs
187
Avalanche ruggedness
EAS
non-repetitive avalanche energy
unclamped inductive load;
IAS = 30 A; tp = 0.1 ms; VDD ≤ 25 V;
RGS = 50 Ω; VGS = 5 V; starting
Tj = 25 °C; Figure 4
−
45
mJ
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
2 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
03aa24
03aa16
120
der
120
der
I
P
(%)
100
(%)
100
80
60
40
20
0
80
60
40
20
0
0
50
100
150
T
200
(oC)
0
50
100
150
200
(oC)
T
mb
mb
V
GS ≥ 10 V
Ptot
Pder
=
× 100%
----------------------
P
ID
°
tot(25 C)
Ider
=
× 100%
------------------
I
°
D(25 C)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
003aaa097
003aaa098
3
2
10
10
I
I
AS
D
R
= V
/ I
DS D
DSon
(A)
(A)
t
=
p
2
1 µs
10
o
25
C
10 µs
10
100 µs
10
1
1 ms
D.C.
o
T prior to avalanche = 150
C
j
10 ms
100ms
1
1
10
2
3
10
-3
10
-2
10
-1
10
1
10
10
V
(V)
DS
t
(ms)
p
Tmb = 25 °C; IDM is single pulse.
Unclamped inductive load; VDD ≤ 25 V; RGS = 50 Ω;
VGS = 5 V; starting Tj = 25 °C and 150 °C.
Fig 3. Safe operating area; continuous and peak drain
currents as a function of drain-source voltage.
Fig 4. Non-repetitive avalanche ruggedness current
as a function of pulse duration.
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
3 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4: Thermal characteristics
Symbol
Parameter
Conditions
Value
Unit
Rth(j-mb)
thermal resistance from junction to mounting Figure 5
base
0.9
K/W
Rth(j-a)
Rth(j-a)
thermal resistance from junction to ambient
thermal resistance from junction to ambient
SOT78 package; vertical in still air.
60
50
K/W
K/W
SOT404 package; mounted on
printed circuit board; minimum
footprint.
7.1 Transient thermal impedance
003aaa099
1
δ =
Z
th (j-mb)
0.5
(K/W)
0.2
-1
10
0.1
0.05
0.02
t
p
P
-2
10
δ =
Single pulse
T
t
t
p
T
-3
10
-1
10
-7
10
-6
10
-5
10
-4
10
-3
10
-2
10
1
10
t
(s)
p
Fig 5. Transient thermal impedance from junction to mounting base as a function of
pulse duration.
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
4 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
8. Characteristics
Table 5: Characteristics
Tj = 25 °C unless otherwise specified
Symbol
Static characteristics
V(BR)DSS drain-source breakdown
voltage
gate-source threshold voltage ID = 1 mA; VDS = VGS
Parameter
Conditions
Min
Typ
Max
Unit
ID = 250 µA; VGS = 0 V
100
−
−
V
VGS(th)
;
Figure 10
Tj = 25 °C
Tj = 175 °C
2
1
3
4
V
V
−
−
IDSS
drain-source leakage current VGS = 0 V; VDS = 100 V
Tj = 25 °C
Tj = 175 °C
−
−
−
0.05
−
10
µA
µA
nA
500
100
IGSS
gate-source leakage current VDS = 0 V; VGS = ±20 V
2
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A;
Figure 8 and 9
Tj = 25 oC
−
−
20
28
76
mΩ
mΩ
Tj = 175 °C
−
Dynamic characteristics
Qg(tot)
Qgs
Qgd
Ciss
Coss
Crss
td(on)
tr
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
ID = 40 A; VDD = 80 V;
VGS = 10 V; Figure 15
−
−
−
−
−
−
−
−
−
−
66
−
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
12
−
21
−
VGS = 0 V; VDS = 25 V;
f = 1 MHz; Figure 13
2320
315
187
15
3100
378
256
23
VDD = 30 V; RD = 1.2 Ω;
VGS = 10 V; RG = 10 Ω
70
105
116
63
td(off)
tf
turn-off delay time
fall time
83
45
Source-drain diode
VSD
source-drain (diode forward) IS = 25 A; VGS = 0 V;
−
0.85
1.2
V
voltage
Figure 14
trr
reverse recovery time
recovered charge
IS = 47 A;
dIS/dt = −100 A/µs;
VGS = -10 V; VR = 30 V
−
−
66
−
−
ns
Qr
0.24
µC
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
5 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
003aaa100
003aaa101
180
100
20 V
V
= 10 V
8.0 V
I
GS
I
D
160
140
120
D
(A)
(A)
80
7.5 V
7.0 V
60
100
80
6.5 V
6.0 V
5.5 V
40
o
60
40
20
o
T = 175
C
j
20
0
5.0 V
4.5 V
o
25
C
0
0
2
4
6
8
10
0
2
4
6
8
V
(V)
V
(V)
DS
GS
Tj = 25 °C
Tj = 25 °C and 175 °C; VDS > ID × RDSon
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 7. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
003aaa103
003aaa102
2.0
65
6.5 V
6.0 V
V
= 5.5 V
GS
1.8
a
1.6
60
55
R
DSon
(mΩ)
1.4
1.2
1.0
0.8
0.6
50
45
7.0 V
7.5 V
40
35
30
8.0 V
10 V
0.4
25
20
15
0.2
0
-60
-20
20
60
100
140
180
5
25
45
65
85
105
125
(A)
o
I
T ( C)
D
j
Tj = 25 °C
RDSon
a =
---------------------------
RDSon(25 C)
°
Fig 8. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 9. Normalized drain-source on-state resistance
factor as a function of junction temperature.
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
6 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
003aaa078
-1
10
003aaa023
4.5
I
D
(A)
4
-2
V
10
GS(th)
max
(V)
3.5
2%
typ
98%
-3
-4
3
10
typ
2.5
2
10
min
1.5
-5
10
10
1
0.5
0
-6
0
1
2
3
4
5
-60
-20
20
60
100
140
180
V
(V)
GS
o
T ( C)
j
ID = 1 mA; VDS = VGS
Tj = 25 °C
Fig 10. Gate-source threshold voltage as a function of
junction temperature.
Fig 11. Sub-threshold drain current as a function of
gate-source voltage.
003aaa105
003aaa104
5
45
C
iss,
g
fs
C
oss,
40
(S)
C
C
iss
rss
4
35
30
25
(nF)
C
oss
3
2
1
0
C
rss
20
15
10
5
0
-2
-1
10
2
10
10
1
10
0
20
40
60
80
100
V
(V)
I
(A)
DS
D
Tj = 25 °C; VDS = 25 V
VGS = 0 V; f = 1 MHz
Fig 12. Forward transconductance as a function of
drain current; typical values.
Fig 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
7 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
003aaa106
100
003aaa107
10
I
S
V
GS
(A)
80
(V)
8
V
= 20 V
DD
60
o
6
4
2
0
T = 175
j
C
V
= 80 V
DD
o
25
C
40
20
0
0
0.2
0.4
0.6
0.8
1.0
1.2
SD
1.4
0
10
20
30
40
50
60
70
V
(V)
Q
G
(nC)
Tj = 25 °C and 175 °C; VGS = 0 V
ID = 40 A; VDD = 20 V and 80 V
Fig 14. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values.
Fig 15. Gate-source voltage as a function of gate
charge; typical values.
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
8 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
9. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
E
p
A
A
1
q
mounting
base
D
1
D
(1)
L
L
2
1
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
b
L
max.
(1)
2
e
A
b
D
E
L
D
1
L
1
A
c
UNIT
p
q
Q
1
1
4.5
4.1
1.39
1.27
0.9
0.7
1.3
1.0
0.7
0.4
15.8
15.2
6.4
5.9
10.3
9.7
15.0
13.5
3.30
2.79
3.8
3.6
3.0
2.7
2.6
2.2
mm
3.0
2.54
Note
1. Terminals in this zone are not tinned.
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
SC-46
00-09-07
01-02-16
SOT78
3-lead TO-220AB
Fig 16. SOT78 (TO-220AB)
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
9 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
2
Plastic single-ended surface mounted package (Philips version of D -PAK); 3 leads
(one lead cropped)
SOT404
A
A
E
1
mounting
base
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
D
E
A
A
b
UNIT
c
D
e
L
H
Q
1
1
p
D
max.
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
1.60
1.20
10.30
9.70
2.90 15.80 2.60
2.10 14.80 2.20
mm
11
2.54
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
99-06-25
01-02-12
SOT404
Fig 17. SOT404 (D2-PAK).
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
10 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
10. Revision history
Table 6: Revision history
Rev Date
CPCN
-
Description
Product data. Initial version.
01 20010516
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
11 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
11. Data sheet status
[1]
[2]
Data sheet status
Product status
Definition
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips Semiconductors
reserves the right to change the specification in any manner without notice.
Preliminary data
Product data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published at a
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to
improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
make changes at any time in order to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change Notification (CPCN) procedure
SNW-SQ-650A.
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
12. Definitions
13. Disclaimers
Short-form specification — The data in
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
a
short-form specification is
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products
are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
9397 750 08243
© Philips Electronics N.V. 2001 All rights reserved.
Product data
Rev. 01 — 16 May 2001
12 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
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Internet: http://www.semiconductors.philips.com
Building BE, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. +31 40 272 4825
(SCA72)
9397 750 08243
© Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 — 16 May 2001
13 of 14
PHP47NQ10T; PHB47NQ10T
Philips Semiconductors
N-channel enhancement mode field-effect transistor
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Transient thermal impedance . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3
4
5
6
7
7.1
8
9
10
11
12
13
© Philips Electronics N.V. 2001.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 16 May 2001
Document order number: 9397 750 08243
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