934056749118_技术文档

BUK9107-40ATC

TrenchPLUS logic level FET

Rev. 03 — 22 January 2002

Product data

M3D322

1. Description

N-channel enhancement mode ﬁeld-effect power transistor in a plastic package using

TrenchMOS™ technology, featuring very low on-state resistance and TrenchPLUS

diodes for clamping, ElectroStatic Discharge (ESD) protection and temperature

sensing.

Product availability:

BUK9107-40ATC in SOT426 (D²-PAK).

2. Features

■ Typical on-state resistance 5.8 mΩ

■ Q101 compliant

■ ESD and overvoltage protection

■ Monolithically integrated temperature sensor for overload protection.

3. Applications

■ Automotive and power switching:

◆ 12 V and 24 V high power motor drives (e.g. Electrical Power Assisted

Steering (EPAS))

◆ Protected drive for lamps.

4. Pinning information

Table 1:

Pinning - SOT426, simpliﬁed outline and symbol

1

Description

gate (g)

Simpliﬁed outline

Symbol

d

a

2

anode (a)

drain (d)

mb

3

g

4

cathode (k)

source (s)

1

2 3 4 5

5

mb

mounting base;

s

k

MBL306

connected to drain (d)

Front view

MBK127

SOT426 (D²-PAK)

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

5. Quick reference data

Table 2:

Quick reference data

Symbol Parameter

Conditions

Typ

50

-

Max

-

Unit

V

V_DSR(CL)drain-source clamping voltage

T_j= 25 °C; I_GS(CL)= −2 mA; I_D= 1 A

T_mb= 25 °C; V_GS= 5 V

T_mb= 25 °C

I_D

drain current (DC)

140

272

175

7

A

P_tot

T_j

total power dissipation

junction temperature

-

W

-

°C

R_DSon

drain-source on-state resistance

T_j= 25 °C; V_GS= 5 V; I_D= 50 A

T_j= 25 °C; V_GS= 4.5 V; I_D= 50 A

T_j= 25 °C; V_GS= 10 V; I_D= 50 A

T_j= 25 °C; I_F= 250 µA

5.8

6

mΩ

mV

7.7

6.2

668

5.2

658

V_F

S_F

temperature sense diode forward

voltage

temperature sense diode temperature −55 °C < T_j< +175 °C; I_F= 250 µA

−1.54

−1.68

mV/K

coefﬁcient

9397 750 08724

Product data

Rev. 03 — 22 January 2002

2 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

6. Limiting values

Table 3:

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_DS

Parameter

Conditions

Min

Max

40

Unit

V

[1]

[2]

[3]

drain-source voltage (DC)

drain-gate voltage (DC)

gate-source voltage (DC)

drain current (DC)

-

V_DGS

V_GS

I_DG= 250 µA

40

V

±15

140

75

V

I_D

T_mb= 25 °C; V_GS= 5 V;

Figure 2 and 3

A

T_mb= 100 °C; V_GS= 5 V; Figure 2

75

A

I_DM

peak drain current

T_mb= 25 °C; pulsed; t_p≤ 10 µs;

560

A

Figure 3

P_tot

total power dissipation

T_mb= 25 °C; Figure 1

t_p= 5 ms; δ = 0.01

continuous

-

272

50

W

I_DG(CL)

I_GS(CL)

drain-gate clamping current

gate-source clamping current

mA

V

10

t_p= 5 ms; δ = 0.01

50

V_{isol(FET-TSD)}FET to temperature sense diode

isolation voltage

±100

T_stg

T_j

storage temperature

junction temperature

−55

+175

°C

Source-drain diode

[2]

[3]

I_DR

reverse drain current (DC)

T_mb= 25 °C

-

140

75

A

I_DRM

pulsed reverse drain current

T_mb= 25 °C; pulsed; t_p≤ 10 µs

unclamped inductive load; I_D= 75 A;

560

Clamping

E_DS(CL)S

non-repetitive drain-source clamping

energy

-

1.4

6

J

V_DS≤ 40 V; V_GS= 5 V; R_GS= 10 kΩ;

starting T_j= 25 °C

Electrostatic discharge

V_esdelectrostatic discharge voltage; pins

1, 3, 5

Human Body Model; C = 100 pF;

R = 1.5 kΩ

-

kV

[1] Voltage is limited by clamping

[2] Current is limited by power dissipation chip rating

[3] Continuous current is limited by package.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

3 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

03na19

03ne74

120

der

150

D

P

I

(%)

100

(A)

125

80

60

40

20

0

100

75

50

25

0

Capped at 75 A due to package

25

50

75

100

125

150

175

T

200

0

25

50

75 100 125 150 175 200

o

(

C)

T

mb

mb (ºC)

P_tot

P_der

=

× 100%

-----------------------

V_GS≥ 5 V

P

°

tot(25 C)

Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

Fig 2. Continuous drain current as a function of

mounting base temperature.

3

10

I

D

(A)

t

= 10 µs

p

R

= V /I

DS

DSon

D

100 µs

1 ms

2

10

Capped at 75 A due to package

DC

10 ms

10

100 ms

1

2

10

1

10

V

(V)

DS

T_mb= 25 °C; I_DMsingle pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

4 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

7. Thermal characteristics

Table 4:

Symbol Parameter

R_th(j-a)thermal resistance from junction to

ambient

Thermal characteristics

Conditions

Min

Typ

Max Unit

50 K/W

mounted on printed circuit board;

minimum footprint; SOT426 package

-

R_th(j-mb)thermal resistance from junction to

mounting base

Figure 4

-

0.55 K/W

7.1 Transient thermal impedance

1

δ

-1

10

t

p

P

δ =

T

-2

-3

t

p

T

-6

10

-5

10

-4

10

-3

10

-2

10

-1

10

1

10

t

(s)

p

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

5 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

8. Characteristics

Table 5:

T_j= 25 °C unless otherwise speciﬁed.

Symbol Parameter

Static characteristics

Characteristics

Conditions

Min

Typ

Max

Unit

V_(BR)DG

drain-gate zener breakdown I_D= 0.25 mA; V_GS= 0 V

voltage

T_j= 25 °C

40

-

V

T_j= −55 °C

V_GS(th)

gate-source threshold voltage I_D= 1 mA; V_DS= V_GS

Figure 9

;

T_j= 25 °C

T_j= 175 °C

T_j= −55 °C

1

1.5

2

V

0.5

-

2.3

I_DSS

drain-source leakage current V_DS= 40 V; V_GS= 0 V

T_j= 25 °C

-

0.1

-

100

250

-

µA

V

T_j= 175 °C

-

V_(BR)GSS

gate-source breakdown

voltage

I_G= ±1 mA;

12

15

−55 °C < T_j< 175 °C

I_GSS

gate-source leakage current V_GS= ±5 V; V_DS= 0 V

-

5

1000

nA

R_DSon

drain-source on-state

resistance

V_GS= 5 V; I_D= 50 A;

Figure 7 and 8

T_j= 25 °C

-

5.8

-

7

mΩ

mV

T_j= 175 °C

-

14

7.7

6.2

668

V_GS= 4.5 V; I_D= 50 A

V_GS= 10 V; I_D= 50 A

I_F= 250 µA

-

6

-

5.2

658

V_F

S_F

temperature sense diode

forward voltage

648

temperature sense diode

temperature coefﬁcient

I_F= 250 µA;

−55 °C < T_j< 175 °C

−1.4

−1.54

−1.68

mV/K

mV

V_hys

temperature sense diode

forward voltage hysteresis

125 µA < I_F< 250 µA

25

32

50

Dynamic characteristics

C_iss

C_oss

C_rss

t_d(on)

t_r

input capacitance

output capacitance

reverse transfer capacitance

turn-on delay time

rise time

V_GS= 0 V; V_DS= 25 V;

f = 1 MHz; Figure 12

-

5836

958

595

3

-

pF

µs

nH

V_DD= 30 V; R_L= 1.2 Ω;

V_GS= 5 V; R_G= 1 kΩ

10

t_d(off)

t_f

turn-off delay time

fall time

17

11

L_d

internal drain inductance

measured from upper edge

of drain mounting base to

centre of die

2.5

9397 750 08724

Product data

Rev. 03 — 22 January 2002

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BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

Table 5:

Characteristics…continued

T_j= 25 °C unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

L_s

internal source inductance

measured from source lead

to source bond pad

-

7.5

-

nH

Source-drain diode

V_SD

source-drain (diode forward) I_S= 25 A; V_GS= 0 V;

-

0.85

1.2

V

voltage

Figure 19

t_rr

reverse recovery time

recovered charge

I_S= 20 A; dI_S/dt = −100 A/µs

V_GS= −10 V; V_DS= 30 V

-

85

-

ns

Q_r

250

nC

9397 750 08724

Product data

Rev. 03 — 22 January 2002

7 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

03ne79

400

25

I

D

V

4.6

4.4

= 5 V

6

GS

10

R

(A)

350

DSon

(mΩ)

4.2

20

300

250

200

150

100

50

4

3.8

3.6

15

10

5

3.4

3.2

3

2.8

2.6

2.4

2.2

0

2

4

6

8

10

(V)

2

4

6

8

10

(V)

V

GS

DS

T_j= 25 °C; t_p= 300 µs

T_j= 25 °C; I_D= 50 A

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

Fig 6. Drain-source on-state resistance as a function

of gate-source voltage; typical values.

03ne89

2

16

R

DSon

3.6

V

= 3 V

a

GS

(mΩ)

3.2

3.8

4

14

12

10

8

3.4

1.5

1

0.5

0

5

10

6

-60

0

60

120

180

0

50

100

150

200

250

300

(A)

T (ºC)

I

j

D

T_j= 25 °C; t_p= 300µs

R_DSon

a =

----------------------------

R_{DSon(25 C)}

°

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

8 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

03na18

03na17

-1

10

I

2.5

D

V

GS(th)

(A)

(V)

2

max

typ

-2

10

-3

-4

-5

-6

min

1.5

1

typ

max

min

0.5

0

-60

-20

20

60

100

140

180

0

0.5

1

1.5

2

2.5

3

o

T ( C)

V

(V)

j

GS

I_D= 1 mA; V_DS= V_GS

T_j= 25 °C; V_DS= V_GS

Fig 9. Gate-source threshold voltage as a function of

junction temperature.

Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

03ne81

03ne86

140

g

16000

fs

C (pF)

14000

(S)

120

12000

10000

8000

100

80

60

40

20

0

6000

C

iss

4000

2000

C

oss

C

0

rss

-1

10

2

10

-2

0

20

40

60

80

100

(A)

10

1

10

I

D

V

(V)

DS

T_j= 25 °C; V_DS= 25 V

V_GS= 0 V; f = 1 MHz

Fig 11. Forward transconductance as a function of

drain current; typical values.

Fig 12. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

9 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

03ne80

03ne87

100

5

I

V

D

GS

(V)

(A)

80

4

3

2

1

0

V

= 14 V

DS

60

40

20

0

V

= 35 V

DS

0.0

1.0

2.0

3.0

0

20

40

60

80

100

Q

120

(nC)

V

(V)

GS

G

V_DS= 25 V

T_j= 25 °C; I_D= 50 A

Fig 13. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

Fig 14. Gate-source voltage as a function of turn-on

gate charge; typical values.

03ne83

51

54

V

DSR(CL)

(V)

DSR(CL)

T = -55 ºC

T_j= 175 ºC

j

(V)

52

50

48

46

44

42

40

50.5

T = 25 ºC

j

T = 175 ºC

j

50

T_j= 25 ºC

49.5

T_j= -55 ºC

49

48.5

0

1

2

3

0

2

4

6

8

10

I

(A)

-I

(mA)

D

GS(CL)

I_GS(CL)= −2 mA

I_D= 10 A

Fig 15. Drain-source clamping voltage as a function of

drain current; typical values.

Fig 16. Drain-source clamping voltage as a function of

gate current; typical values.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

10 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

03ne84

700

1.70

-S

V

F

(mV/K)

max

typ

(mV)

1.65

1.60

1.55

1.50

1.45

1.40

600

500

400

min

0

50

100

150

200

645

650

655

660

665

670

V

675

(mV)

T (ºC)

j

F

I_F= 250 µA

V_Fat T_j= 25 °C; I_F= 250 µA

Fig 17. Forward voltage of temperature sense diode as

a function of junction temperature; typical

values.

Fig 18. Temperature coefﬁcient of temperature sense

diode as a function of forward voltage; typical

values.

03ne88

100

I

S

(A)

80

T

= 175 ºC

j

60

40

20

0

T

= 25 ºC

j

0.0

0.5

1.0

1.5

V

(V)

SD

V_GS= 0 V

Fig 19. Reverse diode current as a function of reverse diode voltage; typical values.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

11 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

9. Package outline

2

Plastic single-ended surface mounted package (Philips version of D -PAK); 5 leads

(one lead cropped)

SOT426

A

E

1

D

1

mounting

base

D

H

D

3

L

p

1

2

4

5

b

c

e

Q

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

D

A

L

H

Q

UNIT

b

c

D

E

e

1

p

D

1

max.

1.40

1.27

4.50

4.10

0.85

0.60

0.64

0.46

2.90 15.80 2.60

2.10 14.80 2.20

1.60

1.20

10.30

9.70

mm

11

1.70

REFERENCES

JEDEC

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

EIAJ

98-12-14

99-06-25

SOT426

Fig 20. SOT426.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

12 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

10. Soldering

10.85

10.60

10.50

handbook, full pagewidth

1.50

7.50

7.40

1.70

2.15

1.50

2.25

8.275

8.35

8.15

4.60

0.30

4.85

5.40

7.95

8.075

3.00

0.20

0.90

1.00

solder lands

solder resist

occupied area

solder paste

1.70

(2×)

3.40

8.15

MSD058

Dimensions in mm.

Fig 21. Reﬂow soldering footprint for SOT426.

9397 750 08724

Product data

Rev. 03 — 22 January 2002

13 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

11. Revision history

Table 6:

Revision history

CPCN

Rev Date

Description

03 20020122

02 20010829

-

Product data; third version (9397 750 08724); supersedes second version of 20010829

Product data; second version (9397 750 08709); supersedes initial version of

20010814

• Units of symbol ‘R_DSon’ changed from ‘µΩ’ to ‘mΩ’ in Table 2

• Units of timing parameters changed from ‘ns’ to ‘µs’ in Table 5

• Values of timing parameters changed in Table 5

01 20010814

-

Product data; initial version (9397 750 08319)

9397 750 08724

Product data

Rev. 03 — 22 January 2002

14 of 16

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

12. Data sheet status

Data sheet status^[1]

Product status^[2]

Deﬁnition

Objective data

Development

This data sheet contains data from the objective speciﬁcation for product development. Philips Semiconductors

reserves the right to change the speciﬁcation in any manner without notice.

Preliminary data

Product data

Qualiﬁcation

Production

This data sheet contains data from the preliminary speciﬁcation. Supplementary data will be published at a

later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in order to

improve the design and supply the best possible product.

This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the right to

make changes at any time in order to improve the design, manufacturing and supply. Changes will be

communicated according to the Customer Product/Process Change Notiﬁcation (CPCN) procedure

SNW-SQ-650A.

[1]

[2]

Please consult the most recently issued data sheet before initiating or completing a design.

The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

13. Deﬁnitions

14. Disclaimers

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors

customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values deﬁnition — Limiting values given are in accordance with

the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device.

These are stress ratings only and operation of the device at these or at any

other conditions above those given in the Characteristics sections of the

speciﬁcation is not implied. Exposure to limiting values for extended periods

may affect device reliability.

Right to make changes — Philips Semiconductors reserves the right to

make changes, without notice, in the products, including circuits, standard

cells, and/or software, described or contained herein in order to improve

design and/or performance. Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no

licence or title under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that these products are

free from patent, copyright, or mask work right infringement, unless otherwise

speciﬁed.

Application information — Applications that are described herein for any

of these products are for illustrative purposes only. Philips Semiconductors

make no representation or warranty that such applications will be suitable for

the speciﬁed use without further testing or modiﬁcation.

15. Trademarks

TrenchMOS — is a registered trademark of Koninklijke Philips Electronics

N.V.

Contact information

For additional information, please visit http://www.semiconductors.philips.com.

For sales ofﬁce addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.

Fax: +31 40 27 24825

15 of 16

9397 750 08724

Product data

Rev. 03 — 22 January 2002

BUK9107-40ATC

Philips Semiconductors

TrenchPLUS logic level FET

Contents

1

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pinning information. . . . . . . . . . . . . . . . . . . . . . 1

Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

Thermal characteristics. . . . . . . . . . . . . . . . . . . 5

Transient thermal impedance . . . . . . . . . . . . . . 5

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12

Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14

Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 15

Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2

3

4

5

6

7

7.1

8

9

10

11

12

13

14

15

Printed in The Netherlands

All rights are reserved. Reproduction in whole or in part is prohibited without the prior

written consent of the copyright owner.

The information presented in this document does not form part of any quotation or

contract, is believed to be accurate and reliable and may be changed without notice. No

liability will be accepted by the publisher for any consequence of its use. Publication

thereof does not convey nor imply any license under patent- or other industrial or

intellectual property rights.

Date of release: 22 January 2002

Document order number: 9397 750 08724


型号：	934056749118
厂家：	NXP
描述：	TRANSISTOR 75 A, 40 V, 0.007 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, SMD, D2PAK-5, FET General Purpose Power 开关脉冲晶体管
文件：	总16页 (文件大小：383K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

934056749118 [NXP]

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