74AHC3G04DC [PHILIPS]

Inverter, CMOS, PDSO8,;
74AHC3G04DC
型号: 74AHC3G04DC
厂家: PHILIPS SEMICONDUCTORS    PHILIPS SEMICONDUCTORS
描述:

Inverter, CMOS, PDSO8,

栅 光电二极管 逻辑集成电路 触发器
文件: 总16页 (文件大小:78K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
DATA SHEET  
74AHC3G04; 74AHCT3G04  
Inverter  
Product specification  
2003 Nov 06  
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
FEATURES  
DESCRIPTION  
Symmetrical output impedance  
High noise immunity  
The 74AHC3G04/74AHCT3G04 are high-speed Si-gate  
CMOS devices.  
The 74AHC3G04/74AHCT3G04 provides three inverting  
buffer.  
ESD protection:  
– HBM EIA/JESD22-A114-A exceeds 2000 V  
– MM EIA/JESD22-A115-A exceeds 200 V  
– CDM EIA/JESD22-C101 exceeds 1000 V.  
Low power dissipation  
Balanced propagation delays  
SOT505-2 and SOT765-1 package  
Specified from 40 to +85 °C and 40 to +125 °C.  
QUICK REFERENCE DATA  
GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.  
TYPICAL  
SYMBOL  
PARAMETER  
CONDITIONS  
UNIT  
ns  
74AHC3G04 74AHCT3G04  
tPHL/tPLH propagation delay input A to output Y CL = 15 pF; VCC = 5 V  
3.1  
1.5  
9
3.4  
1.5  
10  
CI  
input capacitance  
pF  
pF  
CPD  
power dissipation capacitance  
CL = 50 pF; f = 1 MHz;  
notes 1 and 2  
Notes  
1. CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in Volts;  
N = total load switching outputs;  
(CL × VCC2 × fo) = sum of outputs.  
2. The condition is VI = GND to VCC  
.
FUNCTION TABLE  
See note 1.  
INPUT  
OUTPUT  
nA  
L
nY  
H
H
L
Note  
1. H = HIGH voltage level;  
L = LOW voltage level.  
2003 Nov 06  
2
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
ORDERING AND PACKAGE INFORMATION  
PACKAGES  
PACKAGE MATERIAL  
TYPE NUMBER  
TEMPERATURE  
PINS  
CODE  
MARKING  
RANGE  
74AHC3G04DP  
74AHCT3G04DP  
74AHC3G04DC  
74AHCT3G04DC  
40 to +125 °C  
40 to +125 °C  
40 to +125 °C  
40 to +125 °C  
8
8
8
8
TSSOP8  
TSSOP8  
VSSOP8  
VSSOP8  
plastic  
plastic  
plastic  
plastic  
SOT505-2  
SOT505-2  
SOT765-1  
SOT765-1  
A04  
C04  
A04  
C04  
PINNING  
PIN  
SYMBOL  
DESCRIPTION  
1
2
3
4
5
6
7
8
1A  
3Y  
2A  
data input  
data output  
data input  
GND  
2Y  
ground (0 V)  
data output  
data input  
3A  
1Y  
data output  
supply voltage  
VCC  
handbook, halfpage  
handbook, halfpage  
1
3
6
1A  
2A  
3A  
1Y  
2Y  
3Y  
7
5
2
1A  
1
2
3
4
8
7
6
5
V
CC  
3Y  
2A  
1Y  
3A  
2Y  
04  
GND  
MNA719  
MNA720  
Fig.1 Pin configuration.  
Fig.2 Logic symbol.  
2003 Nov 06  
3
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
handbook, halfpage  
1
1
1
1
7
5
2
handbook, halfpage  
3
6
Y
A
MNA110  
MNA721  
Fig.3 IEC logic symbol.  
Fig.4 Logic diagram.  
RECOMMENDED OPERATING CONDITIONS  
74AHC3G04  
74AHCT3G04  
SYMBOL  
VCC  
PARAMETER  
supply voltage  
CONDITIONS  
UNIT  
MIN. TYP. MAX. MIN. TYP. MAX.  
2.0  
0
5.0  
5.5  
5.5  
VCC  
4.5  
0
5.0  
5.5  
5.5  
VCC  
V
V
V
VI  
input voltage  
VO  
output voltage  
0
0
Tamb  
operating ambient  
temperature  
see DC and AC  
characteristics per device  
40  
+25  
+125 40  
+25  
+125 °C  
tr, tf (t/f) input rise and fall times VCC = 3.3 ±0.3 V  
CC = 5 ±0.5 V  
100  
20  
ns/V  
ns/V  
V
20  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).  
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT  
VCC supply voltage  
0.5 +7.0  
0.5 +7.0  
V
VI  
input voltage  
V
IIK  
IOK  
IO  
input diode current  
output diode current  
output source or sink current  
VCC or GND current  
storage temperature  
power dissipation  
VI < 0.5 V  
20  
±20  
±25  
±75  
mA  
mA  
mA  
mA  
0.5 V < VO < VCC + 0.5 V; note 1  
0.5 V < VO < VCC + 0.5 V  
ICC, IGND  
Tstg  
PD  
65  
+150 °C  
250 mW  
Tamb = 40 to +125 °C  
Note  
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2003 Nov 06  
4
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
DC CHARACTERISTICS  
Type 74AHC3G04  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
TEST CONDITIONS  
SYMBOL  
PARAMETER  
MIN.  
TYP.  
MAX. UNIT  
OTHER  
VCC (V)  
Tamb = 25 °C  
VIH  
HIGH-level input  
voltage  
2.0  
3.0  
5.5  
2.0  
3.0  
5.5  
1.5  
V
V
V
V
V
V
2.1  
3.85  
VIL  
LOW-level input  
voltage  
0.5  
0.9  
1.65  
VOH  
HIGH-level output  
voltage  
VI = VIH or VIL  
IO = 50 µA  
IO = 50 µA  
IO = 50 µA  
2.0  
3.0  
4.5  
3.0  
4.5  
1.9  
2.0  
3.0  
4.5  
V
V
V
V
V
2.9  
4.4  
IO = 4.0 mA  
IO = 8.0 mA  
VI = VIH or VIL  
IO = 50 µA  
2.58  
3.94  
VOL  
LOW-level output  
voltage  
2.0  
3.0  
4.5  
3.0  
4.5  
5.5  
0
0
0
0.1  
V
IO = 50 µA  
0.1  
V
IO = 50 µA  
0.1  
V
IO = 4.0 mA  
IO = 8.0 mA  
VI = VCC or GND  
0.36  
0.36  
0.1  
V
V
ILI  
input leakage  
current  
µA  
ICC  
CI  
quiescent supply  
current  
VI = VCC or GND; IO = 0  
5.5  
10  
10  
µA  
input capacitance  
1.5  
pF  
2003 Nov 06  
5
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
TEST CONDITIONS  
OTHER  
SYMBOL  
PARAMETER  
MIN.  
TYP.  
MAX. UNIT  
V
CC (V)  
Tamb = 40 to +85 °C  
VIH  
HIGH-level input  
voltage  
2.0  
3.0  
5.5  
2.0  
3.0  
5.5  
1.5  
V
V
V
V
V
V
2.1  
3.85  
VIL  
LOW-level input  
voltage  
0.5  
0.9  
1.65  
VOH  
HIGH-level output  
voltage  
VI = VIH or VIL  
IO = 50 µA  
IO = 50 µA  
IO = 50 µA  
2.0  
3.0  
4.5  
3.0  
4.5  
1.9  
2.9  
4.4  
2.48  
3.8  
V
V
V
V
V
IO = 4.0 mA  
IO = 8.0 mA  
VI = VIH or VIL  
IO = 50 µA  
VOL  
LOW-level output  
voltage  
2.0  
3.0  
4.5  
3.0  
4.5  
5.5  
0.1  
V
IO = 50 µA  
0.1  
V
IO = 50 µA  
0.1  
V
IO = 4.0 mA  
IO = 8.0 mA  
VI = VCC or GND  
0.44  
0.44  
1.0  
V
V
ILI  
input leakage  
current  
µA  
ICC  
CI  
quiescent supply  
current  
VI = VCC or GND; IO = 0  
5.5  
10  
10  
µA  
input capacitance  
pF  
2003 Nov 06  
6
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
TEST CONDITIONS  
OTHER  
SYMBOL  
PARAMETER  
MIN.  
TYP.  
MAX. UNIT  
V
CC (V)  
Tamb = 40 to +125 °C  
VIH  
HIGH-level input  
voltage  
2.0  
3.0  
5.5  
2.0  
3.0  
5.5  
1.5  
V
V
V
V
V
V
2.1  
3.85  
VIL  
LOW-level input  
voltage  
0.5  
0.9  
1.65  
VOH  
HIGH-level output  
voltage  
VI = VIH or VIL  
IO = 50 µA  
IO = 50 µA  
IO = 50 µA  
2.0  
3.0  
4.5  
3.0  
4.5  
1.9  
V
V
V
V
V
2.9  
4.4  
IO = 4.0 mA  
IO = 8.0 mA  
VI = VIH or VIL  
IO = 50 µA  
2.40  
3.70  
VOL  
LOW-level output  
voltage  
2.0  
3.0  
4.5  
3.0  
4.5  
5.5  
0.1  
V
IO = 50 µA  
0.1  
V
IO = 50 µA  
0.1  
V
IO = 4.0 mA  
IO = 8.0 mA  
VI = VCC or GND  
0.55  
0.55  
2.0  
V
V
ILI  
input leakage  
current  
µA  
ICC  
CI  
quiescent supply  
current  
VI = VCC or GND; IO = 0  
5.5  
40  
10  
µA  
input capacitance  
pF  
2003 Nov 06  
7
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
Type 74AHCT3G04  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
TEST CONDITIONS  
SYMBOL  
PARAMETER  
MIN.  
TYP. MAX. UNIT  
OTHER  
VCC (V)  
Tamb = 25 °C  
VIH  
VIL  
HIGH-level input voltage  
LOW-level input voltage  
4.5 to 5.5  
4.5 to 5.5  
2.0  
V
V
0.8  
VOH  
HIGH-level output voltage VI = VIH or VIL  
IO = 50 µA  
4.5  
4.5  
4.4  
4.5  
V
V
IO = 8.0 mA  
3.94  
VOL  
LOW-level output voltage  
VI = VIH or VIL  
IO = 50 µA  
4.5  
4.5  
5.5  
5.5  
5.5  
0
0.1  
V
IO = 8.0 mA  
0.36  
0.1  
V
ILI  
input leakage current  
VI = VIH or VIL  
VI = VCC or GND; IO = 0  
µA  
µA  
mA  
ICC  
ICC  
quiescent supply current  
1.0  
additional quiescent supply VI = 3.4 V; other inputs at  
1.35  
current per input pin  
VCC or GND; IO = 0  
CI  
input capacitance  
1.5  
10  
pF  
Tamb = 40 to +85 °C  
VIH  
VIL  
HIGH-level input voltage  
LOW-level input voltage  
4.5 to 5.5  
4.5 to 5.5  
2.0  
V
V
0.8  
VOH  
HIGH-level output voltage VI = VIH or VIL  
IO = 50 µA  
4.5  
4.5  
4.4  
3.8  
V
V
IO = 8.0 mA  
VOL  
LOW-level output voltage  
VI = VIH or VIL  
IO = 50 µA  
4.5  
4.5  
5.5  
5.5  
5.5  
0.1  
0.44  
1.0  
10  
V
IO = 8.0 mA  
V
ILI  
input leakage current  
VI = VIH or VIL  
VI = VCC or GND; IO = 0  
µA  
µA  
mA  
ICC  
ICC  
quiescent supply current  
additional quiescent supply VI = 3.4 V; other inputs at  
1.5  
current per input pin  
VCC or GND; IO = 0  
CI  
input capacitance  
10  
pF  
2003 Nov 06  
8
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
TEST CONDITIONS  
OTHER  
SYMBOL  
PARAMETER  
MIN.  
TYP. MAX. UNIT  
VCC (V)  
Tamb = 40 to +125 °C  
VIH  
VIL  
HIGH-level input voltage  
LOW-level input voltage  
4.5 to 5.5  
4.5 to 5.5  
2.0  
V
V
0.8  
VOH  
HIGH-level output voltage VI = VIH or VIL  
IO = 50 µA  
4.5  
4.5  
4.4  
V
V
IO = 8.0 mA  
3.70  
VOL  
LOW-level output voltage  
VI = VIH or VIL  
IO = 50 µA  
4.5  
4.5  
5.5  
5.5  
5.5  
0.1  
0.55  
2.0  
40  
V
IO = 8.0 mA  
V
ILI  
input leakage current  
VI = VIH or VIL  
VI = VCC or GND; IO = 0  
µA  
µA  
mA  
ICC  
ICC  
quiescent supply current  
additional quiescent supply VI = 3.4 V; other inputs at  
1.5  
current per input pin  
VCC or GND; IO = 0  
CI  
input capacitance  
10  
pF  
2003 Nov 06  
9
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
AC CHARACTERISTICS  
Type 74AHC3G04  
GND = 0 V; tr = tf 3.0 ns.  
TEST CONDITIONS  
WAVEFORMS CL (pF)  
SYMBOL  
PARAMETER  
MIN. TYP. MAX. UNIT  
VCC (V)  
Tamb = 25 °C  
tPHL/tPLH  
propagation delay input nA to see Figs 5 and 6 15  
output nY  
3.0 to 3.6  
3.3  
7.1  
ns  
ns  
ns  
ns  
4.3  
4.5 to 5.5  
5
5.5  
3.1  
50  
3.0 to 3.6  
3.3  
10.6 ns  
6.1  
ns  
ns  
ns  
4.5 to 5.5  
5
7.5  
4.5  
T
amb = 40 to +85 °C  
tPHL/tPLH  
propagation delay input nA to see Figs 5 and 6 15  
output nY  
3.0 to 3.6 1.0  
4.5 to 5.5 1.0  
3.0 to 3.6 1.0  
4.5 to 5.5 1.0  
8.5  
6.5  
12  
ns  
ns  
ns  
ns  
50  
8.5  
Tamb = 40 to +125 °C  
tPHL/tPLH  
propagation delay input nA to see Figs 5 and 6 15  
output nY  
3.0 to 3.6 1.0  
4.5 to 5.5 1.0  
3.0 to 3.6 1.0  
4.5 to 5.5 1.0  
11.0 ns  
7.0 ns  
14.5 ns  
9.5 ns  
50  
Type 74AHCT3G04  
GND = 0 V; tr = tf 3.0 ns.  
TEST CONDITIONS  
WAVEFORMS CL (pF)  
SYMBOL  
PARAMETER  
MIN. TYP. MAX. UNIT  
VCC (V)  
Tamb = 25 °C  
tPHL/tPLH  
propagation delay input nA to see Figs 5 and 6 15  
output nY  
4.5 to 5.5  
6.7  
ns  
ns  
ns  
ns  
5
3.4  
50  
4.5 to 5.5  
5
7.7  
4.9  
Tamb = 40 to +85 °C  
tPHL/tPLH  
propagation delay input nA to see Figs 5 and 6 15  
4.5 to 5.5 1.0  
4.5 to 5.5 1.0  
7.5  
8.5  
ns  
ns  
output nY  
50  
2003 Nov 06  
10  
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
TEST CONDITIONS  
WAVEFORMS CL (pF)  
SYMBOL  
PARAMETER  
MIN. TYP. MAX. UNIT  
VCC (V)  
Tamb = 40 to +125 °C  
tPHL/tPLH  
propagation delay input nA to see Figs 5 and 6 15  
4.5 to 5.5 1.0  
4.5 to 5.5 1.0  
8.5  
ns  
output nY  
50  
10.0 ns  
AC WAVEFORMS  
V
handbook, halfpage  
I
V
V
M
nA input  
M
GND  
t
t
PHL  
PLH  
V
OH  
90%  
V
V
nY output  
M
M
10%  
V
OL  
t
t
TLH  
MNA722  
THL  
VI INPUT  
VM  
VM  
TYPE  
REQUIREMENTS INPUT OUTPUT  
74AHC3G04  
GND to VCC  
50% VCC 50% VCC  
1.5 V 50% VCC  
74AHCT3G04  
GND to 3.0 V  
Fig.5 Input (nA) to output (nY) propagation delays.  
2003 Nov 06  
11  
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
V
handbook, halfpage  
CC  
V
V
O
I
PULSE  
GENERATOR  
D.U.T.  
C
L
R
T
MNA101  
Definitions for test circuit:  
CL = load capacitance including jig and probe capacitance (see Chapter “AC characteristics”).  
RT = termination resistance should be equal to the output impedance Z0 of the pulse generator.  
Fig.6 Load circuitry for switching times.  
2003 Nov 06  
12  
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
PACKAGE OUTLINES  
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm  
SOT505-2  
D
E
A
X
c
H
v
M
y
A
E
Z
5
8
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
detail X  
1
4
e
w
M
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT  
v
w
y
Z
θ
1
2
3
p
max.  
0.15  
0.00  
0.95  
0.75  
0.38  
0.22  
0.18  
0.08  
3.1  
2.9  
3.1  
2.9  
4.1  
3.9  
0.47  
0.33  
0.70  
0.35  
8°  
0°  
mm  
1.1  
0.25  
0.65  
0.5  
0.2  
0.13  
0.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-01-16  
SOT505-2  
- - -  
2003 Nov 06  
13  
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm  
SOT765-1  
D
E
A
X
c
y
H
v
M
A
E
Z
5
8
Q
A
2
A
A
1
(A )  
3
pin 1 index  
θ
L
p
L
detail X  
1
4
e
w
M
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
A
A
A
b
c
D
E
e
H
L
L
p
Q
UNIT  
v
w
y
Z
θ
1
2
3
p
E
max.  
0.15  
0.00  
0.85  
0.60  
0.27  
0.17  
0.23  
0.08  
2.1  
1.9  
2.4  
2.2  
3.2  
3.0  
0.40  
0.15  
0.21  
0.19  
0.4  
0.1  
8°  
0°  
mm  
1
0.12  
0.5  
0.4  
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-06-07  
SOT765-1  
MO-187  
2003 Nov 06  
14  
Philips Semiconductors  
Product specification  
Inverter  
74AHC3G04; 74AHCT3G04  
DATA SHEET STATUS  
DATA SHEET  
LEVEL  
PRODUCT  
STATUS(2)(3)  
DEFINITION  
STATUS(1)  
I
Objective data  
Development This data sheet contains data from the objective specification for product  
development. Philips Semiconductors reserves the right to change the  
specification in any manner without notice.  
II  
Preliminary data Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in order  
to improve the design, manufacturing and supply. Relevant changes will  
be communicated via a Customer Product/Process Change Notification  
(CPCN).  
Notes  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
DEFINITIONS  
DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes in the products -  
including circuits, standard cells, and/or software -  
described or contained herein in order to improve design  
and/or performance. When the product is in full production  
(status ‘Production’), relevant changes will be  
Application information  
Applications that are  
communicated via a Customer Product/Process Change  
Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these  
products, conveys no licence or title under any patent,  
copyright, or mask work right to these products, and  
makes no representations or warranties that these  
products are free from patent, copyright, or mask work  
right infringement, unless otherwise specified.  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2003 Nov 06  
15  
Philips Semiconductors – a worldwide company  
Contact information  
For additional information please visit http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.  
© Koninklijke Philips Electronics N.V. 2003  
SCA75  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
01/pp16  
Date of release: 2003 Nov 06  
Document order number: 9397 750 12118  

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