74AHC3G04DP-Q100 [NEXPERIA]
The 74AHC3G04-Q100; 74AHCT3G04-Q100 are high-speed Si-gate CMOS devices. They provide three inverting buffers;型号: | 74AHC3G04DP-Q100 |
厂家: | Nexperia |
描述: | The 74AHC3G04-Q100; 74AHCT3G04-Q100 are high-speed Si-gate CMOS devices. They provide three inverting buffers 光电二极管 逻辑集成电路 |
文件: | 总11页 (文件大小:211K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74AHC3G04-Q100;
74AHCT3G04-Q100
Inverter
Rev. 2 — 19 November 2018
Product data sheet
1. General description
The 74AHC3G04-Q100; 74AHCT3G04-Q100 are high-speed Si-gate CMOS devices. They provide
three inverting buffers.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
•
•
•
•
Symmetrical output impedance
High noise immunity
ESD protection:
•
•
•
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 Ω)
•
•
Low power dissipation
Balanced propagation delays
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC3G04DP-Q100
-40 °C to +125 °C
TSSOP8
plastic thin shrink small outline package; 8 leads; SOT505-2
body width 3 mm; lead length 0.5 mm
74AHC3G04DC-Q100
74AHCT3G04DC-Q100
-40 °C to +125 °C
VSSOP8
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
SOT765-1
4. Marking
Table 2. Marking codes
Type number
Marking code[1]
74AHC3G04DP-Q100
74AHC3G04DC-Q100
74AHCT3G04DC-Q100
A04
A04
C04
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
5. Functional diagram
1
1
1
3
6
7
5
2
1
3
6
1A
2A
3A
1Y
2Y
3Y
7
5
2
1
Y
A
mna720
mna721
mna110
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
Fig. 3. Logic diagram (one gate)
6. Pinning information
6.1. Pinning
74AHC3G04
74AHCT3G04
1
2
3
4
8
7
6
5
1A
3Y
V
CC
1Y
3A
2Y
2A
GND
001aaj514
Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2. Pin description
Table 3. Pin description
Symbol
1A, 2A, 3A
GND
Pin
1, 3, 6
4
Description
data input
ground (0 V)
data output
supply voltage
1Y, 2Y, 3Y
VCC
7, 5, 2
8
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level
Input nA
Output nY
L
H
L
H
©
74AHC_AHCT3G04_Q100
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Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
2 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
-0.5
-0.5
-20
-
Max
+7.0
+7.0
-
Unit
V
supply voltage
input voltage
V
IIK
input clamping current
output clamping current
output current
VI < -0.5 V
[1]
[1]
mA
mA
mA
mA
mA
°C
IOK
VO < -0.5 V or VO > VCC + 0.5 V
-0.5 V < VO < VCC + 0.5 V
±20
±25
75
IO
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
-75
-65
-
-
storage temperature
total power dissipation
+150
250
Tamb = -40 °C to +125 °C
[2]
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
74AHC3G04-Q100
74AHCT3G04-Q100
Unit
Min
Typ
Max
Min
4.5
0
Typ
Max
5.5
VCC
VI
supply voltage
input voltage
2.0
0
5.0
5.5
5.5
5.0
V
V
V
-
-
5.5
VO
output voltage
ambient temperature
0
-
VCC
+125
100
20
0
-
VCC
Tamb
Δt/ΔV
-40
-
+25
-40
-
+25
+125 °C
input transition rise and VCC = 3.3 V ± 0.3 V
fall rate
-
-
-
-
-
ns/V
ns/V
VCC = 5.0 V ± 0.5 V
-
-
20
10. Static characteristics
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
74AHC3G04-Q100
VIH
HIGH-level
input voltage
VCC = 2.0 V
VCC = 3.0 V
VCC = 5.5 V
VCC = 2.0 V
VCC = 3.0 V
VCC = 5.5 V
1.5
-
-
-
-
-
-
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
2.1
2.1
2.1
3.85
-
3.85
-
3.85
-
VIL
LOW-level
input voltage
-
-
-
0.5
0.9
1.65
-
-
-
0.5
0.9
1.65
-
-
-
0.5
0.9
1.65
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
3 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
Symbol Parameter
Conditions
25 °C
Min Typ Max
-40 °C to +85 °C -40 °C to +125 °C Unit
Min
Max
Min
Max
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = -50 μA; VCC = 2.0 V
1.9
2.9
4.4
2.0
3.0
4.5
-
-
-
-
-
-
1.9
2.9
-
-
-
-
-
1.9
2.9
-
-
-
-
-
V
V
V
V
V
IO = -50 μA; VCC = 3.0 V
IO = -50 μA; VCC = 4.5 V
4.4
4.4
IO = -4.0 mA; VCC = 3.0 V 2.58
IO = -8.0 mA; VCC = 4.5 V 3.94
2.48
3.8
2.40
3.70
-
VOL
LOW-level
VI = VIH or VIL
output voltage
IO = 50 μA; VCC = 2.0 V
-
-
-
-
-
-
0
0
0
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
V
IO = 50 μA; VCC = 3.0 V
IO = 50 μA; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
V
0.1
0.1
0.1
V
0.36
0.36
0.1
0.44
0.44
1.0
0.55
0.55
2.0
V
-
V
II
input leakage VI = 5.5 V or GND;
current VCC = 0 V to 5.5 V
-
μA
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
-
1.0
10
-
-
10
10
-
-
40
10
μA
pF
input
1.5
capacitance
74AHCT3G04-Q100
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = -50 μA
4.4
4.5
-
-
-
4.4
3.8
-
-
4.4
-
-
V
V
IO = -8.0 mA
3.94
3.70
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 50 μA
-
-
-
0
-
0.1
0.36
0.1
-
-
-
0.1
0.44
1.0
-
-
-
0.1
0.55
2.0
V
IO = 8.0 mA
V
II
input leakage VI = 5.5 V or GND;
current VCC = 0 V to 5.5 V
-
μA
ICC
ΔICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
-
-
1.0
-
-
10
-
-
40
μA
additional
per input pin; VI = 3.4 V;
1.35
1.5
1.5
mA
supply current other inputs at VCC or GND;
IO = 0 A; VCC = 5.5 V
CI
input
-
1.5
10
-
10
-
10
pF
capacitance
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
4 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
11. Dynamic characteristics
Table 8. Dynamic characteristics
GND = 0 V; for test circuit see Fig. 6.
Symbol Parameter Conditions
74AHC3G04-Q100
25 °C
Min Typ Max
-40 °C to +85 °C -40 °C to +125 °C Unit
Min
Max
Min
Max
tpd
propagation nA to nY; see Fig. 5
[1]
[2]
delay
VCC = 3.0 V to 3.6 V
CL = 15 pF
CL = 50 pF
-
-
4.3
7.1
1.0
1.0
8.5
1.0
1.0
11.0
14.5
ns
ns
6.1 10.6
12.0
VCC = 4.5 V to 5.5 V
CL = 15 pF
[3]
[4]
-
-
-
3.1
4.5
9
5.5
7.5
-
1.0
1.0
-
6.5
8.5
-
1.0
1.0
-
7.0
9.5
-
ns
ns
pF
CL = 50 pF
CPD
power
per buffer; CL = 50 pF;
fi = 1 MHz;
dissipation
capacitance VI = GND to VCC
74AHCT3G04-Q100
tpd
propagation nA to nY; See Fig. 5;
[1][3]
[4]
delay
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
-
-
3.4
4.9
10
6.7
7.7
-
1.0
1.0
-
7.5
8.5
-
1.0
1.0
-
8.5
10.0
-
ns
ns
pF
CL = 50 pF
CPD
power
dissipation
per buffer; CL = 50 pF;
fi = 1 MHz;
capacitance VI = GND to VCC
[1] tpd is the same as tPLH and tPHL
.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC2 x fi x N + Σ(CL x VCC2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC2 x fo) = sum of the outputs.
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
5 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
11.1. Waveforms and test circuit
V
I
V
V
M
nA input
M
GND
t
t
PHL
PLH
V
OH
V
M
V
M
nY output
V
mna344
OL
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 5. The input (nA) to output (nY) propagation delays
Table 9. Measurement points
Type
Input
VM
Output
VM
74AHC3G04-Q100
0.5VCC
0.5VCC
0.5VCC
74AHCT3G04-Q100 1.5 V
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
I
V
O
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance; RL = Load resistance; S1 = Test selection switch.
Fig. 6. Test circuit for measuring switching times
Table 10. Test data
Type
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
CL
RL
tPZH, tPHZ
GND
tPZL, tPLZ
VCC
74AHC3G04-Q100
VCC
≤ 3 ns
≤ 3 ns
15 pF, 50 pF
15 pF, 50 pF
1 kΩ
1 kΩ
74AHCT3G04-Q100 3 V
open
GND
VCC
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
6 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
12. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c
H
v
M
y
A
E
Z
5
8
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
detail X
1
4
e
w
M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
max.
0.15
0.00
0.95
0.75
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
4.1
3.9
0.47
0.33
0.70
0.35
8°
0°
mm
1.1
0.65
0.5
0.2
0.13
0.1
0.25
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-01-16
SOT505-2
- - -
Fig. 7. Package outline SOT505-2 (TSSOP8)
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
7 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A
X
c
y
H
E
v
A
Z
5
8
Q
A
2
A
A
(A )
3
1
pin 1 index
θ
L
p
detail X
1
4
L
e
w
b
p
0
5 mm
scale
Dimensions (mm are the original dimensions)
A
(1)
(2)
(1)
Unit
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
max
mm nom
min
0.15 0.85
0.00 0.60
0.27 0.23 2.1 2.4
0.17 0.08 1.9 2.2
3.2
3.0
0.40 0.21
0.15 0.19
0.4
8°
0°
1
0.12
0.5
0.4
0.2 0.08 0.1
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
sot765-1_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
07-06-02
16-05-31
SOT765-1
MO-187
Fig. 8. Package outline SOT765-1 (VSSOP8)
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
8 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
13. Abbreviations
Table 11. Abbreviations
Acronym
CDM
CMOS
DUT
Description
Charged Device Model
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MIL
Military
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 12. Revision history
Document ID
Release date
Data sheet status Change notice
Product data sheet
Supersedes
74AHC_AHCT3G04_Q100 v.2 20181119
-
74AHC_AHCT3G04_Q100 v.1
Modifications:
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type number 74AHCT3G04DP-Q100 removed.
74AHC_AHCT3G04_Q100 v.1 20130326
Product data sheet
-
-
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
9 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
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risk.
15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
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or warranty that such applications will be suitable for the specified use
without further testing or modification.
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data sheet
Development
This document contains data from
the objective specification for
product development.
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data sheet
Qualification
Production
This document contains data from
the preliminary specification.
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Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
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modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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with the same product type number(s) and title. A short data sheet is
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valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Disclaimers
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
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representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
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between the translated and English versions.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
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profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
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Trademarks
Notice: All referenced brands, product names, service names and
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Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
10 / 11
Nexperia
74AHC3G04-Q100; 74AHCT3G04-Q100
Inverter
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Marking..........................................................................1
5. Functional diagram.......................................................2
6. Pinning information......................................................2
6.1. Pinning.........................................................................2
6.2. Pin description.............................................................2
7. Functional description................................................. 2
8. Limiting values............................................................. 3
9. Recommended operating conditions..........................3
10. Static characteristics..................................................3
11. Dynamic characteristics.............................................5
11.1. Waveforms and test circuit........................................ 6
12. Package outline.......................................................... 7
13. Abbreviations..............................................................9
14. Revision history..........................................................9
15. Legal information......................................................10
© Nexperia B.V. 2018. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 19 November 2018
©
74AHC_AHCT3G04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2018. All rights reserved
Product data sheet
Rev. 2 — 19 November 2018
11 / 11
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