NVMFS003P03P8ZT1G [ONSEMI]
Power MOSFET - Power, Single P-Channel, SO8-FL -30 V, 1.8 mΩ, -234 A;
| 型号： | NVMFS003P03P8ZT1G |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET - Power, Single P-Channel, SO8-FL -30 V, 1.8 mΩ, -234 A |
| 文件： | 总9页 (文件大小：385K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET - Power, Single
P-Channel, SO8-FL
V
R
I
D
(BR)DSS
DS(on)
1.8 mW @ −10 V
2.9 mW @ −4.5 V
−30 V
−234 A
-30 V, 1.8 mW, -234 A
S (1, 2, 3)
NVMFS003P03P8Z
G (4)
Features
P−Channel
MOSFET
• Ultra Low R
to Improve System Efficiency
• Advanced Package Technology in 5x6mm for Space Saving and
DS(on)
Excellent Thermal Conduction
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
D (5, 6, 7, 8)
Typical Applications
• Power Load Switch
• Protection: Reverse Current, Over Voltage, and Reverse Negative
1
Voltage
DFN5 5x6, 1.27P (SO−8FL)
• Battery Management
CASE 488AA
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
−30
Unit
V
V
DSS
Gate−to−Source Voltage
V
"25
−234
−169
168.7
84.4
−35.7
−25.7
3.9
V
GS
DFNW5 5x6 (FULL−CUT SO8FL WF)
Continuous Drain
Steady
State
T
= 25°C
= 100°C
= 25°C
I
A
C
D
CASE 507BA
Current R
(Note 2)
q
JC
T
C
Power Dissipation R
(Note 2)
T
C
P
W
A
q
D
JC
T
C
= 100°C
MARKING DIAGRAM
Continuous Drain Cur-
rent R (Notes 1, 2)
Steady T = 25°C
State
I
A
D
D
q
JA
T = 100°C
A
S
S
S
G
D
D
XXXXXX
AYWZZ
Power Dissipation R
(Notes 1, 2)
T = 25°C
A
P
W
q
D
JA
T = 100°C
A
1.9
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
−900
186
A
A
p
D
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceability
Energy (I = 37.1 A)
Lpk
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
°C
°C
J
stg
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1. Surface−mounted on FR4 board using a 1 in pad size, 2 oz. Cu pad.
2. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
© Semiconductor Components Industries, LLC, 2021
1
Publication Order Number:
April, 2022 − Rev. 2
NVMFS003P03P8Z/D
NVMFS003P03P8Z
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
0.9
Unit
°C/W
°C/W
Junction−to−Case − Steady State (Drain) (Note 1)
Junction−to−Ambient − Steady State (Note 1)
R
R
q
JC
JA
39
q
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = −250 mA
−30
V
(BR)DSS
D
Drain−to−Source Breakdown
Voltage Temperature Coefficient
V
/
I
D
= −250 mA, ref to 25°C
−5
mV/°C
(BR)DSS
T
J
Zero Gate Voltage Drain Current
I
V
DS
= 0 V,
T = 25°C
−10
mA
mA
DSS
GS
J
V
= −30 V
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
I
V
= 0 V, V = "25 V
"10
GSS
DS
GS
V
V
= V , I = −250 mA
−1.0
−3.0
V
GS(TH)
GS
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
I = −250 mA, ref to 25°C
D
5.5
1.2
1.9
110
mV/°C
mW
GS(TH)
J
R
V
= −10 V, I = −23 A
1.8
2.9
DS(on)
GS
GS
D
V
= −4.5 V, I = −20 A
D
Froward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
V
DS
= −5 V, I = −20 A
S
D
C
V
GS
= 0 V, V = −15 V,
12120
4020
4100
167
7
pF
iss
DS
f = 1.0 MHz
Output Capacitance
C
oss
Reverse Transfer Capacitance
Total Gate Charge
C
rss
Q
Q
V
= −4.5 V, V = −15 V,
nC
G(TOT)
GS
DS
I
= −23 A
D
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
Q
G(TH)
Q
21
GS
Q
116
277
GD
V
GS
= −10 V, V = −15 V,
DS
G(TOT)
I
= −23 A
D
SWITCHING CHARACTERISTICS, V = 4.5 V (Note 3)
GS
Turn−On Delay Time
Rise Time
t
V
= −4.5 V, V = −15 V,
81
ns
ns
V
d(on)
GS
DS
I
= −23 A, R = 6 W
D
G
t
r
440
180
400
Turn−Off Delay Time
Fall Time
t
d(off)
t
f
SWITCHING CHARACTERISTICS, V = 10 V (Note 3)
GS
Turn−On Delay Time
Rise Time
t
V
= −10 V, V = −15 V,
28
d(on)
GS
I
DS
= −23 A, R = 6 W
D
G
t
r
116
325
380
Turn−Off Delay Time
Fall Time
t
d(off)
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
V
I
= 0 V,
T = 25°C
−0.75
−0.6
−1.3
SD
GS
J
= −23 A
S
T = 125°C
J
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2
NVMFS003P03P8Z
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Reverse Recovery Time
Charge Time
t
V
GS
= 0 V, dl /dt = 100 A/ms,
70
43
ns
RR
s
I = −23 A
s
t
t
a
Discharge Time
28
b
Reverse Recovery Charge
Q
116
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
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3
NVMFS003P03P8Z
TYPICAL CHARACTERISTICS
400
350
300
250
200
150
100
400
V
GS
= −10 V to −5 V
V
DS
= −5 V
−4.5 V
350
300
250
200
150
100
−4.2 V
−4.0 V
−3.8 V
−3.6 V
−3.4 V
T = 25°C
J
−3.2 V
−3.0 V
50
0
50
0
T = 125°C
J
T = −55°C
J
0
0.5
1.0
1.5
2.0
2.5
3.0
0
1
2
3
4
5
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
2.5
2.0
1.5
1.0
2.8
2.4
2.0
1.6
1.2
0.8
T = 25°C
D
T = 25°C
J
J
I
= −23 A
V
= −4.5 V
= −10 V
GS
V
GS
0.5
0
0.4
0
3
4
5
6
7
8
9
10
5
10
15
20
25
30
35
40
45 50
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
−I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
1.5
100K
10K
1K
V
= −10 V
= −23 A
GS
T = 150°C
J
1.4
1.3
1.2
1.1
1.0
0.9
I
D
T = 125°C
J
T = 85°C
J
T = 25°C
J
100
0.8
0.7
0.6
10
1
−50 −25
0
25
50
75 100 125 150 175
5
10
15
20
25
30
T , JUNCTION TEMPERATURE (°C)
J
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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4
NVMFS003P03P8Z
TYPICAL CHARACTERISTICS
100K
10K
10
V
= −10 V
DS
9
8
7
6
5
4
3
T = 25°C
J
I
D
= −23 A
C
ISS
C
C
RSS
OSS
Q
GS
Q
GD
1K
V
= 0 V
GS
2
1
0
T = 25°C
J
f = 1 MHz
100
0
5
10
15
20
25
30
0
50
100
150
200
250
300
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
100
10
10K
1K
V
GS
= 0 V
t
t
f
d(off)
100
t
r
1
t
d(on)
10
1
V
V
= −10 V
= −15 V
GS
DS
I
= −23 A
D
T = 125°C
T = 25°C T = −55°C
J
J
J
0.1
1
10
R , GATE RESISTANCE (W)
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
−V , SOURCE−TO−DRAIN VOLTAGE (V)
SD
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100
1000
100
10
T
= 25°C
J(initial)
10 ms
10
0.5 ms
1 ms
10 ms
T
= 25°C
C
T
= 100°C
J(initial)
Single Pulse
≤ 10 V
V
GS
1
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
1
0.1
1
10
100
1000
0.0001
0.001
T , TIME IN AVALANCHE (s)
AV
0.01
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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5
NVMFS003P03P8Z
TYPICAL CHARACTERISTICS
100
10
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
Single Pulse
0.01
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
PACKAGE MARKING AND ORDERING INFORMATION
†
Part Number
Top Marking
Package
Shipping
NVMFS003P03P8ZT1G
03P3
DFN5 5x6, 1.27P
1500 / Tape & Reel
1500 / Tape & Reel
(Pb−Free)
NVMFWS003P03P8ZT1G
03P3W
DFNW5, 5x6
(FULL−CUT SO8FL WF)
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1. ANODE
2. ANODE
2X
0.905
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
DIMENSIONS: MILLIMETERS
4X
0.750
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW5 5x6 (FULL−CUT SO8FL WF)
CASE 507BA
ISSUE A
DATE 03 FEB 2021
q
q
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
XXXXXX = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
A
Y
= Assembly Location
= Year
W
ZZ
= Work Week
= Lot Traceability
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON26450H
DFNW5 5x6 (FULL−CUT SO8FL WF)
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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