NUP45V6P5_09 [ONSEMI]
Low Capacitance Quad Array for ESD Protection; 低电容四阵列的ESD保护
| 型号： | NUP45V6P5_09 |
| 厂家： | 
ONSEMI |
| 描述： | Low Capacitance Quad Array for ESD Protection |
| 文件： | 总4页 (文件大小：113K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NUP45V6P5
Low Capacitance
Quad Array for
ESD Protection
This integrated transient voltage suppressor device (TVS) is
designed for applications requiring transient overvoltage protection. It
is intended to be used in sensitive equipment such as wireless headsets,
PDAs, digital cameras, computers, printers, communication systems,
and other applications. The integrated design provides very effective
and reliable protection for four separate lines using only one package.
This device is ideal for situations where board space is at a premium.
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1
2
3
5
4
Features
• ESD Protection: IEC61000−4−2: Level 4
• Four Separate Unidirectional Configurations for Protection
• Low Leakage Current < 1 mA @ 3 V
• Small SOT−953 SMT Package
• Low Capacitance
• These are Pb−Free Devices
SOT−953
CASE 526AB
Benefits
• Provides Protection for ESD Industry Standards: IEC 61000, HBM
• Protects Four Lines Against Transient Voltage Conditions
• Minimize Power Consumption of the System
• Minimize PCB Board Space
MARKING DIAGRAM
5 M
1
Typical Applications
• Cellular and Portable Electronics
• Serial and Parallel Ports
• Microprocessor Based Equipment
• Notebooks, Desktops, Servers
5
= Specific Device Code
M = Date & Assembly Code
ORDERING INFORMATION
†
Device
NUP45V6P5T5G
Package
Shipping
SOT−953
(Pb−Free)
8000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
June, 2009 − Rev. 1
NUP45V6P5/D
NUP45V6P5
ELECTRICAL CHARACTERISTICS
A
I
(T = 25°C unless otherwise noted)
I
F
Symbol
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
I
PP
V
C
PP
V
C
V V
BR RWM
V
Working Peak Reverse Voltage
RWM
V
I
V
F
R
T
I
R
Maximum Reverse Leakage Current @ V
I
RWM
V
Breakdown Voltage @ I
Test Current
BR
T
I
T
QV
Maximum Temperature Coefficient of V
I
PP
BR
BR
I
F
Forward Current
Uni−Directional
V
F
Forward Voltage @ I
F
Z
Maximum Zener Impedance @ I
Reverse Current
ZT
ZT
I
ZK
Z
ZK
Maximum Zener Impedance @ I
ZK
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Value
Unit
Thermal Resistance Junction−to−Ambient
Above 25°C, Derate
R
560
4.5
°C/W
mW/°C
q
JA
Maximum Junction Temperature
T
150
−55 to +150
260
°C
°C
°C
V
Jmax
Operating Junction and Storage Temperature Range
Lead Solder Temperature (10 seconds duration)
T T
J stg
T
L
Human Body Model (HBM)
Machine Model (MM)
ESD
8000
400
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (T = 25°C)
A
Typ Capacitance Typ Capacitance
V (V)
C
Breakdown Voltage
@ 1 mA (Volts)
Leakage Current
@ 0 V Bias (pF)
@ 3 V Bias (pF)
@ I = 1 A
PP
V
I
@ V
(Note 1)
(Note 1)
(Note 2)
BR
RM
RM
Device
Min
Nom
Max
V
RWM
I
(mA)
Typ
Max
Typ
Max
Max
Marking
Device
RWM
NUP45V6P5
5
5.3
5.6
5.9
3.0
1.0
13
17
7.0
11.5
10.5
1. Capacitance of one diode at f = 1 MHz, T = 25°C.
A
2. Surge current waveform per Figure 3.
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2
NUP45V6P5
TYPICAL ELECTRICAL CHARACTERISTICS
0.035
0.030
0.025
0.020
0.015
0.010
14
13
12
11
10
9
8
7
0.005
0
6
5
−60 −40 −20
0
20 40 60 80 100 120 140 160
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
T, TEMPERATURE (°C)
BIAS VOLTAGE (V)
Figure 1. Reverse Leakage Current versus
Temperature
Figure 2. Capacitance
1
100
90
80
70
60
50
40
30
20
10
PEAK VALUE I
@ 8 ms
t
r
RSM
PULSE WIDTH (t ) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
P
0.1
HALF VALUE I
/2 @ 20 ms
RSM
0.01
t
P
T = 25°C
A
0.001
0
0
0.6
0.8
1.0
1.2
1.4
1.6
1.8
20
40
60
80
V , FORWARD VOLTAGE (V)
F
t, TIME (ms)
Figure 4. Forward Voltage
Figure 3. 8 × 20 ms Pulse Waveform
110
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
T , AMBIENT TEMPERATURE (°C)
A
Figure 5. Power Derating Curve
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3
NUP45V6P5
PACKAGE DIMENSIONS
SOT−953
CASE 527AB−01
ISSUE O
NOTES:
A
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L
−Y−
D
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
−X−
5
4
3
H
E
E
MILLIMETERS
INCHES
NOM MAX
0.017 0.019 0.020
1 2
DIM MIN
NOM
0.48
0.15
0.10
1.00
MAX
0.50
0.20 0.0039 0.0059 0.0079
0.15
1.05
0.85
MIN
A
b
C
D
E
e
L
0.44
0.10
0.05
0.95
0.75
0.002 0.004 0.006
0.037 0.039 0.041
0.03 0.032 0.034
0.014 BSC
e
C
0.80
b 5X
0.35 BSC
0.10
1.00
0.05
0.95
0.15 0.0019 0.0039 0.0059
1.05 0.037 0.039 0.041
0.08
X Y
HE
SOLDERING FOOTPRINT*
0.35
0.35
0.014 0.014
0.90
0.0354
0.20
0.08
0.20
0.08
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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Phone: 81−3−5773−3850
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Order Literature: http://www.onsemi.com/orderlit
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For additional information, please contact your local
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NUP45V6P5/D
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