NTLUD3A50PZTAG [ONSEMI]
Power MOSFET;
| 型号： | NTLUD3A50PZTAG |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET |
| 文件： | 总6页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NTLUD3A50PZ
Power MOSFET
−20 V, −5.6 A, mCoolt Dual P−Channel,
2.0x2.0x0.55 mm UDFN Package
Features
• UDFN Package with Exposed Drain Pads for Excellent Thermal
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MOSFET
Conduction
• Low R
DS(on)
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
• Low Profile UDFN 2.0x2.0x0.55 mm for Board Space Saving
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
50 mW @ −4.5 V
70 mW @ −2.5 V
115 mW @ −1.8 V
175 mW @ −1.5 V
−20 V
−5.6 A
Applications
• High Side Load Switch
• Reverse Current Protection
• Battery Switch
D1
D2
• Optimized for Power Management Applications for Portable
Products, such as Cell Phones, PMP, DSC, GPS, and others
G1
G2
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Symbol
Value
−20
Units
S1
P−Channel MOSFET
S2
V
DSS
V
V
A
V
GS
8.0
Continuous Drain
Current (Note 1)
Steady
State
T = 25°C
I
D
−4.4
−3.2
−5.6
1.4
A
MARKING
DIAGRAM
T = 85°C
A
1
6
UDFN6
CASE 517BF
mCOOLt
t ≤ 5 s
T = 25°C
A
AA MG
Power Dissipa-
tion (Note 1)
Steady
State
T = 25°C
A
P
D
W
A
G
1
t ≤ 5 s
T = 25°C
A
2.2
−2.8
−2.0
0.5
AA= Specific Device Code
M = Date Code
Continuous Drain
Current (Note 2)
Steady
State
T = 25°C
A
I
D
G
= Pb−Free Package
T = 85°C
A
(Note: Microdot may be in either location)
Power Dissipation (Note 2)
Pulsed Drain Current
T = 25°C
A
P
D
W
A
tp = 10 ms
I
−13
DM
Operating Junction and Storage
Temperature
T ,
STG
-55 to
150
°C
J
T
ESD (HBM, JESD22−A114)
ESD (MM, JESD22−A114)
V
ESD
1400
200
V
Source Current (Body Diode) (Note 2)
I
S
−1.0
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
(Top View)
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces) based on both FETs on.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
2. Surface-mounted on FR4 board using the minimum recommended pad size
2
of 30 mm , 1 oz. Cu based on both FETs on.
© Semiconductor Components Industries, LLC, 2014
1
Publication Order Number:
February, 2014 − Rev. 2
NTLUD3A50PZ/D
NTLUD3A50PZ
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
91
Units
Junction-to-Ambient – Steady State (Note 3)
R
°C/W
θJA
Junction-to-Ambient – t ≤ 5 s (Note 3)
R
57
θJA
Junction-to-Ambient – Steady State min Pad (Note 4)
R
228
θJA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
V
V
GS
= 0 V, I = −250 mA
−20
V
(BR)DSS
D
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V
/T
J
I = −250 mA, ref to 25°C
D
−13
mV/°C
(BR)DSS
Zero Gate Voltage Drain Current
I
V
DS
= 0 V,
T = 25°C
−1.0
mA
mA
DSS
GSS
GS
J
V
= −20 V
Gate-to-Source Leakage Current
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
I
V
= 0 V, V
=
5.0 V
5.0
DS
GS
V
V
= V , I = −250 mA
−0.4
−1.0
V
GS(TH)
GS
DS
D
Negative Threshold Temp. Coefficient
Drain-to-Source On Resistance
V
/T
3.0
37
46
63
86
16
mV/°C
mW
GS(TH)
J
R
V
V
V
V
V
= −4.5 V, I = −4.0 A
50
70
DS(on)
GS
GS
GS
GS
DS
D
= −2.5 V, I = −3.0 A
D
= −1.8 V, I = −2.0 A
115
175
D
= −1.5 V, I = −1.0 A
D
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
= −5.0 V, I = −3.0 A
S
D
pF
C
920
85
ISS
V
= 0 V, f = 1 MHz,
DS
GS
Output Capacitance
C
C
OSS
RSS
V
= −15 V
Reverse Transfer Capacitance
Total Gate Charge
80
nC
ns
Q
10.4
0.5
1.2
3.0
G(TOT)
Threshold Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Q
G(TH)
V
GS
= −4.5 V, V = −15 V;
DS
I
D
= −3.0 A
Q
GS
GD
Q
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6)
Turn-On Delay Time
Rise Time
t
7.0
12
39
30
d(ON)
t
r
V
= −4.5 V, V = −15 V,
DD
GS
I
= −3.0 A, R = 1 W
D
G
Turn-Off Delay Time
Fall Time
t
d(OFF)
t
f
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
V
T = 25°C
−0.67
−0.56
12.1
6.4
−1.0
J
V
S
= 0 V,
GS
I
= −1.0 A
T = 125°C
J
ns
Reverse Recovery Time
Charge Time
t
RR
t
a
t
b
V
= 0 V, dis/dt = 100 A/ms,
GS
I
= −1.0 A
S
Discharge Time
5.7
Reverse Recovery Charge
Q
4.0
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces) based on both FETs on.
2
4. Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm , 1 oz. Cu based on both FETs on.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NTLUD3A50PZ
TYPICAL CHARACTERISTICS
20
18
16
14
12
10
8
20
−4.5 to −3.5 V
−3.0 V
= −2.5 V
V
DS
= −5 V
18
16
14
12
10
8
V
GS
−2 V
−1.8 V
T = 25°C
J
6
6
−1.5 V
T = 125°C
J
4
4
T = −55°C
J
2
2
0
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
0.5
1
1.5
2
2.5
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
−1.5 V
T = 25°C
J
T = 25°C
J
I
D
= −4.0 A
−1.8 V
−2.5 V
V
GS
= −4.5 V
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
2
4
6
8
10 12 14 16 18 20
−V , GATE VOLTAGE (V)
GS
−I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
100000
10000
1000
V
= −4.5 V
= −4.0 A
GS
I
D
T = 125°C
J
T = 85°C
J
100
−50
−25
0
25
50
75
100
125
150
2
4
6
8
10
12
14
16
18 20
T , JUNCTION TEMPERATURE (°C)
J
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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3
NTLUD3A50PZ
TYPICAL CHARACTERISTICS
1800
1600
1400
1200
1000
800
5
18
15
12
9
V
= 0 V
Q
T
GS
T = 25°C
J
4
3
2
1
0
f = 1 MHz
V
DS
C
V
iss
GS
Q
Q
GD
GS
600
6
400
V
DS
= −15 V
= −3.0 A
C
3
oss
I
D
200
C
T = 25°C
J
rss
0
0
0
2
4
6
8
10 12 14 16 18 20
0
2
4
6
8
10
12
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Q , TOTAL GATE CHARGE (nC)
G
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
10.0
1.0
1000
100
10
V
V
= −4.5 V
= −15 V
= −3.0 A
GS
DD
I
D
t
d(off)
t
f
T = 125°C
J
t
r
t
d(on)
T = 25°C
J
T = −55°C
J
1.0
0.1
0.3
1
10
R , GATE RESISTANCE (W)
100
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
−V , SOURCE−TO−DRAIN VOLTAGE (V)
G
SD
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
0.85
0.75
0.65
0.55
0.45
0.35
0.25
0.15
100
10
I
= −250 mA
D
100 ms
1 ms
10 ms
1
0 ≤ V ≤ −8 V
GS
Single Pulse
T
C
= 25°C
0.1
0.01
dc
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
1
10
100
50
25
0
25
50
75
100
125
150
T , JUNCTION TEMPERATURE (°C)
J
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 11. Threshold Voltage
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
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4
NTLUD3A50PZ
TYPICAL CHARACTERISTICS
100
90
80
70
60
50
40
30
20
10
0
R
= 91°C/W
q
JA
Steady State
Duty Cycle = 0.5
0.05
0.02
0.01
0.2
0.1
Single Pulse
1E−06
1E−05
1E−04
1E−03
1E−02
t, TIME (s)
1E−01
1E+00
1E+01
1E+02
1E+03
Figure 13. FET Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Package
Shipping
NTLUD3A50PZTAG
UDFN6
3000 / Tape & Reel
3000 / Tape & Reel
(Pb−Free)
NTLUD3A50PZTBG
UDFN6
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NTLUD3A50PZ
PACKAGE DIMENSIONS
UDFN6 2x2, 0.65P
CASE 517BF
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
D
A
B
EXPOSED Cu
MOLD CMPD
PLATING
DETAIL B
PIN ONE
REFERENCE
OPTIONAL
MILLIMETERS
E
CONSTRUCTIONS
DIM
A
MIN
0.45
0.00
MAX
0.55
0.05
A1
A3
b
0.10
C
0.13 REF
0.25
0.57
0.35
L
L
D
2.00 BSC
0.10
C
D2
E
0.77
1.10
TOP VIEW
2.00 BSC
L1
E2
e
0.90
A
0.65 BSC
0.15 BSC
0.25 REF
DETAIL B
DETAIL A
A3
F
OPTIONAL
0.10
C
C
K
CONSTRUCTIONS
L
0.20
---
0.30
0.10
L1
0.08
A1
SEATING
PLANE
NOTE 4
C
SIDE VIEW
RECOMMENDED
MOUNTING FOOTPRINT
0.10
D2
F
C
A
B
1.74
2X
D2
0.77
DETAIL A
1
3
1.10
6X
0.47
L
E2
2.30
0.10
C
A
B
PACKAGE
OUTLINE
6
4
K
6X b
1
0.65
0.10
0.05
C
C
A
B
e
PITCH
6X
0.35
NOTE 3
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
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NTLUD3A50PZ/D
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