NTHS5443T1 [ONSEMI]
Power MOSFET; 功率MOSFET型号: | NTHS5443T1 |
厂家: | ONSEMI |
描述: | Power MOSFET |
文件: | 总6页 (文件大小:69K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NTHS5443
Power MOSFET
−20 V, −4.9 A, P−Channel ChipFETt
Features
• Low R
for Higher Efficiency
DS(on)
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• Logic Level Gate Drive
• Miniature ChipFET Surface Mount Package Saves Board Space
• Pb−Free Package is Available
V
R
TYP
I MAX
D
(BR)DSS
DS(on)
Applications
−20 V
56 mW @ −4.5
−4.9 A
• Power Management in Portable and Battery−Powered Products; i.e.,
Cellular and Cordless Telephones and PCMCIA Cards
S
G
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Steady
State
Rating
Drain−Source Voltage
Gate−Source Voltage
Continuous Drain Current
Symbol 5 secs
Unit
V
V
DS
V
GS
−20
D
"12
V
P−Channel MOSFET
I
D
A
(T = 150°C) (Note 1)
J
−4.9
−3.5
−3.6
−2.6
T = 25°C
A
ChipFET
CASE 1206A
STYLE 1
8
T = 85°C
A
Pulsed Drain Current
I
"15
A
A
DM
1
Continuous Source Current (Note 1)
Maximum Power Dissipation (Note 1)
I
S
−4.9
−3.6
P
W
D
2.5
1.3
1.3
0.7
T = 25°C
T = 85°C
A
A
PIN
CONNECTIONS
MARKING
DIAGRAM
Operating Junction and Storage
Temperature Range
T , T
−55 to +150
°C
J
stg
8
7
6
5
1
2
3
4
D
D
D
D
D
G
1
2
3
4
8
7
6
5
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
D
S
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq
[1 oz] including traces).
A4 = Specific Device Code
M = Month Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
†
Device
Package
Shipping
NTHS5443T1
ChipFET
3000/Tape & Reel
3000/Tape & Reel
ChipFET
(Pb−Free)
NTHS5443T1G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
July, 2005 − Rev. 6
NTHS5443T1/D
NTHS5443
THERMAL CHARACTERISTICS
Characteristic
Symbol
Typ
Max
Unit
Maximum Junction−to−Ambient (Note 2)
t v 5 s
Steady State
R
°C/W
q
JA
40
80
50
95
Maximum Junction−to−Foot (Drain)
Steady State
R
15
20
°C/W
q
JF
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Characteristic
Symbol
Test Condition
Min
Typ
Max
Unit
Static
Gate Threshold Voltage
Gate−Body Leakage
V
V
= V , I = −250 mA
−0.6
V
GS(th)
DS
GS
D
I
V
= 0 V, V = "12 V
"100
−1.0
nA
mA
GSS
DS
GS
Zero Gate Voltage Drain Current
I
V
= −16 V, V = 0 V
GS
DSS
DS
DS
V
= −16 V, V = 0 V,
−5.0
GS
T = 85°C
J
On−State Drain Current (Note 3)
I
V
DS
v −5.0 V, V = −4.5 V
−15
A
D(on)
GS
Drain−Source On−State Resistance
(Note 3)
r
V
GS
V
GS
= −4.5 V, I = −3.6 A
0.056
0.065
0.065
0.074
W
DS(on)
D
= −3.6 V, I = −3.3 A
D
V
= −2.5 V, I = −2.7 A
0.095
10
0.110
GS
D
Forward Transconductance (Note 3)
Diode Forward Voltage (Note 3)
g
V
= −10 V, I = −3.6 A
S
V
fs
DS
D
V
SD
I
S
= −1.1 A, V = 0 V
−0.8
−1.2
GS
Dynamic (Note 4)
Total Gate Charge
Q
7.5
0.9
2.2
8.5
14
12
2.8
−
nC
ns
G
V
= −10 V, V = −4.5 V,
GS
DS
Gate−Source Charge
Gate−Drain Charge
Turn−On Delay Time
Rise Time
Q
GS
Q
GD
I
D
= −3.6 A
t
13
21
57
45
60
d(on)
V
= −10 V, R = 10 W
L
t
r
DD
I
D
^ −1.0 A, V
= −4.5 V,
GEN
Turn−Off Delay Time
Fall Time
t
38
R
= 6 W
d(off)
G
t
f
30
Source−Drain Reverse Recovery Time
t
rr
I = −1.1 A, di/dt = 100 A/ms
F
30
ns
2. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq [1 oz] including traces).
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
4. Guaranteed by design, not subject to production testing.
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2
NTHS5443
TYPICAL ELECTRICAL CHARACTERISTICS
10
8
10
−6 V
−5 V
−4 V
−2.4 V
−2.2 V
V
DS
≥ −10 V
8
6
4
T = 25°C
−3.4 V
−2.8 V
−2.6 V
J
−2 V
6
−1.8 V
−1.6 V
4
125°C
2
0
2
0
25°C
V
GS
= −1.4 V
T = −55°C
J
0
0.5
1
1.5
2
2.5
3
0.5
1
1.5
2
2.5
3
−V , GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.08
0.06
0.2
0.15
0.1
T = 25°C
J
I
= −3.6 A
D
T = 25°C
J
V
= −4.5 V
= −6 V
GS
V
GS
0.04
0.02
0.05
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
−V , GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
−I DRAIN CURRENT (AMPS)
D,
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
Figure 3. On−Resistance versus
Gate−to−Source Voltage
1.6
1.4
1.2
1
10,000
1000
100
I
V
= −3.6 A
V
GS
= 0 V
D
= −4.5 V
GS
T = 150°C
J
T = 100°C
J
0.8
0.6
10
−50 −25
0
25
50
75
100
125 150
0
4
8
12
16
20
T , JUNCTION TEMPERATURE (°C)
J
−V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
NTHS5443
TYPICAL ELECTRICAL CHARACTERISTICS
5
11
10
9
1800
1500
1200
900
Q
G
V
DS
= 0 V
V
GS
= 0 V
T = 25°C
J
C
iss
4
3
8
7
C
6
rss
Q
GS
5
Q
GD
2
1
0
4
600
I
= −3.6 A
D
3
T = 25°C
Q
J
C
oss
2
300
0
/Q = 3.1
GD GS
1
0
0
1
2
3
4
5
6
7
8
10
5
0
5
10
15
20
−V
GS
−V
DS
Q , TOTAL GATE CHARGE (nC)
G
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
Figure 7. Capacitance Variation
1000
V
DD
= −10 V
I
D
= −1.0 V
V
GS
= −4.5 V
100
t
t
d(off)
t
t
f
r
10
1
d(on)
1
10
R , GATE RESISTANCE (OHMS)
100
G
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
1
Duty Cycle = 0.5
0.2
0.1
P
DM
0.1
0.05
0.02
PER UNIT BASE = R
=
q
JA
80°C/W
t
1
T
− T = P
Z
(t)
q
DM JA
JM
A
t
2
SURFACE MOUNTED
DUTY CYCLE, D = t /t
1 2
Single Pulse
0.001
0.01
0.0001
0.01
0.1
1
10
100
1000
SQUARE WAVE PULSE DURATION (sec)
Figure 10. Normalized Thermal Transient Impedance, Junction−to−Ambient
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4
NTHS5443
PACKAGE DIMENSIONS
ChipFETt
CASE 1206A−03
ISSUE G
NOTES:
D
q
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
L
8
1
7
2
6
3
5
4
5
4
6
3
7
2
8
1
H
E
E
MILLIMETERS
INCHES
NOM
0.041
0.012
0.006
DIM
A
b
c
D
MIN
1.00
0.25
0.10
2.95
1.55
NOM
1.05
MAX
MIN
MAX
0.043
0.014
0.008
0.122
0.067
e1
b
1.10
0.35
0.20
3.10
1.70
0.039
0.010
0.004
0.116
0.061
c
0.30
e
0.15
3.05
0.120
0.065
E
1.65
e
e1
L
0.65 BSC
0.55 BSC
0.35
1.90
5° NOM
0.025 BSC
0.022 BSC
0.014
0.075
5° NOM
0.28
1.80
0.42
2.00
0.011
0.071
0.017
0.079
A
H
E
q
0.05 (0.002)
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. GATE
5. SOURCE
6. DRAIN
7. DRAIN
8. DRAIN
SOLDERING FOOTPRINT*
2.032
0.08
2.032
0.08
0.457
0.018
0.635
0.025
1.727
0.068
0.457
0.018
0.178
0.007
0.711
0.028
0.711
0.028
mm
inches
mm
inches
0.66
0.026
0.66
0.026
ǒ
Ǔ
ǒ
Ǔ
SCALE 20:1
SCALE 20:1
Basic
Styles 1 and 4
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
NTHS5443
ChipFET is a trademark of Vishay Siliconix.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NTHS5443T1/D
相关型号:
NTHS5443T1G
3600mA, 20V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET, LEAD FREE, CASE 1206A-03, CHIPFET-8
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