NSVEMC2DXV5T1G [ONSEMI]
Complementary Bipolar Digital Transistor (BRT);
| 型号： | NSVEMC2DXV5T1G |
| 厂家： | 
ONSEMI |
| 描述： | Complementary Bipolar Digital Transistor (BRT) 小信号双极晶体管 |
| 文件： | 总11页 (文件大小：97K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EMC2DXV5T1,
EMC3DXV5T1,
EMC4DXV5T1,
EMC5DXV5T1
Preferred Devices
Dual Common
Base−Collector Bias
Resistor Transistors
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3
2
1
R1
R2
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
Q2
R2
Q1
R1
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the EMC2DXV5T1 series,
two complementary BRT devices are housed in the SOT−553 package
which is ideal for low power surface mount applications where board
space is at a premium.
4
5
5
1
Features
SOT−553
CASE 463B
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• These are Pb−Free Devices
MARKING DIAGRAM
MAXIMUM RATINGS (T = 25°C unless otherwise noted, common for Q
A
1
and Q , − minus sign for Q (PNP) omitted)
2
1
Rating
Symbol
Value
50
Unit
Vdc
Vdc
Ux M G
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
V
V
CBO
CEO
G
50
I
100
mAdc
C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
Ux = Specific Device Code
x = C, 3, E, or 5
M
G
=
=
Date Code
Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
©
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
October, 2005 − Rev. 4
EMC2DXV5T1/D
EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
ONE JUNCTION HEATED
Total Device Dissipation
P
D
T = 25°C
357 (Note 1)
2.9 (Note 1)
mW
mW/°C
A
Derate above 25°C
Thermal Resistance, Junction-to-Ambient
BOTH JUNCTIONS HEATED
Total Device Dissipation
R
q
JA
350 (Note 1)
°C/W
P
D
T = 25°C
500 (Note 1)
4.0 (Note 1)
mW
mW/°C
A
Derate above 25°C
Thermal Resistance, Junction-to-Ambient
R
250 (Note 1)
−55 to +150
°C/W
°C
q
JA
Junction and Storage Temperature
1. FR−4 @ Minimum Pad
T , T
J stg
DEVICE ORDERING INFORMATION, MARKING AND RESISTOR VALUES
Transistor 1 − PNP
Transistor 2 − NPN
†
Device
EMC2DXV5T1
EMC2DXV5T1G
EMC2DXV5T5
EMC2DXV5T5G
EMC3DXV5T1
EMC3DXV5T1G
EMC3DXV5T5
EMC3DXV5T5G
EMC4DXV5T1
EMC4DXV5T1G
EMC4DXV5T5
EMC4DXV5T5G
EMC5DXV5T1
EMC5DXV5T1G
EMC5DXV5T5
EMC5DXV5T5G
Marking
R1 (K)
R2 (K)
R1 (K)
R2 (K)
Package
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
SOT−553*
Shipping
4000 / Tape & Reel
8000 / Tape & Reel
4000 / Tape & Reel
8000 / Tape & Reel
4000 / Tape & Reel
8000 / Tape & Reel
4000 / Tape & Reel
8000 / Tape & Reel
UC
22
22
22
22
U3
UE
U5
10
10
10
47
10
10
47
47
10
47
47
4.7
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
250
200
150
100
R
= 833°C/W
q
JA
50
0
−ꢀ50
0
50
100
150
T , AMBIENT TEMPERATURE (°C)
A
Figure 1. Derating Curve
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2
EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
Q1 TRANSISTOR: PNP
OFF CHARACTERISTICS
Collector-Base Cutoff Current (V = 50 V, I = 0)
I
I
−
−
−
−
100
500
nAdc
nAdc
mAdc
CB
E
CBO
CEO
Collector-Emitter Cutoff Current (V = 50 V, I = 0)
CB
B
Emitter-Base Cutoff Current
(V = 6.0, I = 5.0 mA)
EMC2DXV5T1
EMC3DXV5T1
EMC4DXV5T1
EMC5DXV5T1
I
−
−
−
−
−
−
−
−
0.2
0.5
0.2
1.0
EBO
EB
C
ON CHARACTERISTICS
Collector-Base Breakdown Voltage (I = 10 mA, I = 0)
V
V
50
50
−
−
−
−
Vdc
Vdc
C
E
(BR)CBO
(BR)CEO
Collector-Emitter Breakdown Voltage (I = 2.0 mA, I = 0)
C
B
DC Current Gain
(V = 10 V, I = 5.0 mA)
EMC2DXV5T1
EMC3DXV5T1
EMC4DXV5T1
EMC5DXV5T1
h
FE
60
35
80
20
100
60
140
35
−
−
−
−
CE
C
Collector−Emitter Saturation Voltage (I = 10 mA, I = 0.3 mA)
V
−
−
−
−
−
0.25
0.2
−
Vdc
Vdc
Vdc
kW
C
B
CE(SAT)
Output Voltage (on) (V = 5.0 V, V = 2.5 V, R = 1.0 kW)
V
OL
CC
B
L
Output Voltage (off) (V = 5.0 V, V = 0.5 V, R = 1.0 kW)
V
4.9
CC
B
L
OH
Input Resistor
Resistor Ratio
EMC2DXV5T1
EMC3DXV5T1, EMC4DXV5T1
EMC5DXV5T1
R1
15.4
7.0
3.3
22
10
4.7
28.6
13
6.1
EMC2DXV5T1
EMC3DXV5T1
EMC4DXV5T1
EMC5DXV5T1
R1/R2
0.8
0.8
0.17
0.38
1.0
1.0
0.21
0.47
1.2
1.2
0.25
0.56
Q2 TRANSISTOR: NPN
OFF CHARACTERISTICS
Collector-Base Cutoff Current (V = 50 V, I = 0)
I
I
−
−
−
−
100
500
nAdc
nAdc
mAdc
CB
E
CBO
CEO
Collector-Emitter Cutoff Current (V = 50 V, I = 0)
CB
B
Emitter-Base Cutoff Current
(V = 6.0, I = 5.0 mA)
EMC2DXV5T1
EMC3DXV5T1
I
−
−
−
−
−
−
0.2
0.5
0.1
EBO
EB
C
EMC4DXV5T1, EMC5DXV5T1
ON CHARACTERISTICS
Collector-Base Breakdown Voltage (I = 10 mA, I = 0)
V
V
50
50
−
−
−
−
Vdc
Vdc
C
E
(BR)CBO
(BR)CEO
Collector-Emitter Breakdown Voltage (I = 2.0 mA, I = 0)
C
B
DC Current Gain
(V = 10 V, I = 5.0 mA)
EMC2DXV5T1
EMC3DXV5T1
EMC4DXV5T1, EMC5DXV5T1
h
FE
60
35
80
100
60
140
−
−
−
CE
C
Collector−Emitter Saturation Voltage (I = 10 mA, I = 0.3 mA)
V
−
−
−
−
−
0.25
0.2
−
Vdc
Vdc
Vdc
kW
C
B
CE(SAT)
Output Voltage (on) (V = 5.0 V, V = 2.5 V, R = 1.0 kW)
V
OL
CC
B
L
Output Voltage (off) (V = 5.0 V, V = 0.5 V, R = 1.0 kW)
V
4.9
CC
B
L
OH
Input Resistor
Resistor Ratio
EMC2DXV5T1
EMC3DXV5T1
EMC4DXV5T1, EMC5DXV5T1
R1
15.4
7.0
33
22
10
47
28.6
13
61
EMC2DXV5T1
EMC3DXV5T1
R1/R2
0.8
0.8
0.8
1.0
1.0
1.0
1.2
1.2
1.2
EMC4DXV5T1, EMC5DXV5T1
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
TYPICAL ELECTRICAL CHARACTERISTICS − EMC2DXV5T1 PNP TRANSISTOR
1000
10
V
= 10 V
CE
I /I = 10
C B
T ꢁ=ꢁ75°C
A
1
25°C
75°C
25°C
T ꢁ=ꢁ−25°C
A
−25°C
100
ꢀ0.1
10
0.01
1
10
I , COLLECTOR CURRENT (mA)
0
ꢀ20
ꢀ40
ꢀ50
100
I , COLLECTOR CURRENT (mA)
C
C
Figure 2. VCE(sat) versus IC
Figure 3. DC Current Gain
4
3
2
100
25°C
75°C
f = 1 MHz
= 0 mA
T ꢁ=ꢁ−25°C
A
l
E
10
1
T
= 25°C
A
ꢀ0.1
1
0
ꢀ0.01
V
= 5 V
ꢀ9
O
ꢀ0.001
0
1
ꢀ2
ꢀ3
ꢀ4
ꢀ5
ꢀ6
ꢀ7
ꢀ8
10
0
10
20
30
40
50
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
100
V
= 0.2 V
O
T ꢁ=ꢁ−25°C
A
10
25°C
75°C
1
ꢀ0.1
0
10
ꢀ20
ꢀ30
ꢀ40
ꢀ50
I , COLLECTOR CURRENT (mA)
C
Figure 6. Input Voltage versus Output Current
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
TYPICAL ELECTRICAL CHARACTERISTICS − EMC2DXV5T1 NPN TRANSISTOR
1
1000
I /I = 10
C B
V
= 10 V
T ꢁ=ꢁ−25°C
A
CE
25°C
T ꢁ=ꢁ75°C
A
25°C
0.1
−25°C
75°C
100
0.01
0.001
10
0
20
40
50
1
10
100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 7. VCE(sat) versus IC
Figure 8. DC Current Gain
4
3
100
10
25°C
75°C
f = 1 MHz
= 0 mA
I
E
T ꢁ=ꢁ−25°C
A
T
= 25°C
A
1
0.1
2
1
0.01
0.001
V
= 5 V
9
O
0
0
10
20
30
40
50
0
1
2
3
4
5
6
7
8
10
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
10
V
= 0.2 V
T ꢁ=ꢁ−25°C
A
O
25°C
75°C
1
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 11. Input Voltage versus Output
Current
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
TYPICAL ELECTRICAL CHARACTERISTICS − EMC3DXV5T1 PNP TRANSISTOR
1000
1
V
= 10 V
CE
I /I = 10
C B
T ꢁ=ꢁ75°C
A
T ꢁ=ꢁ−25°C
A
25°C
ꢀ0.1
100
−25°C
25°C
75°C
ꢀ0.01
10
ꢀ20
I , COLLECTOR CURRENT (mA)
1
10
100
0
ꢀ40
50
I , COLLECTOR CURRENT (mA)
C
C
Figure 12. VCE(sat) versus IC
Figure 13. DC Current Gain
4
3
100
10
1
25°C
75°C
f = 1 MHz
= 0 mA
l
E
T ꢁ=ꢁ−25°C
A
T
= 25°C
A
2
1
0
ꢀ0.1
ꢀ0.01
V
= 5 V
O
ꢀ0.001
0
10
20
30
40
50
0
1
ꢀ2
3
ꢀ4
ꢀ5
ꢀ6
ꢀ7
ꢀ8
ꢀ9
10
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 14. Output Capacitance
Figure 15. Output Current versus Input
Voltage
100
V
= 0.2 V
O
T ꢁ=ꢁ−25°C
A
10
25°C
75°C
1
ꢀ0.1
0
10
ꢀ20
ꢀ30
ꢀ40
ꢀ50
I , COLLECTOR CURRENT (mA)
C
Figure 16. Input Voltage versus Output
Current
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
TYPICAL ELECTRICAL CHARACTERISTICS − EMC3DXV5T1 NPN TRANSISTOR
1000
1
V
= 10 V
CE
I /I = 10
C B
T ꢁ=ꢁ75°C
A
25°C
25°C
T ꢁ=ꢁ−25°C
A
0.1
−25°C
75°C
100
0.01
10
0.001
1
10
100
0
20
40
50
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 17. VCE(sat) versus IC
Figure 18. DC Current Gain
4
3
2
1
0
100
10
1
75°C
25°C
f = 1 MHz
= 0 mA
T ꢁ=ꢁ−25°C
A
I
E
T
A
= 25°C
0.1
0.01
V
= 5 V
O
0.001
0
10
20
30
40
50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 19. Output Capacitance
Figure 20. Output Current versus Input Voltage
100
V
= 0.2 V
O
T ꢁ=ꢁ−25°C
A
10
1
25°C
75°C
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 21. Input Voltage versus Output
Current
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
TYPICAL ELECTRICAL CHARACTERISTICS −EMC4DXV5T1 PNP TRANSISTOR
1
180
T ꢁ=ꢁ75°C
A
I /I = 10
C B
V
= 10 V
CE
160
140
120
100
80
T ꢁ=ꢁ−25°C
A
25°C
−25°C
25°C
0.1
75°C
0.01
60
40
20
0.001
0
0
20
40
60
80
1
2
4
6
8
10 15 20 40 50 60 70 80 90 100
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 22. VCE(sat) versus IC
Figure 23. DC Current Gain
4.5
4
100
10
1
T ꢁ=ꢁ75°C
f = 1 MHz
= 0 V
A
25°C
l
E
3.5
3
T
A
= 25°C
−25°C
2.5
2
1.5
1
0.5
0
V
= 5 V
O
0
2
4
6
8
10 15 20 25 30 35 40 45 50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 24. Output Capacitance
Figure 25. Output Current versus Input Voltage
10
+12 V
V
= 0.2 V
25°C
O
T ꢁ=ꢁ−25°C
A
75°C
Typical Application
for PNP BRTs
1
LOAD
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 26. Input Voltage versus Output Current
Figure 27. Inexpensive, Unregulated Current Source
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
TYPICAL ELECTRICAL CHARACTERISTICS − EMC5DXV5T1 PNP TRANSISTOR
1000
1
V
= 10 V
CE
I /I = 10
C B
T ꢁ=ꢁ75°C
A
25°C
100
−25°C
T ꢁ=ꢁ75°C
A
25°C
0.1
−25°C
10
1
0.01
1
10
100
1000
0
10
20
30
40
50
60
I , COLLECTOR CURRENT (mA)
C
I , COLLECTOR CURRENT (mA)
C
Figure 28. VCE(sat) versus IC
Figure 29. DC Current Gain
12
100
10
1
f = 1 MHz
= 0 mA
10
8
I
E
75°C
T
= 25°C
A
6
V
= 5 V
4
O
0.1
SERIES 1
T ꢁ=ꢁ−25°C
A
2
0
25°C
0.01
0
5
10
15
20
25
30
35
40
45
0
2
4
6
8
10
12
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 30. Output Capacitance
Figure 31. Output Current versus Input Voltage
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
TYPICAL ELECTRICAL CHARACTERISTICS − EMC4DXV5T1, EMC5DXV5T1 NPN TRANSISTOR
10
1000
100
10
V
= 10 V
CE
I /I = 10
C B
T ꢁ=ꢁ75°C
A
1
25°C
−25°C
25°C
75°C
T ꢁ=ꢁ−25°C
A
0.1
0.01
0
20
I , COLLECTOR CURRENT (mA)
40
50
1
10
100
I , COLLECTOR CURRENT (mA)
C
C
Figure 32. VCE(sat) versus IC
Figure 33. DC Current Gain
1
100
10
1
25°C
f = 1 MHz
= 0 mA
75°C
I
E
T ꢁ=ꢁ−25°C
A
0.8
T
= 25°C
A
0.6
0.4
0.1
0.01
0.2
0
V
= 5 V
O
0.001
0
10
20
30
40
50
0
2
4
6
8
10
V , REVERSE BIAS VOLTAGE (V)
R
V , INPUT VOLTAGE (V)
in
Figure 34. Output Capacitance
Figure 35. Output Current versus Input Voltage
100
V
= 0.2 V
O
T ꢁ=ꢁ−25°C
A
25°C
75°C
10
1
0.1
0
10
20
30
40
50
I , COLLECTOR CURRENT (mA)
C
Figure 36. Input Voltage versus Output Current
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
CASE 463B−01
ISSUE B
NOTES:
D
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
A
−X−
L
5
4
3
OF BASE MATERIAL.
E
−Y−
H
E
MILLIMETERS
INCHES
NOM
0.022
0.009
0.005
1
2
DIM
A
b
c
D
E
MIN
0.50
0.17
0.08
1.50
1.10
NOM
0.55
MAX
MIN
MAX
0.024
0.011
0.007
0.067
0.051
0.60
0.27
0.18
1.70
1.30
0.020
0.007
0.003
0.059
0.043
0.22
b 5 PL
c
0.13
e
1.60
0.063
0.047
M
0.08 (0.003)
X Y
1.20
e
L
0.50 BSC
0.20
1.60
0.020 BSC
0.008
0.063
0.10
1.50
0.30
1.70
0.004
0.059
0.012
0.067
H
E
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
mm
inches
ǒ
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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