NLV74AC86DTR2G [ONSEMI]
Quad 2-Input Exclusive OR Gate;
| 型号： | NLV74AC86DTR2G |
| 厂家： | 
ONSEMI |
| 描述： | Quad 2-Input Exclusive OR Gate 栅 光电二极管 逻辑集成电路 石英晶振 栅极 |
| 文件： | 总8页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74AC86, MC74ACT86
Quad 2−Input Exclusive−OR
Gate
Features
• Outputs Source/Sink 24 mA
• Pb−Free Packages are Available*
http://onsemi.com
PDIP−14
N SUFFIX
CASE 646
14
1
SOIC−14
D SUFFIX
CASE 751A
MAXIMUM RATINGS
14
Rating
Symbol
Value
Unit
1
DC Supply Voltage (Referenced to GND)
V
CC
−0.5 to
+7.0
V
TSSOP−14
DT SUFFIX
CASE 948G
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
V
−0.5 to
V
V
in
14
V
CC
+0.5
1
V
out
−0.5 to
V
CC
+0.5
SOEIAJ−14
M SUFFIX
CASE 965
DC Input Current, per Pin
I
±20
mA
mA
mA
°C
in
14
DC Output Sink/Source Current, per Pin
I
±50
±50
out
CC
1
DC V or GND Current per Output Pin
I
CC
Storage Temperature
T
stg
−65 to
+150
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
Pinout: 14−Lead Packages Conductors
(Top View)
V
CC
14
13
12
11
10
9
8
1
2
3
4
5
6
7
GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
April, 2005 − Rev. 7
MC74AC86/D
MC74AC86, MC74ACT86
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
5.0
5.0
Max
6.0
Unit
′AC
2.0
4.5
0
V
Supply Voltage
V
V
CC
′ACT
5.5
V , V
in out
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
@ 3.0 V
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
150
40
25
10
8.0
−
−
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
−
−
−
−
−
ns/V
t , t
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
J
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
T
A
−40
−
25
−
I
−24
24
mA
mA
OH
OL
I
Output Current − Low
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
DC CHARACTERISTICS
74AC
74AC
T
A
=
−40°C to
+85°C
T
A
= +25°C
V
CC
Typ
Guaranteed Limits
(V)
Symbol
Parameter
Minimum High Level
Unit
Conditions
= 0.1 V
V
V
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
2.1
V
OUT
IH
Input Voltage
3.15
3.85
3.15
3.85
V
or V − 0.1 V
CC
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
= 0.1 V
Maximum Low Level
Input Voltage
IL
OUT
V
V
or V − 0.1 V
CC
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 mA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IH
IN
IL
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
−12 mA
−24 mA
−24 mA
V
V
I
OH
V
OL
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 mA
OUT
Maximum Low Level
Output Voltage
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
12 mA
24 mA
24 mA
V
I
OL
I
IN
Maximum Input
Leakage Current
5.5
−
±0.1
±1.0
mA
V = V , GND
I
CC
I
I
I
5.5
5.5
−
−
−
−
75
mA
mA
V
V
= 1.65 V Max
= 3.85 V Min
†Minimum Dynamic
Output Current
OLD
OHD
CC
OLD
−75
OHD
Maximum Quiescent
Supply Current
5.5
−
4.0
40
mA
V
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
IN
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
CC
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2
MC74AC86, MC74ACT86
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
A
= −40°C
T
A
= +25°C
to +85°C
C = 50 pF
C = 50 pF
L
L
V
(V)
*
Fig.
No.
CC
Min
Typ
Max
Min
Max
Symbol
Parameter
Unit
3.3
5.0
2.0
1.5
6.0
4.5
11.5
8.5
1.5
1.0
12.5
9.0
Propagation Delay
Inputs to Outputs
t
t
ns
3−5
3−5
PLH
3.3
5.0
2.0
1.5
6.5
4.5
11.5
8.5
1.5
1.0
12.5
9.5
Propagation Delay
Inputs to Outputs
ns
PHL
*Voltage Range 3.3 V is 3.3 V ±0.3 V
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
74ACT
74ACT
T
A
=
−40°C to
+85°C
T
A
= +25°C
V
CC
(V)
Typ
Guaranteed Limits
Symbol
Parameter
Unit
Conditions
V
V
V
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
= 0.1 V
Minimum High Level
Input Voltage
IH
OUT
V
V
V
or V − 0.1 V
CC
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
OUT
= 0.1 V
Maximum Low Level
Input Voltage
IL
or V − 0.1 V
CC
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
I
= −50 mA
Minimum High Level
Output Voltage
OH
OUT
*V = V or V
IH
IN
IL
4.5
5.5
−
−
3.86
4.86
3.76
4.76
V
V
−24 mA
−24 mA
I
OH
V
OL
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
I
= 50 mA
Maximum Low Level
Output Voltage
OUT
*V = V or V
IN
IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
V
24 mA
24 mA
I
OL
I
IN
Maximum Input
Leakage Current
5.5
±0.1
±1.0
mA
V = V , GND
I CC
DI
Additional Max. I /Input
5.5
5.5
5.5
0.6
−
−
−
−
1.5
75
mA
mA
mA
V = V − 2.1 V
CCT
CC
I
CC
I
V
OLD
V
OHD
= 1.65 V Max
†Minimum Dynamic
Output Current
OLD
I
I
−
−75
= 3.85 V Min
OHD
CC
Maximum Quiescent
Supply Current
5.5
−
4.0
40
mA
V = V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
A
= −40°C
T
A
= +25°C
to +85°C
C = 50 pF
C = 50 pF
L
L
V
(V)
*
Fig.
No.
CC
Min
Typ
Max
Min
Max
Symbol
Parameter
Unit
t
t
Propagation Delay
Propagation Delay
5.0
1.5
8.5
9.5
1.0
10.0
ns
3−5
3−5
PLH
5.0
1.5
7.0
9.5
1.0
10.5
ns
PHL
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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3
MC74AC86, MC74ACT86
CAPACITANCE
Symbol
Value
Typ
Parameter
Unit
pF
Test Conditions
C
C
Input Capacitance
Power Dissipation Capacitance
4.5
35
V
CC
V
CC
= 5.0 V
= 5.0 V
IN
pF
PD
ORDERING INFORMATION
Device
†
Package
Shipping
MC74AC86N
PDIP−14
25 Units / Rail
25 Units / Rail
MC74AC86NG
PDIP−14
(Pb−Free)
MC74ACT86N
PDIP−14
25 Units / Rail
25 Units / Rail
MC74ACT86NG
PDIP−14
(Pb−Free)
MC74AC86D
SOIC−14
55 Units / Rail
55 Units / Rail
MC74AC86DG
SOIC−14
(Pb−Free)
MC74AC86DR2
SOIC−14
2500 Tape & Reel
2500 Tape & Reel
MC74AC86DR2G
SOIC−14
(Pb−Free)
MC74ACT86D
SOIC−14
55 Units / Rail
55 Units / Rail
MC74ACT86DG
SOIC−14
(Pb−Free)
MC74ACT86DR2
MC74ACT86DR2G
SOIC−14
2500 Tape & Reel
2500 Tape & Reel
SOIC−14
(Pb−Free)
MC74AC86DTR2
MC74ACT86DTR2
MC74ACT86MEL
MC74ACT86MELG
TSSOP−14*
TSSOP−14*
SOEIAJ−14
2500 Tape & Reel
2500 Tape & Reel
2000 Tape & Reel
2000 Tape & Reel
SOEIAJ−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
MARKING DIAGRAMS
PDIP−14
SOIC−14
TSSOP−14
SOEIAJ−14
MC74AC86N
AWLYYWW
AC86
AWLYWW
AC
86
ALYW
74AC86
ALYW
MC74ACT86N
AWLYYWW
ACT86
AWLYWW
ACT
86
ALYW
74ACT86
ALYW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
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4
MC74AC86, MC74ACT86
PACKAGE DIMENSIONS
PDIP−14
N SUFFIX
CASE 646−06
ISSUE N
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
14
1
8
7
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
B
5. ROUNDED CORNERS OPTIONAL.
A
F
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
18.80
6.60
4.69
0.53
1.78
L
0.715
0.240
0.145
0.015
0.040
N
C
−T−
SEATING
PLANE
G
H
J
K
L
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
−−−
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
−−−
0.38
2.41
0.38
3.43
7.87
10
J
K
D 14 PL
H
G
M
M
N
_
_
M
0.13 (0.005)
0.015
0.039
1.01
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE G
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
14
8
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
−B−
P 7 PL
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
M
M
B
0.25 (0.010)
7
1
G
F
R X 45
_
C
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
D 14 PL
M
S
S
0.25 (0.010)
T
B
A
1.27 BSC
0.19
0.10
0
7
0
7
_
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
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5
MC74AC86, MC74ACT86
PACKAGE DIMENSIONS
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE A
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
M
S
S
V
ANSI Y14.5M, 1982.
0.10 (0.004)
T
U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
S
0.15 (0.006) T U
N
0.25 (0.010)
14
8
2X L/2
M
B
−U−
L
N
PIN 1
IDENT.
F
7
1
DETAIL E
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T U
A
K1
−V−
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
A
B
C
D
F
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
G
H
J
J1
K
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
−W−
C
0.10 (0.004)
K1 0.19
L
M
6.40 BSC
0.252 BSC
SEATING
PLANE
−T−
H
G
DETAIL E
D
0
8
0
8
_
_
_
_
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6
MC74AC86, MC74ACT86
PACKAGE DIMENSIONS
SOEIAJ−14
M SUFFIX
CASE 965−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
14
8
E
Q
1
H
E
_
E
M
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
L
7
1
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
A
e
c
MILLIMETERS
INCHES
MIN
−−−
DIM MIN
MAX
MAX
0.081
0.008
0.020
0.011
0.413
0.215
A
−−−
0.05
0.35
0.18
9.90
5.10
2.05
b
A
1
A
1
b
c
0.20 0.002
0.50 0.014
0.27 0.007
M
0.13 (0.005)
0.10 (0.004)
D
E
e
10.50 0.390
5.45 0.201
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20 0.291
0.85 0.020
1.50 0.043
0.323
0.033
0.059
E
L
L
E
M
0
10
0.90 0.028
10
_
0.035
0.056
0
_
_
_
Q
0.70
−−−
1
Z
1.42
−−−
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7
MC74AC86, MC74ACT86
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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MC74AC86/D
相关型号：
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