NLV74ACT00DR2G [ONSEMI]
Quad 2-Input NAND Gate;型号: | NLV74ACT00DR2G |
厂家: | ONSEMI |
描述: | Quad 2-Input NAND Gate 栅 栅极 |
文件: | 总10页 (文件大小:149K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC74AC00, MC74ACT00
Quad 2−Input NAND Gate
High−Performance Silicon−Gate CMOS
Features
http://onsemi.com
• Output Drive Capability: $24 mA
• Operating Voltage Range: 2 to 6 V AC00; 4.5 to 5.5 ACT00
• Low Input Current: 1.0 mA
MARKING
DIAGRAMS
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 32 FETs
14
PDIP−14
N SUFFIX
CASE 646
MC74xxx00N
AWLYYWWG
• Pb−Free Packages are Available
14
1
1
14
1
A1
3
SOIC−14
D SUFFIX
CASE 751A
xxx00
AWLYWWG
Y1
2
B1
14
1
4
A2
6
1
Y2
5
14
B2
Y = AB
xxx
00
9
A3
TSSOP−14
DT SUFFIX
CASE 948G
8
Y3
10
ALYWG
B3
1
G
12
14
A4
11
1
Y4
13
B4
14
PIN 14 = V
CC
PIN 7 = GND
SOEIAJ−14
M SUFFIX
CASE 965
74xxx00
ALYWG
14
Figure 1. Logic Diagram
1
xxx
1
V
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
CC
= AC or ACT
= Assembly Location
14
A
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
G
= Pb−Free Package
FUNCTION TABLE
1
2
3
4
5
6
7
Inputs
Output
A1
B1
Y1
A2
B2
Y2 GND
A
B
Y
Figure 2. Pinout: 14−Lead Packages (Top View)
L
L
L
H
L
H
H
H
L
H
H
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
October, 2006 − Rev. 9
MC74AC00/D
MC74AC00, MC74ACT00
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
V
V
DC Supply Voltage
*0.5 to )7.0
CC
I
DC Input Voltage
*0.5 v V v V )0.5
V
I
CC
DC Output Voltage
(Note 1)
*0.5 v V v V )0.5
V
O
O
CC
I
I
I
I
I
DC Input Diode Current
DC Output Diode Current
DC Output Sink/Source Current
DC Supply Current per Output Pin
DC Ground Current per Output Pin
Storage Temperature Range
$20
mA
mA
mA
mA
mA
°C
IK
$50
$50
$50
$50
OK
O
CC
GND
T
T
T
*65 to )150
260
STG
L
Lead temperature, 1 mm from Case for 10 Seconds
Junction temperature under Bias
Thermal resistance
°C
)150
°C
J
q
PDIP
SOIC
TSSOP
78
125
170
°C/W
JA
P
Power Dissipation in Still Air at 85°C
PDIP
SOIC
TSSOP
78
125
170
mW
D
MSL
Moisture Sensitivity
Level 1
F
Flammability Rating
Oxygen Index: 30% − 35%
UL 94 V−0 @ 0.125 in
R
V
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
> 1000
V
ESD
I
Latch−Up Performance Above V and Below GND at 85°C (Note 5)
$100
mA
Latch−Up
CC
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. I absolute maximum rating must be observed.
O
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
V
Supply Voltage
MC74AC00
MC74ACT00
2.0
4.5
5.0
5.0
6.0
5.5
V
CC
V , V
in out
DC Input Voltage, Output Voltage (Ref. to GND)
0
−
V
V
CC
t , t
Input Rise and Fall Time (Note 6)
MC74AC00
V
V
V
@ 3.0 V
@ 4.5 V
@ 5.5 V
−
−
−
150
40
25
−
−
−
ns/V
r
f
CC
CC
CC
t , t
Input Rise and Fall Time (Note 7)
MC74ACT00
V
V
@ 4.5 V
@ 5.5 V
−
−
10
8.0
−
−
ns/V
r
f
CC
CC
T
Junction Temperature
−
−55
−
−
25
−
150
125
−24
24
°C
°C
J
T
A
Operating Ambient Temperature Range
Output Current − High
I
I
mA
mA
OH
OL
Output Current − Low
−
−
6. V from 30% to 70% V
.
CC
in
7. V from 0.8 V to 2.0 V.
in
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2
MC74AC00, MC74ACT00
DC CHARACTERISTICS
MC74AC00
T
= +255C
T
A
= −405C to +855C
T
A
= −555C + 1255C
A
V
(V)
CC
Typ
Guaranteed Limits
Symbol
Parameter
Unit
Conditions
= 0.1 V
V
V
V
Minimum High Level
Input Voltage
3.0
4.5
5.5
1.5
2.25 3.15
2.75 3.85
2.1
2.1
3.15
3.85
2.1
3.15
3.85
V
V
OUT
IH
or V − 0.1 V
CC
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
2.25 1.35
2.75 1.65
0.9
0.9
1.35
1.65
0.9
1.35
1.65
V
V
V
V
= 0.1 V
OUT
IL
or V − 0.1 V
CC
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 mA
OH
OUT
*V = V or V
IN
IL
IH
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
2.4
3.7
4.7
−12 mA
−24 mA
−24 mA
I
I
OH
V
Maximum Low Level
Output Voltage
3.0
4.5
5.5
0.002 0.1
0.001 0.1
0.001 0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
= 50 mA
OL
OUT
*V = V or V
IN
IL
IH
12 mA
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
0.5
0.5
0.5
I
24 mA
24 mA
OL
I
Maximum Input
Leakage Current
5.5
−
$0.
1
$1.0
$1.0
mA
V = V , GND
IN
I
CC
I
I
I
†Minimum Dynamic
Output Current
5.5
5.5
5.5
−
−
−
−
−
75
−75
40
50
−50
40
mA
mA
mA
V
V
V
= 1.65 V Max
= 3.85 V Min
OLD
OHD
CC
OLD
OHD
Maximum Quiescent
Supply Current
4.0
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE:
I
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
IN
CC
AC CHARACTERISTICS (t = t = 3.0 nS; C = 50 pF; see Figures 3 and 4 for Waveforms)
r
f
L
MC74AC00
T
A
= +255C
Typ
T
A
= −405C to +855C
T
A
= −555C to + 1255C
V
(V)
*
CC
Min
Max
Min
Max
Min
Max
Symbol
Parameter
Unit
t
Propagation Delay
3.3
5.0
2.0
1.5
7.0
6.0
9.5
8.0
2.0
1.5
10.0
8.5
1.0
1.0
11.0
8.5
ns
PLH
t
Propagation Delay
3.3
5.0
1.5
1.5
5.5
4.5
8.0
6.5
1.0
1.0
8.5
7.0
1.0
1.0
9.0
7.0
ns
PHL
*Voltage Range 3.3 V is 3.3 V $0.3 V.
Voltage Range 5.0 V is 5.0 V $0.5 V.
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3
MC74AC00, MC74ACT00
DC CHARACTERISTICS
MC74ACT00
T
= +255C
T
A
= −405C to +855C
T
A
= −555C to + 1255C
A
V
(V)
CC
Typ
Guaranteed Limits
Symbol
Parameter
Unit
Conditions
V = 0.1 V
OUT
V
V
V
Minimum High Level
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
2.0
V
IH
2.0
or V − 0.1 V
CC
Maximum Low Level
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
0.8
0.8
V
V
V
V
= 0.1 V
OUT
CC
IL
or V − 0.1 V
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
4.4
5.4
I
= −50 mA
OH
OUT
*V = V or V
IN
IL
IH
4.5
5.5
−
−
3.86
4.86
3.76
4.76
3.7
4.7
I
−24 mA
OH
−24 mA
V
Maximum Low Level
Output Voltage
4.5 0.001
5.5 0.001
0.1
0.1
0.1
0.1
0.1
0.1
V
V
I
= 50 mA
OL
OUT
*V = V or V
I
IN
OL
IL
IH
4.5
5.5
−
−
0.36
0.36
0.44
0.44
0.5
0.5
24 mA
24 mA
I
Maximum Input
Leakage Current
5.5
−
$0.1
$1.0
$1.0
mA
V = V , GND
I CC
IN
DI
Additional Max. I /Input 5.5
0.6
−
−
−
1.5
75
1.6
50
mA V = V − 2.1 V
CCT
CC
I
CC
I
I
I
†Minimum Dynamic
Output Current
5.5
5.5
5.5
mA
mA
mA
V
V
V
= 1.65 V Max
OLD
OLD
OHD
−
−
−75
40
−50
40
= 3.85 V Min
OHD
CC
Maximum Quiescent
Supply Current
−
4.0
= V or GND
IN CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (t = t = 3.0 nS; C = 50 pF; see Figures 3 and 4 for Waveforms)
r
f
L
MC74ACT00
T
A
= +255C
Typ
T
A
= −405C to +855C
T
A
= −555C to +1255C
V
*
CC
(V)
5.0
5.0
Min
1.5
1.5
Max
9.0
Min
1.0
1.0
Max
Min
1.0
1.0
Max
Symbol
Parameter
Unit
ns
t
t
Propagation Delay
Propagation Delay
5.5
9.5
9.5
PLH
PHL
4.0
7.0
8.0
8.0
ns
*Voltage Range 5.0 V is 5.0 V $0.5 V.
CAPACITANCE
Symbol
Value
Typ
Parameter
Test Conditions
Unit
pF
C
IN
Input Capacitance
Power Dissipation Capacitance
4.5
30
V
V
= 5.0 V
= 5.0 V
CC
CC
C
PD
pF
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4
MC74AC00, MC74ACT00
t
t
r
f
V
CC
90%
V
INPUT
mi
A OR B
10%
GND
t
t
PLH
PHL
OUTPUT Y
50%
V
= 50% for MC74AC00
= 1.5 V for MC74ACT00
mi
Figure 3. Switching Waveforms
OUTPUT
50 W Scope
Test Point
INPUT
450 W
DEVICE
UNDER
TEST
C *
L
*Includes all probe and jig capacitance
Figure 4. Test Circuit
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5
MC74AC00, MC74ACT00
ORDER INFORMATION
†
Device
Package
Shipping
MC74AC00D
SOIC−14
55 Units / Rail
25 Units / Rail
MC74AC00DG
SOIC−14
(Pb−Free)
MC74AC00N
PDIP−14
MC74AC00NG
PDIP−14
(Pb−Free)
MC74AC00DR2
SOIC−14
MC74AC00DR2G
SOIC−14
(Pb−Free)
2500 / Tape and Reel
MC74AC00DTR2
MC74AC00DTR2G
MC74AC00MEL
MC74AC00MELG
TSSOP−14*
TSSOP−14*
SOEIAJ−14
2000 / Tape and Reel
25 Units / Rail
SOEIAJ−14
(Pb−Free)
MC74ACT00N
PDIP−14
MC74ACT00NG
PDIP−14
(Pb−Free)
MC74ACT00D
SOIC−14
55 Units / Rail
MC74ACT00DG
SOIC−14
(Pb−Free)
MC74ACT00DR2
MC74ACT00DR2G
SOIC−14
SOIC−14
(Pb−Free)
2500 / Tape and Reel
2000 / Tape and Reel
MC74ACT00DTR2
MC74ACT00DTR2G
MC74ACT00MEL
MC74ACT00MELG
TSSOP−14*
TSSOP−14*
SOEIAJ−14
SOEIAJ−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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6
MC74AC00, MC74ACT00
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−A−
14
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−B−
P 7 PL
M
M
B
0.25 (0.010)
7
1
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
F
R X 45
_
C
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
1.27 BSC
D 14 PL
0.19
0.10
0
M
S
S
0.25 (0.010)
T
B
A
7
0
7
_
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MC74AC00, MC74ACT00
PDIP−14
CASE 646−06
ISSUE P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
14
1
8
7
B
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
N
C
G
H
J
K
L
M
N
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
−−−
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
−−−
0.38
2.41
0.38
3.43
7.87
10
−T−
SEATING
PLANE
J
_
_
K
0.015
0.039
1.01
D 14 PL
H
G
M
M
0.13 (0.005)
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8
MC74AC00, MC74ACT00
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE B
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
M
S
S
V
ANSI Y14.5M, 1982.
0.10 (0.004)
T
U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
S
0.15 (0.006) T
U
N
0.25 (0.010)
14
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
8
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
DETAIL E
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T
U
A
−V−
MILLIMETERS
INCHES
K1
DIM MIN
MAX
MIN MAX
A
B
C
D
F
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
1.20
0.15 0.002 0.006
0.75 0.020 0.030
J J1
−−− 0.047
SECTION N−N
G
H
J
J1
K
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
−W−
C
K1 0.19
L
M
6.40 BSC
0.252 BSC
0.10 (0.004)
0
8
0
8
_
_
_
_
SEATING
PLANE
−T−
H
G
DETAIL E
D
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
01.34X6
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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9
MC74AC00, MC74ACT00
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE A
NOTES:
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.
ꢀꢁ3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
L
14
8
E
Q
1
ꢀꢁ4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
E
_
M
ꢀꢁ5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
MILLIMETERS
INCHES
MIN MAX
−−− 0.081
VIEW P
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
A
e
A
−−−
0.05
0.35
0.10
9.90
5.10
c
A
1
b
c
0.002
0.008
0.020
0.008
0.413
0.215
0.014
0.004
0.390
0.201
D
E
e
b
A
1
1.27 BSC
0.050 BSC
H
M
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
0.13 (0.005)
E
0.10 (0.004)
0.50
L
E
M
0
10
10
0.035
0
0.028
_
_
_
_
Q
1
0.70
−−−
0.90
1.42
Z
−−− 0.056
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