NLV37WZ07USG [ONSEMI]

Triple Buffer with Open Drain Outputs; 三重缓冲带漏极开路输出
NLV37WZ07USG
型号: NLV37WZ07USG
厂家: ONSEMI    ONSEMI
描述:

Triple Buffer with Open Drain Outputs
三重缓冲带漏极开路输出

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中文:  中文翻译
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NL37WZ07  
Triple Buffer with Open  
Drain Outputs  
The NL37WZ07 is a high performance triple buffer with open drain  
outputs operating from a 1.65 V to 5.5 V supply.  
The internal circuit is composed of multiple stages, including an  
open drain output which provides the capability to set output  
switching level. This allows the NL37WZ07 to be used to interface  
http://onsemi.com  
MARKING  
5 V circuits to circuits of any voltage between V and 7 V using an  
CC  
DIAGRAM  
external resistor and power supply.  
8
Features  
Extremely High Speed: t 2.5 ns (typical) at V = 5 V  
PD  
CC  
L7 MG  
US8  
US SUFFIX  
CASE 493  
G
Designed for 1.65 V to 5.5 V V Operation  
CC  
Overvoltage Tolerant Inputs  
1
LVTTL Compatible Interface Capability with 5 V TTL Logic with  
V
CC  
= 3 V  
L7  
M
G
= Device Code  
= Date Code*  
LVCMOS Compatible  
= PbFree Package  
24 mA Output Sink Capability @ 3.0 V  
(Note: Microdot may be in either location)  
Near Zero Static Supply Current Substantially Reduces System  
*Date Code orientation may vary depending upon  
manufacturing location.  
Power Requirements  
Chip Complexity: FET = 72  
These Devices are PbFree and are RoHS Compliant  
PIN ASSIGNMENT  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AECQ100  
Qualified and PPAP Capable  
Pin  
1
Function  
IN A1  
2
OUT Y3  
IN A2  
3
4
GND  
IN A1  
OUT Y3  
IN A2  
1
2
3
8
7
6
V
CC  
5
OUT Y2  
IN A3  
6
7
OUT Y1  
OUT Y1  
IN A3  
8
V
CC  
FUNCTION TABLE  
A Input  
Y Output  
L
L
Z
GND  
4
5
OUT Y2  
H
ORDERING INFORMATION  
Figure 1. Pinout  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
1
1
IN A1  
IN A2  
OUT Y1  
OUT Y2  
1
IN A3  
OUT Y3  
Figure 2. Logic Symbol  
© Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
April, 2012 Rev. 8  
NL37WZ07/D  
NL37WZ07  
MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Units  
V
V
DC Supply Voltage  
DC Input Voltage  
0.5 to +7.0  
0.5 to +7.0  
0.5 to +7.0  
CC  
V
V
I
O
V
DC Output Voltage  
V
I
IK  
DC Input Diode Current  
mA  
V < GND  
50  
I
I
DC Output Diode Current  
mA  
OK  
V
< GND  
50  
50  
O
I
DC Output Sink Current  
mA  
mA  
mA  
°C  
O
I
DC Supply Current per Supply Pin  
DC Ground Current per Ground Pin  
Storage Temperature Range  
100  
CC  
I
100  
GND  
T
STG  
65 to +150  
260  
T
Lead Temperature, 1 mm from Case for 10 Seconds  
Junction Temperature under Bias  
Thermal Resistance (Note 1)  
°C  
L
T
+150  
250  
°C  
J
q
°C/W  
mW  
JA  
P
Power Dissipation in Still Air at 85°C  
Moisture Sensitivity  
250  
D
MSL  
Level 1  
F
R
Flammability Rating  
Oxygen Index: 28 to 34  
UL 94 V0 @ 0.125 in  
V
ESD  
ESD Withstand Voltage  
V
Human Body Model (Note 2)  
Machine Model (Note 3)  
> 2000  
> 150  
N/A  
Charged Device Model (Note 4)  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. Measured with minimum pad spacing on an FR4 board, using 10 mmby1 inch, 2ounce copper trace with no air flow.  
2. Tested to EIA/JESD22A114A.  
3. Tested to EIA/JESD22A115A.  
4. Tested to JESD22C101A.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
Max  
Units  
V
CC  
Supply Voltage  
Operating  
Data Retention Only  
V
1.65  
1.5  
5.5  
5.5  
V
Input Voltage (Note 5)  
0
0
5.5  
5.5  
V
V
I
V
O
Output Voltage (HIGH or LOW State)  
Operating FreeAir Temperature  
Input Transition Rise or Fall Rate  
T
A
55  
+125  
°C  
Dt/DV  
ns/V  
V
CC  
V
CC  
V
CC  
= 2.5 V 0.2 V  
= 3.0 V 0.3 V  
= 5.0 V 0.5 V  
0
0
0
20  
10  
5
5. Unused inputs may not be left open. All inputs must be tied to a highor lowlogic input voltage level.  
http://onsemi.com  
2
 
NL37WZ07  
DC ELECTRICAL CHARACTERISTICS  
V
CC  
T
A
= 25°C  
55°C 3 T 3 125°C  
A
Symbol  
Parameter  
Condition  
(V)  
Min  
Typ  
Max  
Min  
Max  
Units  
V
IH  
HighLevel Input Voltage  
1.65 to 1.95 0.75 V  
0.75 V  
V
CC  
CC  
CC  
CC  
2.3 to 5.5  
0.7 V  
0.7 V  
V
LowLevel Input Voltage  
1.65 to 1.95  
2.3 to 5.5  
0.25 V  
0.25 V  
V
mA  
V
IL  
CC  
CC  
CC  
CC  
0.3 V  
0.3 V  
I
ZState Output Leakage  
Current  
V
= V  
IL  
1.65 to 5.5  
5.0  
10.0  
LKG  
IN  
V
= V or GND  
OUT CC  
V
OL  
LowLevel Output  
I
= 100 mA  
OL  
1.65 to 5.5  
1.65  
2.3  
0.0  
0.1  
0.24  
0.3  
0.4  
0.4  
0.55  
0.55  
0.1  
1
0.1  
0.24  
0.3  
Voltage  
I
= 4 mA  
= 8 mA  
0.08  
0.20  
0.22  
0.28  
0.38  
0.42  
OL  
V
IN  
= V or V  
IH IL  
I
OL  
I
= 12 mA  
= 16 mA  
= 24 mA  
= 32 mA  
2.7  
0.4  
OL  
I
3.0  
0.4  
OL  
I
3.0  
0.55  
0.55  
1.0  
OL  
I
4.5  
OL  
I
IN  
Input Leakage Current  
V
= 5.5 V or GND  
0 to 5.5  
0
mA  
mA  
IN  
I
Power Off  
Leakage Current  
V
V
= 5.5 V or  
10  
OFF  
IN  
= 5.5 V  
OUT  
I
Quiescent Supply  
Current  
V
IN  
= 5.5 V or GND  
5.5  
1
10  
mA  
CC  
AC ELECTRICAL CHARACTERISTICS t = t = 2.5 ns; C = 50 pF; R = 500 W  
R
F
L
L
T
A
= 25°C  
55°C 3 T 3 125°C  
A
Min  
Typ  
Max  
Min  
Max  
Symbol  
Parameter  
Condition  
R = R = 500 W, C = 50 pF  
V
(V)  
Units  
CC  
t
Propagation Delay  
(Figure 3 and 4)  
1.8 0.15  
7.8  
7.8  
ns  
PZL  
L
1
L
R = R = 500 W, C = 50 pF  
2.5 0.2  
3.3 0.3  
5.0 0.5  
1.8 0.15  
1.2  
0.8  
0.5  
3.7  
2.9  
2.3  
5.8  
4.4  
3.5  
7.8  
1.2  
0.8  
0.5  
6.4  
4.8  
3.9  
7.8  
L
1
L
R = R = 500 W, C = 50 pF  
L
1
L
R = R = 500 W, C = 50 pF  
L
1
L
t
Propagation Delay  
(Figure 3 and 4)  
ns  
R = R = 500 W, C = 50 pF  
PLZ  
L
1
L
R = R = 500 W, C = 50 pF  
2.5 0.2  
3.3 0.3  
5.0 0.5  
1.2  
0.8  
0.5  
2.8  
2.1  
1.4  
5.8  
4.4  
3.5  
1.2  
0.8  
0.5  
6.4  
4.8  
3.9  
L
1
L
R = R = 500 W, C = 50 pF  
L
1
L
R = R = 500 W, C = 50 pF  
L
1
L
CAPACITIVE CHARACTERISTICS  
Symbol  
Parameter  
Input Capacitance  
Output Capacitance  
Power Dissipation Capacitance (Note 6)  
Condition  
= 5.5 V, V = 0 V or V  
Typical  
2.5  
Units  
pF  
C
V
V
IN  
CC  
I
CC  
CC  
C
= 5.5 V, V = 0 V or V  
4.0  
pF  
OUT  
CC  
I
C
10 MHz, V = 5.5 V, V = 0 V or V  
CC  
4.0  
pF  
PD  
CC  
I
6. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.  
PD  
Average operating current can be obtained by the equation: I  
) = C V f ) I . C is used to determine the noload dynamic  
PD CC in CC PD  
CC(OPR  
2
power consumption; P = C V  
f ) I V  
.
D
PD  
CC  
in  
CC  
CC  
http://onsemi.com  
3
 
NL37WZ07  
V
CC  
A
Y
50%  
GND  
t
t
PLZ  
PZL  
HIGH  
IMPEDANCE  
50% V  
CC  
V
OL  
+0.3 V  
Figure 3. Switching Waveforms  
V
CC  
R
1
V
CC  
x 2  
PULSE  
GENERATOR  
DUT  
R
T
C
R
L
L
R = Z  
of pulse generator (typically 50 W)  
T
OUT  
Figure 4. Test Circuit  
DEVICE ORDERING INFORMATION  
Device Order Number  
Package  
Shipping  
NL37WZ07USG  
US8  
(PbFree)  
3000 / Tape & Reel  
NLV37WZ07USG*  
US8  
(PbFree)  
3000 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ100 Qualified and PPAP  
Capable.  
http://onsemi.com  
4
NL37WZ07  
PACKAGE DIMENSIONS  
US8  
CASE 49302  
ISSUE B  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
X−  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION “A” DOES NOT INCLUDE MOLD  
FLASH, PROTRUSION OR GATE BURR.  
MOLD FLASH. PROTRUSION AND GATE  
BURR SHALL NOT EXCEED 0.140 MM  
(0.0055”) PER SIDE.  
A
J
8
5
Y−  
4. DIMENSION “B” DOES NOT INCLUDE  
INTERLEAD FLASH OR PROTRUSION.  
INTERLEAD FLASH AND PROTRUSION  
SHALL NOT E3XCEED 0.140 (0.0055”) PER  
SIDE.  
DETAIL E  
B
L
5. LEAD FINISH IS SOLDER PLATING WITH  
THICKNESS OF 0.00760.0203 MM.  
(300800 “).  
6. ALL TOLERANCE UNLESS OTHERWISE  
SPECIFIED 0.0508 (0.0002 “).  
1
4
R
S
G
P
MILLIMETERS  
INCHES  
U
DIM  
A
B
C
D
F
G
H
J
K
L
M
N
P
MIN  
1.90  
2.20  
0.60  
0.17  
0.20  
0.50 BSC  
0.40 REF  
0.10  
MAX  
2.10  
2.40  
0.90  
0.25  
0.35  
MIN  
MAX  
0.083  
0.094  
0.035  
0.010  
0.014  
0.075  
0.087  
0.024  
0.007  
0.008  
0.020 BSC  
0.016 REF  
C
H
N
T−  
0.10 (0.004)  
T
K
SEATING  
PLANE  
D
0.18  
0.10  
3.20  
6
0.004  
0.007  
0.004  
0.126  
6
M
R 0.10 TYP  
M
0.10 (0.004)  
T
X Y  
0.00  
3.00  
0
0.000  
0.118  
0
_
_
_
_
V
5
10  
5
10  
_
_
_
_
0.23  
0.23  
0.37  
0.60  
0.34  
0.33  
0.47  
0.80  
0.010  
0.009  
0.015  
0.024  
0.013  
0.013  
0.019  
0.031  
R
S
U
V
F
0.12 BSC  
0.005 BSC  
DETAIL E  
SOLDERING FOOTPRINT*  
3.8  
0.15  
1.8  
0.07  
0.50  
0.0197  
0.30  
0.012  
1.0  
0.0394  
mm  
inches  
ǒ
Ǔ
SCALE 8:1  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer  
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81358171050  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NL37WZ07/D  

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