NCV8402D_16 [ONSEMI]
Dual Self-Protected Low-Side Driver;型号: | NCV8402D_16 |
厂家: | ONSEMI |
描述: | Dual Self-Protected Low-Side Driver |
文件: | 总11页 (文件大小:95K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NCV8402D, NCV8402AD
Dual Self-Protected
Low-Side Driver with
Temperature and Current
Limit
www.onsemi.com
NCV8402D/AD is a dual protected Low−Side Smart Discrete device.
The protection features include overcurrent, overtemperature, ESD and
integrated Drain−to−Gate clamping for overvoltage protection. This
device offers protection and is suitable for harsh automotive
environments.
V
(BR)DSS
R
TYP
I
D
MAX
DS(ON)
(Clamped)
42 V
165 mW @ 10 V
2.0 A*
*Max current limit value is dependent on input
condition.
Features
• Short−Circuit Protection
Drain
• Thermal Shutdown with Automatic Restart
• Overvoltage Protection
Overvoltage
Protection
Gate
Input
• Integrated Clamp for Inductive Switching
• ESD Protection
• dV/dt Robustness
ESD Protection
• Analog Drive Capability (Logic Level Input)
Temperature
Limit
Current
Limit
Current
Sense
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Source
Compliant
MARKING DIAGRAM
Typical Applications
8
• Switch a Variety of Resistive, Inductive and Capacitive Loads
• Can Replace Electromechanical Relays and Discrete Circuits
• Automotive / Industrial
SO−8
CASE 751
STYLE 11
xxxxxx
ALYW
G
8
1
1
xxxxxx = V8402D or 8402AD
A
L
= Assembly Location
= Wafer Lot
Y
W
G
= Year
= Work Week
= Pb−Free Package
PIN ASSIGNMENT
1
8
Source 1
Gate 1
Source 2
Gate 2
Drain 1
Drain 1
Drain 2
Drain 2
ORDERING INFORMATION
†
Device
Package
Shipping
SOIC−8 2500/Tape & Reel
(Pb−Free)
NCV8402DDR2G
NCV8402ADDR2G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
July, 2016 − Rev. 3
NCV8402D/D
NCV8402D, NCV8402AD
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Symbol
Value
42
Unit
V
Drain−to−Source Voltage Internally Clamped
Drain−to−Gate Voltage Internally Clamped
Gate−to−Source Voltage
V
DSS
DGR
(R = 1.0 MW)
G
V
42
V
V
GS
"14
V
Continuous Drain Current
I
D
Internally Limited
Power Dissipation
@ T = 25°C (Note 1)
P
D
0.8
1.62
W
A
@ T = 25°C (Note 2)
A
Maximum Continuous Drain Current
Thermal Resistance
@ T = 25°C (Note 1)
I
2.02
2.88
A
A
D
@ T = 25°C (Note 2)
A
Junction−to−Ambient Steady State (Note 1)
Junction−to−Ambient Steady State (Note 2)
R
157
77
°C/W
mJ
q
JA
JA
R
q
Single Pulse Drain−to−Source Avalanche Energy
(V = 32 V, V = 5.0 V, I = 1.0 A, L = 300 mH, R = 25 W)
G(ext)
E
AS
150
DD
G
PK
Load Dump Voltage
(V = 0 and 10 V, R = 2.0 W, R = 9.0 W, t = 400 ms)
V
LD
55
V
GS
I
L
d
Operating Junction and Storage Temperature
T , T
−55 to 150
°C
J
stg
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Surface−mounted onto min pad FR4 PCB, (Cu area = 40 sq. mm, 1 oz.).
2. Surface−mounted onto 1″ sq. FR4 board (Cu area = 625 sq. mm, 2 oz.).
+
I
D
DRAIN
I
G
VDS
GATE
+
SOURCE
VGS
−
−
Figure 1. Voltage and Current Convention
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2
NCV8402D, NCV8402AD
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Test Condition
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
V
= 0 V, I = 10 mA, T = 25°C
42
40
46
45
55
55
Drain−to−Source Breakdown Voltage
(Note 3)
V
V
GS
D
J
(BR)DSS
V
GS
= 0 V, I = 10 mA, T = 150°C
D J
(Note 5)
V
= 0 V, V = 32 V, T = 25°C
0.25
1.1
4.0
20
Zero Gate Voltage Drain Current
I
mA
mA
GS
DS
J
DSS
V
GS
= 0 V, V = 32 V, T = 150°C
DS
J
(Note 5)
Gate Input Current
V
DS
= 0 V, V = 5.0 V
I
GSSF
50
100
GS
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
V
= V , I = 150 mA
V
GS(th)
1.3
1.8
4.0
2.2
6.0
V
GS
DS
D
Gate Threshold Temperature Coefficient
V /T
GS(th)
−mV/°C
mW
J
V
= 10 V, I = 1.7 A, T = 25°C
165
305
200
400
Static Drain−to−Source On−Resistance
R
DS(on)
GS
D
J
V
GS
= 10 V, I = 1.7 A, T = 150°C
D
J
(Note 5)
V
= 5.0 V, I = 1.7 A, T = 25°C
195
360
230
460
GS
D
J
V
GS
= 5.0 V, I = 1.7 A, T = 150°C
D
J
(Note 5)
V
= 5.0 V, I = 0.5 A, T = 25°C
190
350
230
460
GS
D
J
V
GS
= 5.0 V, I = 0.5 A, T = 150°C
D
J
(Note 5)
Source−Drain Forward On Voltage
V
GS
= 0 V, I = 7.0 A
V
SD
1.0
V
S
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time (10% V to 90% I )
25
120
20
30
200
25
ms
ms
IN
D
td(on)
Turn−On Rise Time (10% I to 90% I )
t
D
D
rise
td(off)
Turn−Off Delay Time (90% V to 10% I )
ms
IN
D
V
GS
= 10 V, V = 12 V,
DD
I
D
= 2.5 A, R = 4.7 W
L
Turn−Off Fall Time (90% I to 10% I )
t
fall
50
70
ms
D
D
Slew−Rate ON (70% V to 50% V
)
−dV /dt
DS ON
0.8
0.3
1.2
0.5
V/ms
DS
DD
Slew−Rate OFF (50% V to 70% V
)
dV /dt
DS OFF
DS
DD
SELF PROTECTION CHARACTERISTICS (T = 25°C unless otherwise noted) (Note 4)
J
V
= 10 V, V = 5.0 V, T = 25°C
3.7
2.3
4.3
3.0
5.0
3.7
Current Limit
I
A
DS
GS
J
LIM
V
DS
= 10 V, V = 5.0 V, T = 150°C
GS J
(Note 5)
V
= 10 V, V = 10 V, T = 25°C
4.2
2.7
4.8
3.6
5.4
4.5
DS
GS
J
V
DS
= 10 V, V = 10 V, T = 150°C
GS J
(Note 5)
Temperature Limit (Turn−off)
Thermal Hysteresis
V
= 5.0 V (Note 5)
T
150
150
175
15
200
185
°C
GS
LIM(off)
V
GS
= 5.0 V
DT
LIM(on)
LIM(off)
Temperature Limit (Turn−off)
Thermal Hysteresis
V
= 10 V (Note 5)
T
165
15
GS
V
GS
= 10 V
DT
LIM(on)
GATE INPUT CHARACTERISTICS (Note 5)
V
= 5 V I = 1.0 A
50
400
0.05
0.4
Device ON Gate Input Current
I
mA
mA
mA
GS
GS
D
GON
V
V
= 10 V I = 1.0 A
D
= 5 V, V = 10 V
Current Limit Gate Input Current
I
GCL
GS
DS
V
= 10 V, V = 10 V
GS
DS
V
GS
GS
= 5 V, V = 10 V
0.15
0.7
Thermal Limit Fault Gate Input Current
I
GTL
DS
V
= 10 V, V = 10 V
DS
ESD ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (Note 5)
J
Electro−Static Discharge Capability
Human Body Model (HBM)
ESD
4000
400
V
Machine Model (MM)
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
www.onsemi.com
3
NCV8402D, NCV8402AD
4. Fault conditions are viewed as beyond the normal operating range of the part.
5. Not subject to production testing.
www.onsemi.com
4
NCV8402D, NCV8402AD
TYPICAL PERFORMANCE CURVES
10
1000
100
T
Jstart
= 25°C
T
Jstart
= 25°C
T
Jstart
= 150°C
T
Jstart
= 150°C
1
10
10
10
100
10
5
100
L (mH)
L (mH)
Figure 2. Single Pulse Maximum Switch−off
Current vs. Load Inductance
Figure 3. Single Pulse Maximum Switching
Energy vs. Load Inductance
1000
100
10
10
T
= 25°C
Jstart
T
= 25°C
Jstart
1
T
= 150°C
Jstart
T
= 150°C
Jstart
0.1
1
1
10
TIME IN CLAMP (ms)
TIME IN CLAMP (ms)
Figure 4. Single Pulse Maximum Inductive
Switch−off Current vs. Time in Clamp
Figure 5. Single Pulse Maximum Inductive
Switching Energy vs. Time in Clamp
5
4
3
2
1
0
8
7
6
5
4
3
2
1
0
8 V
T = 25°C
10 V
6 V
A
V
DS
= 10 V
−40°C
25°C
100°C
5 V
4 V
3.5 V
150°C
3 V
V
= 2.5 V
GS
0
1
2
3
4
1
2
3
4
5
V
DS
(V)
V
GS
(V)
Figure 6. On−state Output Characteristics
Figure 7. Transfer Characteristics
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5
NCV8402D, NCV8402AD
TYPICAL PERFORMANCE CURVES
350
400
300
200
100
0
150°C, V = 5 V
150°C, I = 0.5 A
GS
D
300
250
200
150
100
50
150°C, I = 1.7 A
D
150°C, V = 10 V
GS
100°C, V = 5 V
GS
100°C, I = 1.7 A
D
100°C, V = 10 V
100°C, I = 0.5 A
GS
D
25°C, V = 5 V
GS
25°C, I = 1.7 A
25°C, I = 0.5 A
D
D
25°C, V = 10 V
GS
−40°C, V = 5 V
−40°C, I = 0.5 A
GS
D
−40°C, I = 1.7 A
D
−40°C, V = 10 V
GS
4
5
6
7
8
9
10
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
V
GS
(V)
I (A)
D
Figure 8. RDS(on) vs. Gate−Source Voltage
Figure 9. RDS(on) vs. Drain Current
8
7
6
5
4
3
2
2
1.75
1.5
I
D
= 1.7 A
−40°C
25°C
V
= 5 V
GS
1.25
1
100°C
150°C
V
GS
= 10 V
0.75
0.5
V
= 10 V
DS
−40 −20
0
20
40
60
80 100 120 140
5
6
7
8
9
10
T (°C)
V
GS
(V)
Figure 10. Normalized RDS(on) vs. Temperature
Figure 11. Current Limit vs. Gate−Source
Voltage
8
7
6
5
4
3
2
10
1
V
GS
= 0 V
150°C
V
= 10 V
GS
0.1
100°C
0.01
0.001
0.0001
25°C
V
= 5 V
GS
−40°C
V
DS
= 10 V
−40 −20
0
20
40
60
80 100 120 140
10
15
20
25
(V)
30
35
40
T (°C)
V
J
DS
Figure 12. Current Limit vs. Junction
Temperature
Figure 13. Drain−to−Source Leakage Current
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6
NCV8402D, NCV8402AD
TYPICAL PERFORMANCE CURVES
1.1
1.2
1.1
1
I
V
= 150 mA
D
= V
1
0.9
0.8
0.7
0.6
0.5
GS
DS
−40°C
25°C
100°C
0.9
0.8
0.7
0.6
150°C
V
8
= 0 V
9
GS
−40 −20
0
20
40
60
80 100 120 140
1
2
3
4
5
I
6
7
10
T (°C)
(A)
S
Figure 14. Normalized Threshold Voltage vs.
Temperature
Figure 15. Source−Drain Diode Forward
Characteristics
1
0.8
0.6
0.4
0.2
0
200
150
100
50
I
V
R
= 2.5 A
= 12 V
I
V
R
= 2.5 A
D
D
= 12 V
DD
DD
= 0 W
= 0 W
G
G
−dV /d
DS t(on)
dV /d
DS t(off)
t
d(off)
t
f
t
r
t
d(on)
0
3
4
5
6
7
8
9
10
3
4
5
6
7
8
9
10
V
GS
(V)
V
GS
(V)
Figure 16. Resistive Load Switching Time vs.
Gate−Source Voltage
Figure 17. Resistive Load Switching
Drain−Source Voltage Slope vs. Gate−Source
Voltage
100
75
50
25
0
1
0.8
0.6
0.4
0.2
0
I
V
= 2.5 A
D
= 12 V
DD
−dV /d
, V = 10 V
DS t(on) GS
t
, (V = 10 V)
GS
d(off)
t , (V = 5 V)
r
GS
t , (V = 10 V)
f
t , (V = 5 V)
f GS
GS
t
, (V = 5 V)
GS
dV /d
, V = 5 V
dV /d
, V = 10 V
DS t(off) GS
d(off)
DS t(off) GS
t , (V = 10 V)
r
GS
−dV /d
, V = 5 V
DS t(on) GS
I
D
= 2.5 A
= 12 V
t
, (V = 5 V)
GS
d(on)
V
DD
t
, (V = 10 V)
d(on)
GS
0
400
800
1200
1600
2000
0
500
1000
R (W)
G
1500
2000
R
(W)
G
Figure 18. Resistive Load Switching Time vs.
Gate Resistance
Figure 19. Drain−Source Voltage Slope during
Turn On and Turn Off vs. Gate Resistance
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7
NCV8402D, NCV8402AD
TYPICAL PERFORMANCE CURVES
1000
Duty Cycle = 50%
100
10
20%
10%
5%
2%
1
1%
0.1
Single Pulse
0.01
0.0000001 0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE WIDTH (sec)
Figure 20. Transient Thermal Resistance
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8
NCV8402D, NCV8402AD
TEST CIRCUITS AND WAVEFORMS
RL
VIN
+
−
D
RG
VDD
DUT
G
S
IDS
Figure 21. Resistive Load Switching Test Circuit
90%
10%
90%
VIN
td(ON)
tr
td(OFF)
tf
10%
IDS
Figure 22. Resistive Load Switching Waveforms
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9
NCV8402D, NCV8402AD
TEST CIRCUITS AND WAVEFORMS
L
VDS
VIN
D
+
−
RG
VDD
DUT
G
S
tp
IDS
Figure 23. Inductive Load Switching Test Circuit
5 V
0 V
VIN
T
av
T
p
V
(BR)DSS
I
pk
VDD
VDS
IDS
V
DS(on)
0
Figure 24. Inductive Load Switching Waveforms
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10
NCV8402D, NCV8402AD
PACKAGE DIMENSIONS
SOIC−8
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
STYLE 11:
PIN 1. SOURCE 1
SOLDERING FOOTPRINT*
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
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or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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NCV8402D/D
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