NCV4264-2ST50T3G [ONSEMI]

Low IQ Low Dropout Linear Regulator; 低IQ低压降线性稳压器
NCV4264-2ST50T3G
型号: NCV4264-2ST50T3G
厂家: ONSEMI    ONSEMI
描述:

Low IQ Low Dropout Linear Regulator
低IQ低压降线性稳压器

线性稳压器IC 调节器 电源电路 光电二极管 输出元件 PC
文件: 总11页 (文件大小:98K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NCV4264-2  
Low IQ Low Dropout  
Linear Regulator  
The NCV4264-2 is functionally and pin for pin compatible with  
NCV4264 with a lower quiescent current consumption. Its output  
stage supplies 100 mA with "2.0% output voltage accuracy.  
Maximum dropout voltage is 500 mV at 100 mA load current.  
It is internally protected against 45 V input transients, input supply  
reversal, output overcurrent faults, and excess die temperature. No  
external components are required to enable these features.  
http://onsemi.com  
MARKING  
DIAGRAM  
TAB  
Features  
SOT-223  
ST SUFFIX  
CASE 318E  
AYW  
642xG  
G
ꢀ3.3 V and 5.0 V Fixed Output  
"2.0% Output Accuracy, Over Full Temperature Range  
ꢀ60 mA Maximum Quiescent Current at I  
2
3
1
1
= 100 mA  
OUT  
ꢀ500 mV Maximum Dropout Voltage at 100 mA Load Current  
ꢀWide Input Voltage Operating Range of 4.5 V to 45 V  
ꢀAEC-Q100 Qualified  
ꢀInternal Fault Protection  
ꢀ-42 V Reverse Voltage  
ꢀShort Circuit/Overcurrent  
ꢀThermal Overload  
x
= 5 (5.0 V Version)  
= 3 (3.3 V Version)  
= Assembly Location  
= Year  
A
Y
W
G
= Work Week  
= Pb-Free Package  
(Note: Microdot may be in either location)  
ꢀNCV Prefix for Automotive and Other Applications Requiring Site  
and Control Changes  
PIN CONNECTIONS  
TAB  
ꢀThis is a Pb-Free Device  
1
V
IN  
GND V  
OUT  
(Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
©ꢀ Semiconductor Components Industries, LLC, 2008  
March, 2008 - Rev. 4  
1
Publication Order Number:  
NCV4264-2/D  
NCV4264-2  
IN  
OUT  
1.3 V  
+
Reference  
Error  
Amp  
-
Thermal  
Shutdown  
GND  
Figure 1. Block Diagram  
PIN FUNCTION DESCRIPTION  
Pin No.  
Symbol  
Function  
1
2
V
Unregulated input voltage; 4.5 V to 45 V.  
Ground; substrate.  
IN  
GND  
3
V
Regulated output voltage; collector of the internal PNP pass transistor.  
Ground; substrate and best thermal connection to the die.  
OUT  
TAB  
GND  
OPERATING RANGE  
Rating  
Symbol  
Min  
4.5  
Max  
Unit  
V
V
IN  
+45  
V , DC Input Operating Voltage  
IN  
Junction Temperature Operating Range  
T
J
-40  
+150  
°C  
MAXIMUM RATINGS  
Rating  
Symbol  
Min  
Max  
Unit  
V
IN  
-42  
+45  
V
V , DC Input Voltage  
IN  
V
, DC Voltage  
V
-0.3  
-55  
+18  
V
°C  
-
OUT  
OUT  
Storage Temperature  
T
+150  
stg  
Moisture Sensitivity Level  
MSL  
3
ESD Capability, Human Body Model (Note 1)  
ESD Capability, Machine Model (Note 1)  
V
4000  
200  
-
-
V
ESDHB  
V
V
ESDMIM  
Lead Temperature Soldering  
Reflow (SMD Styles Only), Lead Free (Note 2)  
T
sld  
°C  
-
265 pk  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
RecommendedOperating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. This device series incorporates ESD protection and is tested by the following methods:  
ꢁESD HBM tested per AEC-Q100-002 (EIA/JESD22-A 114C)  
ꢁESD MM tested per AEC-Q100-003 (EIA/JESD22-A 115C)  
2. Lead Free, 60 sec – 150 sec above 217°C, 40 sec max at peak.  
http://onsemi.com  
2
 
NCV4264-2  
THERMAL RESISTANCE  
Parameter  
Symbol  
Min  
-
Max  
99 (Note 3)  
17  
Unit  
Junction-to-Ambient  
Junction-to-Case  
SOT-223  
SOT-223  
R
q
JA  
°C/W  
R
q
JC  
-
ELECTRICAL CHARACTERISTICS (V = 13.5 V, T = -40°C to +150°C, unless otherwise noted.)  
IN  
J
Characteristic  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Unit  
Output Voltage  
5.0 V Version  
V
OUT  
V
OUT  
V
OUT  
4.900  
3.234  
4.850  
5.000  
3.300  
5.000  
5.100  
3.366  
5.150  
V
5.0 mA v I  
v 50 mA (Note 4)  
OUT  
9.0 V v V v 16 V  
IN  
Output Voltage  
3.3 V Version  
V
V
5.0 mA v I  
v 50 mA (Note 4)  
OUT  
9.0 V v V v 16 V  
IN  
Output Voltage  
5.0 V Version  
0 mA v I  
v 100 mA (Note 4)  
OUT  
5.5 V v V v 21 V  
IN  
-40°C v T v 125°C  
J
Output Voltage  
5.0 V Version  
V
V
4.850  
3.201  
5.000  
3.300  
5.150  
3.399  
V
V
OUT  
5.0 mA v I  
v 100 mA (Note 4)  
OUT  
6.0 V v V v 21 V  
IN  
Output Voltage  
3.3 V Version  
OUT  
5.0 mA v I  
v 100 mA (Note 4)  
OUT  
4.5 V v V v 21 V  
IN  
Line Regulation  
5.0 V Version  
DV  
DV  
DV  
vs. V  
vs. V  
vs. I  
I = 1.0 mA  
OUT  
6.0 V v V v 28 V  
IN  
-30  
-30  
5.0  
5.0  
+30  
+30  
mV  
mV  
OUT  
IN  
Line Regulation  
3.3 V Version  
I
= 1.0 mA  
OUT  
IN  
OUT  
4.5 V v V v 28 V  
IN  
Load Regulation  
1.0 mA v I  
v 100 mA (Note 4)  
-40  
-
5.0  
270  
-
+40  
500  
mV  
mV  
V
OUT  
OUT  
OUT  
Dropout Voltage - 5.0 V Version  
Dropout Voltage - 3.3 V Version  
Quiescent Current  
V
V
-V  
IN OUT  
I
= 100 mA (Notes 4 & 5)  
OUT  
OUT  
-V  
IN OUT  
I
= 100 mA (Notes 4 & 7)  
-
1.299  
I
q
I
= 100 mA  
OUT  
T = 25°C  
mA  
-
-
-
33  
33  
33  
55  
60  
70  
J
T = -40°C to +85°C  
T = -40°C to 150°C  
J
J
Active Ground Current  
Power Supply Rejection  
I
I
= 50 mA (Note 4)  
-
-
1.5  
67  
4.0  
-
mA  
dB  
G(ON)  
OUT  
PSRR  
V
= 0.5 V , F = 100 Hz  
P-P  
RIPPLE  
Output Capacitor for Stability  
5.0 V Version  
C
I
= 0.1 mA to 100 mA  
(Notes 4)  
10  
-
-
-
-
9.0  
mF  
OUT  
OUT  
ESR  
W
Output Capacitor for Stability  
3.3 V Version  
C
I
= 0.1 mA to 100 mA  
(Notes 4)  
22  
-
-
-
-
16  
mF  
OUT  
OUT  
ESR  
W
PROTECTION  
Current Limit  
I
V
OUT  
V
OUT  
= 4.5 V (5.0 V Version) (Note 4)  
= 3.0 V (3.3 V Version) (Note 4)  
150  
150  
-
-
500  
500  
mA  
OUT(LIM)  
Short Circuit Current Limit  
I
V
OUT  
= 0 V (Note 4)  
(Note 6)  
40  
-
-
500  
200  
mA  
OUT(SC)  
Thermal Shutdown Threshold  
T
TSD  
150  
°C  
2
3. 1 oz., 100 mm copper area.  
4. Use pulse loading to limit power dissipation.  
5. Dropout voltage = (V –V ), measured when the output voltage has dropped 100 mV relative to the nominal value obtained with  
IN OUT  
V
IN  
= 13.5 V.  
6. Not tested in production. Limits are guaranteed by design.  
7. V = V - V . For output voltage set to < 4.5 V, V will be constrained by the minimum input voltage.  
DO  
IN  
OUT  
DO  
http://onsemi.com  
3
 
NCV4264-2  
4.5-45 V  
Input  
V
in  
V
out  
1
3
Output  
4264-2  
2
C
in  
100 nF  
C
OUT  
10 mF - 5.0 V Version  
22 mF - 3.3 V Version  
GND  
Figure 2. Applications Circuit  
http://onsemi.com  
4
NCV4264-2  
TYPICAL CHARACTERISTIC CURVES - 5 V Version  
10  
Unstable Region  
9
8
7
6
5
4
3
2
V
C
= 13.5 V  
in  
10 mF  
out  
Stable Region  
25  
1
0
0
50  
75  
100  
125  
150  
OUTPUT CURRENT (mA)  
Figure 3. NCV4264-2 ESR Characterization  
(5 V Version)  
0.4  
12  
10  
8
125°C  
0.35  
125°C  
25°C  
25°C  
0.3  
-40°C  
-40°C  
0.25  
0.2  
6
0.15  
0.1  
4
2
0.05  
0
V
IN  
= 13.5 V  
V
IN  
= 13.5 V  
0
0
50  
100  
OUTPUT LOAD (mA)  
150  
200  
0
5
10  
15  
OUTPUT LOAD (mA)  
Figure 4. Quiescent Current vs. Output Load  
(5 V Version)  
Figure 5. Quiescent Current vs. Output Load  
(Light Load) (5 V Version)  
0.45  
5.10  
5.08  
5.06  
5.04  
5.02  
5.00  
4.98  
4.96  
4.94  
125°C  
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
25°C  
-40°C  
0.05  
0
4.92  
4.90  
0
50  
100  
150  
200  
-50  
0
50  
100  
150  
OUTPUT LOAD (mA)  
TEMPERATURE (°C)  
Figure 6. Dropout Voltage vs. Output Load  
(5 V Version)  
Figure 7. Output Voltage vs. Temperature  
(5 V Version)  
http://onsemi.com  
5
NCV4264-2  
TYPICAL CHARACTERISTIC CURVES - 5 V Version  
180  
6.0  
160  
140  
120  
100  
80  
5.0  
4.0  
3.0  
T = 25°C  
A
2.0  
60  
40  
1.0  
T = 125°C  
A
20  
0
R = 50 W  
L
0
0
10  
20  
30  
40  
50  
0
2.0  
4.0  
6.0  
8.0  
10  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
Figure 8. Output Current vs. Input Voltage  
(5 V Version)  
Figure 9. Input Voltage vs. Output Voltage  
(5 V Version)  
16  
14  
12  
10  
8
6
R = 50 W  
L
4
2
0
R = 100 W  
L
0
10  
20  
30  
40  
50  
INPUT VOLTAGE (V)  
Figure 10. Quiescent Current vs. Input Voltage  
(5 V Version)  
http://onsemi.com  
6
NCV4264-2  
TYPICAL CHARACTERISTIC CURVES - 3.3 V Version  
10  
9
3.6  
3.3  
125°C  
3.0  
8
25°C  
2.7  
7
2.4  
-40°C  
6
2.1  
1.8  
1.5  
1.2  
0.9  
0.6  
5
4
3
2
I
= 5 mA  
out  
1
0
V
in  
= 13.5 V  
150  
0.3  
0
0
25  
50  
75  
100  
125  
175  
0
5
10  
15  
20  
25  
30  
35  
40 45  
OUTPUT CURRENT (mA)  
INPUT VOLTAGE (V)  
Figure 11. Quiescent Current vs. Output  
Current (3.3 V Version)  
Figure 12. Input Voltage vs. Output Voltage  
(3.3 V Version)  
8
7
3.366  
3.355  
3.344  
3.333  
3.322  
3.311  
3.300  
3.289  
3.278  
3.267  
3.256  
6
5
4
3
2
I
= 66 mA  
= 33 mA  
out  
V
= 13.5 V  
= 5 mA  
out  
out  
1
0
I
3.245  
3.234  
I
out  
0
5
10  
15  
20  
25  
30  
35  
40  
45  
-50 -25  
0
25  
50  
75  
100  
125 150  
INPUT VOLTAGE (V)  
TEMPERATURE (°C)  
Figure 13. Input Voltage vs. Quiescent Current  
(3.3 V Version)  
Figure 14. Output Voltage vs. Temperature  
(3.3 V Version)  
150  
140  
130  
120  
180  
150  
120  
90  
V
= 13.5 V  
= 5 mA  
in  
I
out  
60  
110  
100  
30  
0
-50 -25  
0
25  
50  
75  
100  
125 150  
0
5
10  
15  
20  
25  
30  
35  
40  
45  
TEMPERATURE (°C)  
INPUT VOLTAGE (V)  
Figure 15. Quiescent Current vs. Temperature  
(3.3 V Version)  
Figure 16. Input Voltage vs. Output Current  
(3.3 V Version)  
http://onsemi.com  
7
NCV4264-2  
TYPICAL CHARACTERISTIC CURVES - 3.3 V Version  
20  
Unstable Region  
15  
10  
5
V
C
= 13.5 V  
in  
22 mF  
out  
Stable Region  
30  
0
0
60  
90  
120  
150  
OUTPUT CURRENT (mA)  
Figure 17. ESR Stability vs. Output Current  
(3.3 V Version)  
http://onsemi.com  
8
NCV4264-2  
Circuit Description  
Calculating Power Dissipation in a Single Output  
Linear Regulator  
The NCV4264-2 is functionally and pin for pin  
compatible with NCV4264 with a lower quiescent current  
consumption. Its output stage supplies 100 mA with  
$2.0% output voltage accuracy.  
The maximum power dissipation for a single output  
regulator (Figure 3) is:  
ƪ
ƫ
ꢂ * I  
P
+ ꢂV  
IN(max)  
* V  
) V * I  
I(max) Q  
D(max)  
OUT(min) Q(max)  
Maximum dropout voltage is 500 mV at 100 mA load  
current. It is internally protected against 45 V input  
transients, input supply reversal, output overcurrent faults,  
and excess die temperature. No external components are  
required to enable these features.  
(eq. 1)  
Where:  
V
V
is the maximum input voltage,  
is the minimum output voltage,  
IN(max)  
OUT(min)  
I
is the maximum output current for the  
application, and I is the quiescent current the regulator  
Q(max)  
Regulator  
Q
The error amplifier compares the reference voltage to a  
) and drives the base of  
consumes at I  
the maximum permissible value of R  
. Once the value of P  
is known,  
can be calculated:  
Q(max)  
D(max)  
sample of the output voltage (V  
OUT  
JA  
q
a PNP series pass transistor by a buffer. The reference is a  
bandgap design to give it a temperature-stable output.  
Saturation control of the PNP is a function of the load  
current and input voltage. Oversaturation of the output  
power device is prevented, and quiescent current in the  
ground pin is minimized.  
(
)
150°C * T  
A
(eq. 2)  
P
+
qJA  
P
D
The value of R  
can then be compared with those in the  
JA  
q
package section of the data sheet. Those packages with  
's less than the calculated value in Equation 2 will  
R
JA  
q
keep the die temperature below 150°C. In some cases, none  
of the packages will be sufficient to dissipate the heat  
generated by the IC, and an external heat sink will be  
required. The current flow and voltages are shown in the  
Measurement Circuit Diagram.  
Regulator Stability Considerations  
The input capacitor C in Figure 2 is necessary for  
I1  
compensating input line reactance. Possible oscillations  
caused by input inductance and input capacitance can be  
damped by using a resistor of approximately 1 W in series  
Heat Sinks  
with C . The output or compensation capacitor, C  
I2  
OUT  
A heat sink effectively increases the surface area of the  
package to improve the flow of heat away from the IC and  
into the surrounding air. Each material in the heat flow path  
between the IC and the outside environment will have a  
thermal resistance. Like series electrical resistances, these  
helps determine three main characteristics of a linear  
regulator: startup delay, load transient response and loop  
stability. Tantalum, aluminum electrolytic, film, or  
ceramic capacitors are all acceptable solutions, however,  
attention must be paid to ESR constraints. The capacitor  
manufacturer's data sheet usually provides this  
resistances are summed to determine the value of R  
:
JA  
q
R
+ R  
qJC  
) R  
qCS  
) R  
qSA  
(eq. 3)  
qJA  
information. The value for the output capacitor C  
shown in Figure 2 should work for most applications;  
however, it is not necessarily the optimized solution.  
OUT  
Where:  
R
R
R
= the junction-to-case thermal resistance,  
JC  
q
q
q
Stability is guaranteed at values of C w 10 mF, with an  
Q
= the case-to-heat sink thermal resistance, and  
= the heat sink-to-ambient thermal resistance.  
appears in the package section of the data sheet.  
CS  
SA  
ESR v 9 W for the 5.0 V Version, and C w 22 mF with  
Q
an ESR v 16 W for the 3.3 V Version within the operating  
temperature range. Actual limits are shown in a graph in the  
Typical Performance Characteristics section.  
R
JA  
q
Like R , it too is a function of package type. R  
JA  
and  
CS  
q
q
are functions of the package type, heat sink and the  
R
SA  
q
interface between them. These values appear in data sheets  
of heat sink manufacturers. Thermal, mounting, and heat  
sinking are discussed in the ON Semiconductor application  
note AN1040/D, available on the ON Semiconductor  
Website.  
http://onsemi.com  
9
NCV4264-2  
120  
100  
80  
60  
40  
20  
0
SOT-223  
0
100  
200  
300  
400  
500  
600  
700  
COPPER AREA (sq mm)  
Figure 18.  
1000  
100  
10  
SOT-223  
1
0.1  
0.01  
0.001  
0.000001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
PULSE TIME (sec)  
Figure 19.  
ORDERING INFORMATION  
Device  
Package  
Shipping†  
NCV4264-2ST50T3G  
NCV4264-2ST33T3G  
SOT-223  
(Pb-Free)  
4000 / Tape & Reel  
SOT-223  
(Pb-Free)  
4000 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
http://onsemi.com  
10  
NCV4264-2  
PACKAGE DIMENSIONS  
SOT-223 (TO-261)  
CASE 318E-04  
ISSUE M  
NOTES:  
D
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
b1  
MILLIMETERS  
INCHES  
NOM  
0.064  
0.002  
0.030  
0.121  
0.012  
0.256  
0.138  
0.091  
0.037  
0.069  
0.276  
-
4
2
DIM  
A
A1  
b
b1  
c
D
E
e
e1  
L1  
H
E
MIN  
1.50  
0.02  
0.60  
2.90  
0.24  
6.30  
3.30  
2.20  
0.85  
1.50  
6.70  
0°  
NOM  
1.63  
0.06  
0.75  
3.06  
0.29  
6.50  
3.50  
2.30  
0.94  
1.75  
7.00  
-
MAX  
1.75  
0.10  
0.89  
3.20  
0.35  
6.70  
3.70  
2.40  
1.05  
2.00  
7.30  
10°  
MIN  
0.060  
0.001  
0.024  
0.115  
0.009  
0.249  
0.130  
0.087  
0.033  
0.060  
0.264  
0°  
MAX  
0.068  
0.004  
0.035  
0.126  
0.014  
0.263  
0.145  
0.094  
0.041  
0.078  
0.287  
10°  
H
E
E
1
3
b
e1  
e
C
q
q
A
0.08 (0003)  
A1  
L1  
SOLDERING FOOTPRINT  
3.8  
0.15  
2.0  
0.079  
6.3  
2.3  
2.3  
0.248  
0.091  
0.091  
2.0  
0.079  
mm  
inches  
1.5  
0.059  
ǒ
Ǔ
SCALE 6:1  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any  
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental  
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over  
time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under  
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SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
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NCV4264-2/D  

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