NCV4264ST50T3G [ONSEMI]

150 mA Low Dropout Linear Regulator; 150毫安低压差线性稳压器
NCV4264ST50T3G
型号: NCV4264ST50T3G
厂家: ONSEMI    ONSEMI
描述:

150 mA Low Dropout Linear Regulator
150毫安低压差线性稳压器

稳压器
文件: 总8页 (文件大小:116K)
中文:  中文翻译
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NCV4264  
150 mA Low Dropout  
Linear Regulator  
The NCV4264 is a wide input range, precision fixed output, low  
dropout integrated voltage regulator with a full load current rating of  
150 mA.  
The output voltage is accurate within "2.0%, and maximum  
dropout voltage is 500 mV at 100 mA load current.  
http://onsemi.com  
It is internally protected against 45 V input transients, input supply  
reversal, output overcurrent faults, and excess die temperature. No  
external components are required to enable these features.  
MARKING  
DIAGRAM  
TAB  
SOT223  
ST SUFFIX  
CASE 318E  
Features  
AYW  
V64_5x G  
1
5.0 V Fixed Output  
"2.0% Output Accuracy, Over Full Temperature Range  
Quiescent Current 400 mA at I  
2
3
1
A
Y
= Assembly Location  
= Year  
= 1.0 mA  
OUT  
W
= Work Week  
500 mV Maximum Dropout Voltage at 100 mA Load Current  
Wide Input Voltage Operating Range of 5.5 V to 45 V  
V64_5x = Specific Device Code  
x
G
= 5 (5.0 V)  
= PbFree Package  
Internal Fault Protection  
42 V Reverse Voltage  
Short Circuit/Overcurrent  
Thermal Overload  
NCV Prefix for Automotive and Other Applications Requiring Site  
and Control Changes  
PIN CONNECTIONS  
GND  
AECQ100 Qualified  
This is a PbFree Device  
1
V
IN  
GND V  
OUT  
(Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. P0  
NCV4264/D  
NCV4264  
IN  
OUT  
1.3 V  
Reference  
+
Error  
Amp  
Thermal  
Shutdown  
GND  
Figure 1. Block Diagram  
PIN FUNCTION DESCRIPTION  
Pin No.  
Symbol  
Function  
1
2
V
Unregulated input voltage; 5.5 V to 45 V.  
Ground; substrate.  
IN  
GND  
3
V
Regulated output voltage; collector of the internal PNP pass transistor.  
Ground; substrate and best thermal connection to the die.  
OUT  
TAB  
GND  
MAXIMUM RATINGS  
Rating  
Symbol  
Min  
Max  
Unit  
V
IN  
42  
+45  
V
V , DC Input Voltage  
IN  
V
, DC Voltage  
V
0.3  
55  
+16  
V
_C  
OUT  
OUT  
Storage Temperature  
T
+150  
stg  
Moisture Sensitivity Level  
MSL  
1
ESD Capability, Human Body Model (Note 1)  
ESD Capability, Machine Model (Note 1)  
V
4000  
200  
V
ESDHB  
V
V
ESDMIM  
Lead Temperature Soldering  
Reflow (SMD Styles Only), Lead Free (Note 2)  
T
sld  
_C  
265 pk  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
RecommendedOperating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
OPERATING RANGE  
Pin Symbol, Parameter  
Symbol  
Min  
5.5  
Max  
+45  
Unit  
V
V
IN  
V , DC Input Operating Voltage  
IN  
Junction Temperature Operating Range  
T
40  
+150  
_C  
J
1. This device series incorporates ESD protection and is tested by the following methods:  
ESD HBM tested per AECQ100002 (EIA/JESD22A 114C)  
ESD MM tested per AECQ100003 (EIA/JESD22A 115C)  
2. Lead Free, 60 sec – 150 sec above 217_C, 40 sec max at peak.  
http://onsemi.com  
2
 
NCV4264  
THERMAL RESISTANCE  
Parameter  
Symbol  
Condition  
Min  
Max  
99 (Note 3)  
17  
Unit  
JunctiontoAmbient  
JunctiontoCase  
SOT223  
SOT223  
R
q
JA  
°C/W  
R
q
JC  
ELECTRICAL CHARACTERISTICS (V = 13.5 V, Tj = 40_C to +150_C, unless otherwise noted.)  
IN  
Characteristic  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Unit  
Output Voltage  
V
OUT  
4.900  
5.000  
5.100  
V
5.0 mA v I v 100 mA (Note 4)  
OUT  
6.0 V v V v 28 V  
IN  
Line Regulation  
DV  
vs. V  
I = 5.0 mA  
OUT  
30  
5.0  
+30  
mV  
OUT  
IN  
6.0 V v V v 28 V  
IN  
Load Regulation  
DV  
vs. I  
5.0 mA v I  
v 100 mA (Note 4)  
40  
5.0  
275  
83  
+40  
500  
400  
15  
mV  
mV  
mA  
OUT  
OUT  
OUT  
Dropout Voltage  
V
V  
IN OUT  
I
= 100 mA (Notes 4 & 5)  
OUT  
Quiescent Current  
I
q
I
= 1.0 mA  
OUT  
Active Ground Current  
Power Supply Rejection  
Output Capacitor for Stability  
I
I
= 50 mA (Note 4)  
1.5  
67  
mA  
dB  
G(ON)  
OUT  
PSRR  
V
= 0.5 V , F = 100 Hz  
RIPPLE  
PP  
C
I
= 1.0 mA to 100 mA  
(Notes 4)  
10  
mF  
W
OUT  
ESR  
OUT  
9.0  
PROTECTION  
Current Limit  
I
V
= 4.5 V (Note 4)  
150  
40  
500  
500  
200  
mA  
mA  
_C  
OUT(LIM)  
OUT  
Short Circuit Current Limit  
I
V
= 0 V (Note 4)  
(Note 6)  
OUT(SC)  
OUT  
Thermal Shutdown Threshold  
T
TSD  
150  
2
3. 1 oz., 100 mm copper area.  
4. Use pulse loading to limit power dissipation.  
5. Dropout voltage = (V –V  
), measured when the output voltage has dropped 100 mV relative to the nominal value obtained with  
IN OUT  
V
IN  
= 13.5 V.  
6. Not tested in production. Limits are guaranteed by design.  
I
I
Q
Output  
V
in  
V
out  
5.545 V  
I
4264  
2
1
3
Input  
C
C
OUT  
10 mF  
I1  
R
L
100 nF  
100 mF  
GND  
Figure 2. Measurement Circuit  
5.545 V  
Input  
V
in  
V
out  
4264  
2
1
3
5.0 V Output  
C
C
OUT  
10 mF  
in  
100 nF  
GND  
Figure 3. Applications Circuit  
http://onsemi.com  
3
 
NCV4264  
TYPICAL CHARACTERISTIC CURVES  
1000  
100  
0.45  
0.40  
125°C  
Maximum ESR  
0.35  
C
out  
= 10, 22 mF  
25°C  
0.30  
0.25  
0.20  
0.15  
0.10  
10  
1
40°C  
0.1  
0.05  
0
Stable Region  
20 40  
V = 13.5 V  
in  
0.01  
0
60  
80  
100 120 140 160 180  
0
50  
100  
150  
200  
LOAD CURRENT (mA)  
OUTPUT LOAD (mA)  
Figure 4. ESR Characterization  
Figure 5. Dropout Voltage vs. Output Load  
14  
12  
18  
16  
125°C  
25°C  
14  
10  
8.0  
6.0  
4.0  
12  
40°C  
10  
8.0  
6.0  
4.0  
R = 50 W  
L
2.0  
0
R = 100 W  
L
2.0  
0
0
50  
100  
150  
200  
0
10  
20  
30  
40  
50  
OUTPUT CURRENT (mA)  
CURRENT CONSUMPTION (mA)  
Figure 6. Current Consumption vs. Input  
Voltage  
Figure 7. Current Consumption vs. Output  
Current  
5.10  
5.08  
5.06  
5.04  
5.02  
5.00  
4.98  
4.96  
4.94  
450  
400  
350  
300  
250  
200  
150  
100  
125°C  
25°C  
40°C  
50  
0
4.92  
4.90  
50  
0
50  
100  
150  
0
5.0  
10  
15  
20  
TEMPERATURE (°C)  
OUTPUT LOAD (mA)  
Figure 9. Output Voltage vs. Temperature  
Figure 8. Quiescent Current vs. Output Load  
http://onsemi.com  
4
NCV4264  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
180  
160  
140  
120  
100  
80  
T = 25°C  
A
60  
40  
T = 125°C  
A
20  
0
R = 50 W  
L
0
0
2.0  
4.0  
6.0  
8.0  
10  
0
10  
20  
30  
40  
50  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
Figure 11. Input Voltage vs. Output Voltage  
Figure 10. Output Current vs. Input Voltage  
http://onsemi.com  
5
NCV4264  
Circuit Description  
Calculating Power Dissipation in a Single Output  
Linear Regulator  
The maximum power dissipation for a single output  
regulator (Figure 3) is:  
The NCV4264 is a precision trimmed 5.0 V fixed output  
regulator. The device has current capability of 150 mA,  
with 500 mV of dropout voltage at 100 mA of current. The  
regulation is provided by a PNP pass transistor controlled  
by an error amplifier with a bandgap reference. The  
regulator is protected by both current limit and short circuit  
protection. Thermal shutdown occurs above 150°C to  
protect the IC during overloads and extreme ambient  
temperatures.  
P
+ [V  
IN(max)  
* V ] @  
OUT(min)  
I(max) q  
D(max)  
(eq. 1)  
I
) V @ I  
Q(max)  
Where:  
V
V
is the maximum input voltage,  
IN(max)  
is the minimum output voltage,  
OUT(min)  
I
is the maximum output current for the  
Q(max)  
Regulator  
application, and I is the quiescent current the regulator  
q
The error amplifier compares the reference voltage to a  
consumes at I  
.
Q(max)  
sample of the output voltage (V ) and drives the base of  
Once the value of P  
is known, the maximum  
out  
D(Max)  
a PNP series pass transistor by a buffer. The reference is a  
bandgap design to give it a temperaturestable output.  
Saturation control of the PNP is a function of the load  
current and input voltage. Over saturation of the output  
power device is prevented, and quiescent current in the  
ground pin is minimized.  
permissible value of R  
can be calculated:  
JA  
q
150oC * T  
A
P
qJA  
+
(eq. 2)  
P
D
The value of R  
can then be compared with those in the  
JA  
q
package section of the data sheet. Those packages with  
R
’s less than the calculated value in Equation 2 will keep  
JA  
q
the die temperature below 150°C. In some cases, none of  
the packages will be sufficient to dissipate the heat  
generated by the IC, and an external heat sink will be  
required. The current flow and voltages are shown in the  
Measurement Circuit Diagram.  
Regulator Stability Considerations  
The input capacitor C  
in Figure 2 is necessary for  
IN1  
compensating input line reactance. Possible oscillations  
caused by input inductance and input capacitance can be  
damped by using a resistor of approximately 1 W in series  
with C . The output or compensation capacitor, C  
IN2  
OUT  
Heat Sinks  
helps determine three main characteristics of a linear  
regulator: startup delay, load transient response and loop  
stability. The capacitor value and type should be based on  
cost, availability, size and temperature constraints. A  
tantalum or aluminum electrolytic capacitor is best, since  
a film or ceramic capacitor with almost zero ESR can cause  
instability. The aluminum electrolytic capacitor is the least  
expensive solution, but, if the circuit operates at low  
temperatures (25°C to 40°C), both the value and ESR of  
the capacitor will vary considerably. The capacitor  
manufacturers data sheet usually provides this  
A heat sink effectively increases the surface area of the  
package to improve the flow of heat away from the IC and  
into the surrounding air. Each material in the heat flow path  
between the IC and the outside environment will have a  
thermal resistance. Like series electrical resistances, these  
resistances are summed to determine the value of R  
:
JA  
q
R
qJA  
+ R  
qJC  
) R  
qCS  
) R  
qSA  
(eq. 3)  
Where:  
R
R
R
R
= the junctiontocase thermal resistance,  
JC  
CS  
SA  
JA  
q
q
q
q
= the casetoheat sink thermal resistance, and  
= the heat sinktoambient thermal resistance.  
appears in the package section of the data sheet.  
information. The value for the output capacitor C  
OUT  
shown in Figure 2 should work for most applications;  
however, it is not necessarily the optimized solution.  
Stability is guaranteed at values CQ = 10 mF and an ESR  
= 9W within the operating temperature range. Actual limits  
are shown in a graph in the Typical Performance  
Characteristics section.  
Like R , it too is a function of package type. R  
and  
JA  
CS  
q
q
R
are functions of the package type, heat sink and the  
SA  
q
interface between them. These values appear in data sheets  
of heat sink manufacturers. Thermal, mounting, and heat  
sinking are discussed in the ON Semiconductor application  
note AN1040/D, available on the ON Semiconductor  
Website.  
http://onsemi.com  
6
 
NCV4264  
120  
100  
SOT223  
80  
60  
40  
20  
0
0
100  
200  
300  
400  
500  
600  
700  
2
COPPER AREA (mm )  
Figure 12.  
100  
10  
SOT223  
1.0  
0.1  
0.000001 0.00001  
0.0001  
0.001  
0.01  
0.1  
1.0  
10  
100  
1000  
PULSE TIME (sec)  
Figure 13.  
ORDERING INFORMATION  
Device  
Marking  
V64_5  
Package  
Shipping†  
NCV4264ST50T3G  
SOT223  
4000 Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
http://onsemi.com  
7
NCV4264  
PACKAGE DIMENSIONS  
SOT223 (TO261)  
ST SUFFIX  
CASE 318E04  
ISSUE L  
NOTES:  
D
b1  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
MILLIMETERS  
INCHES  
NOM  
0.064  
0.002  
0.030  
0.121  
0.012  
0.256  
0.138  
0.091  
0.037  
0.069  
0.276  
4
2
DIM  
A
A1  
b
b1  
c
D
E
e
e1  
L1  
MIN  
1.50  
0.02  
0.60  
2.90  
0.24  
6.30  
3.30  
2.20  
0.85  
1.50  
6.70  
0°  
NOM  
1.63  
0.06  
0.75  
3.06  
0.29  
6.50  
3.50  
2.30  
0.94  
1.75  
7.00  
MAX  
1.75  
0.10  
0.89  
3.20  
0.35  
6.70  
3.70  
2.40  
1.05  
2.00  
7.30  
10°  
MIN  
0.060  
0.001  
0.024  
0.115  
0.009  
0.249  
0.130  
0.087  
0.033  
0.060  
0.264  
0°  
MAX  
0.068  
0.004  
0.035  
0.126  
0.014  
0.263  
0.145  
0.094  
0.041  
0.078  
0.287  
10°  
H
E
E
1
3
b
e1  
e
H
E
C
q
q
A
0.08 (0003)  
A1  
L1  
SOLDERING FOOTPRINT*  
3.8  
0.15  
2.0  
0.079  
6.3  
0.248  
2.3  
0.091  
2.3  
0.091  
2.0  
0.079  
mm  
1.5  
0.059  
ǒinches  
Ǔ
SCALE 6:1  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
MountingTechniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any  
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental  
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over  
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under  
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,  
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death  
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,  
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of  
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.  
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81357733850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
NCV4264/D  

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