MC14521BDG [ONSEMI]
24−Stage Frequency Divider; 24级分频器
| 型号： | MC14521BDG |
| 厂家： | 
ONSEMI |
| 描述： | 24−Stage Frequency Divider |
| 文件： | 总9页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC14521B
24−Stage Frequency Divider
The MC14521B consists of a chain of 24 flip−flops with an input
circuit that allows three modes of operation. The input will function as a
crystal oscillator, an RC oscillator, or as an input buffer for an external
oscillator. Each flip−flop divides the frequency of the previous flip−flop
24
by two, consequently this part will count up to 2 = 16,777,216. The
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count advances on the negative going edge of the clock. The outputs of
the last seven−stages are available for added flexibility.
MARKING
Features
DIAGRAMS
• All Stages are Resettable
16
• Reset Disables the RC Oscillator for Low Standby Power Drain
PDIP−16
P SUFFIX
CASE 648
MC14521BCP
AWLYYWWG
• RC and Crystal Oscillator Outputs Are Capable of Driving External
Loads
1
1
• Test Mode to Reduce Test Time
• V ′ and V ′ Pins Brought Out on Crystal Oscillator Inverter to
DD
SS
16
SOIC−16
D SUFFIX
CASE 751B
Allow the Connection of External Resistors for Low−Power Operation
14521BG
AWLYWW
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
1
1
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load over the Rated Temperature Range
• Pb−Free Packages are Available*
16
SOEIAJ−16
F SUFFIX
CASE 966
MC14521B
ALYWG
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
1
1
Parameter
Symbol
Value
Unit
V
DC Supply Voltage Range
V
−0.5 to +18.0
DD
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
Input or Output Voltage Range
(DC or Transient)
V , V
in out
−0.5 to V
+0.5
V
DD
Input or Output Current (DC or Transient)
per Pin
I , I
in out
10
mA
G
= Pb−Free Package
Power Dissipation, per Package (Note 1)
Ambient Temperature Range
P
T
500
mW
°C
D
−55 to +125
−65 to +150
260
A
ORDERING INFORMATION
Storage Temperature Range
T
stg
°C
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Lead Temperature (8−Second Soldering)
T
°C
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
SS
DD
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
June, 2006 − Rev. 6
MC14521B/D
MC14521B
BLOCK DIAGRAM
RESET
2
STAGES
1 THRU 17
STAGES
18 THRU 24
Q18 Q19 Q20 Q21 Q22 Q23 Q24
9
IN 1
6
IN 2
V
V
= PIN 16
= PIN 8
DD
SS
PIN ASSIGNMENT
5
4
OUT2
3
7
OUT 1
10 11 12 13 14 15
1
V
′
DD
V
′
SS
Q24
1
2
3
4
5
6
7
8
16
V
DD
RESET
15 Q23
14 Q22
13 Q21
12 Q20
11 Q19
10 Q18
Output
Count Capacity
18
Q18
Q19
Q20
Q21
Q22
Q23
Q24
2
= 262,144
= 524,288
V
′
SS
19
20
21
22
23
24
2
2
2
2
2
2
OUT 2
= 1,048,576
= 2,097,152
= 4,194,304
= 8,388,608
= 16,777,216
V
′
DD
IN 2
V
9
IN 1
SS
ORDERING INFORMATION
Device
†
Package
PDIP−16
PDIP−16
Shipping
MC14521BCP
25 Units / Rail
MC14521BCPG
(Pb−Free)
MC14521BD
SOIC−16
48 Units / Rail
MC14521BDG
SOIC−16
(Pb−Free)
MC14521BDR2
SOIC−16
2500 / Tape & Reel
50 Units / Rail
MC14521BDR2G
SOIC−16
(Pb−Free)
MC14521BF
SOEIAJ−16
MC14521BFG
SOEIAJ−16
(Pb−Free)
MC14521BFEL
SOEIAJ−16
2000 / Tape & Reel
MC14521BFELG
SOEIAJ−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
MC14521B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
− 55_C
25_C
125_C
V
Typ
DD
(Note 2)
Min
Max
Min
Max
Min
Max
Vdc
Characteristic
Output Voltage
Symbol
Unit
“0” Level
V
5.0
10
15
−
−
−
0.05
0.05
0.05
−
−
−
0
0
0
0.05
0.05
0.05
−
−
−
0.05
0.05
0.05
Vdc
OL
V
in
= V or 0
DD
“1” Level
V
5.0
10
15
4.95
9.95
14.95
−
−
−
4.95
9.95
14.95
5.0
10
15
−
−
−
4.95
9.95
14.95
−
−
−
Vdc
Vdc
OH
V
= 0 or V
in
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
“0” Level
V
IL
5.0
10
15
−
−
−
1.5
3.0
4.0
−
−
−
2.25
4.50
6.75
1.5
3.0
4.0
−
−
−
1.5
3.0
4.0
O
O
O
(V = 9.0 or 1.0 Vdc)
(V = 13.5 or 1.5 Vdc)
“1” Level
V
Vdc
IH
(V = 0.5 or 4.5 Vdc)
O
5.0
10
15
3.5
7.0
11
−
−
−
3.5
7.0
11
2.75
5.50
8.25
−
−
−
3.5
7.0
11
−
−
−
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Pins 4 & 7
5.0
5.0
10
– 1.2
– 0.25
– 0.62
– 1.8
−
−
−
−
– 1.0
– 0.2
– 0.5
– 1.5
– 1.7
– 0.36
– 0.9
– 3.5
−
−
−
−
– 0.7
– 0.14
– 0.35
– 1.1
−
−
−
−
OH
OH
OH
OH
15
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc) 11, 12, 13, 14
Source
Pins 1, 10,
OH
OH
OH
OH
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
−
−
−
−
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
−
−
−
−
– 1.7
– 0.36
– 0.9
– 2.4
−
−
−
−
mAdc
mAdc
= 13.5 Vdc)
and 15
15
(V = 0.4 Vdc)
(V = 0.5 Vdc)
(V = 1.5 Vdc)
Sink
OL
OL
OL
I
5.0
10
15
0.64
1.6
4.2
−
−
−
0.51
1.3
3.4
0.88
2.25
8.8
−
−
−
0.36
0.9
2.4
−
−
−
OL
Input Current
Input Capacitance
I
15
−
−
−
0.1
−
−
−
0.00001
5.0
0.1
7.5
−
−
1.0
−
mAdc
in
C
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
−
−
−
5.0
10
20
−
−
−
0.005
0.010
0.015
5.0
10
20
−
−
−
150
300
600
mAdc
mAdc
DD
Total Supply Current (Note 3, 4)
(Dynamic plus Quiescent,
Per Package)
I
5.0
10
15
I
I
I
= (0.42 mA/kHz) f + I
= (0.85 mA/kHz) f + I
= (1.40 mA/kHz) f + I
T
T
T
T
DD
DD
DD
(C = 50 pF on all outputs, all
L
buffers switching)
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25_C.
4. To calculate total supply current at loads other than 50 pF: I (C ) = I (50 pF) + (C – 50) Vfk where: I is in mA (per package), C in pF,
T
L
T
L
T
L
V = (V – V ) in volts, f in kHz is input frequency, and k = 0.003.
DD
SS
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3
MC14521B
SWITCHING CHARACTERISTICS (Note 5) (C = 50 pF, T = 25_C)
L
A
V
Typ
DD
Vdc
(Note 6)
Characteristic
Symbol
Min
Max
Unit
Output Rise and Fall Time (Counter Outputs)
t
, t
ns
TLH THL
t
t
t
, t
= (1.5 ns/pF) C + 25 ns
5.0
10
15
−
−
−
100
50
40
200
100
80
TLH THL
L
, t
= (0.75 ns/pF) C + 12.5 ns
TLH THL
L
, t
= (0.55 ns/pF) C + 12.5 ns
TLH THL
L
Propagation Delay Time
Clock to Q18
t
, t
ms
PHL PLH
t
t
t
, t
= (1.7 ns/pF) C + 4415 ns
5.0
10
15
−
−
−
4.5
1.7
1.3
9.0
3.5
2.7
PHL PLH
L
, t
= (0.66 ns/pF) C + 1667 ns
PHL PLH
L
, t
= (0.5 ns/pF) C + 1275 ns
L
PHL PLH
Clock to Q24
t
t
t
, t
= (1.7 ns/pF) C + 5915 ns
= (0.66 ns/pF) C + 2167 ns
L
PHL PLH L
5.0
10
15
−
−
−
6.0
2.2
1.7
12
4.5
3.5
, t
PHL PLH
, t
= (0.5 ns/pF) C + 1675 ns
PHL PLH
L
Propagation Delay Time
Reset to Q
t
ns
PHL
n
t
t
t
= (1.7 ns/pF) C + 1215 ns
= (0.66 ns/pF) C + 467 ns
5.0
10
15
−
−
−
1300
500
375
2600
1000
750
PHL
PHL
PHL
L
L
= (0.5 ns/pF) C + 350 ns
L
Clock Pulse Width
t
5.0
10
15
385
150
120
140
55
40
−
−
−
ns
MHz
ms
WH(cl)
Clock Pulse Frequency
Clock Rise and Fall Time
Reset Pulse Width
f
5.0
10
15
−
−
−
3.5
9.0
12
2.0
5.0
6.5
cl
t
, t
5.0
10
15
−
−
−
−
−
−
15
5.0
4.0
TLH THL
t
5.0
10
15
1400
600
450
700
300
225
−
−
−
ns
WH(R)
Reset Removal Time
t
5.0
10
15
30
0
– 40
– 200
– 160
– 110
−
−
−
ns
rem
5. The formulas given are for the typical characteristics only at 25_C.
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
V
DD
0.01 mF
CERAMIC
500 mF
I
D
V
V
DD
DD
20 ns
90%
10%
20 ns
Q18
Q19
PULSE
GENERATOR
V
C
DD
L
IN 2
V
in
50%
C
L
Q20
Q21
Q22
Q23
Q24
0 V
C
L
50% DUTY CYCLE
C
L
C
L
R
C
L
C
L
V
V
SS
SS
Figure 1. Power Dissipation Test Circuit and Waveform
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4
MC14521B
V
DD
V
V ′
DD
DD
20 ns
20 ns
90%
20 ns
IN 2
Q18
Q19
PULSE
GENERATOR
C
IN 2
L
50%
10%
C
L
Q20
Q21
Q22
Q23
Q24
C
L
t
t
WH
WL
C
L
90%
C
50%
L
Q
n
R
10%
t
C
L
t
C
PLH
PHL
L
V
V
′
SS
SS
t
t
THL
TLH
Figure 2. Switching Time Test Circuit and Waveforms
500 kHz
Circuit
50 kHz
Circuit
Characteristic
Unit
Crystal Characteristics
Resonant Frequency
Equivalent Resistance, R
500
1.0
50
6.2
kHz
kW
S
External Resistor/Capacitor Values
V
DD
47
82
20
750
82
20
kW
pF
pF
R
o
C
T
C
S
R
o
R*
V
V
′
DD
DD
18 M
Frequency Stability
IN 1 OUT 1
OUT 2
Q18
Frequency Change as a Function
of V (T = 25_C)
DD
A
+ 6.0
+ 2.0
+ 2.0
+ 2.0
ppm
ppm
V
V
Change from 5.0 V to 10 V
Change from 10 V to 15 V
DD
DD
Q19
IN 2
Q20
Q21
Q22
Q23
Q24
Frequency Change as a Function
– 4.0
+ 100
– 2.0
+ 120
ppm
ppm
of Temperature (V = 10 V)
DD
T Change from – 55_C to + 25_C
A
C
C
T
S
R
MC14521 only
Complete Oscillator*
V
V ′
SS
SS
– 2.0
– 160
– 2.0
– 560
ppm
ppm
T Change from +25_C to+125_C
A
R*
MC14521 only
Complete Oscillator*
*Optional for low power operation,
10 kW ≤ R ≤ 70 kW.
*Complete oscillator includes crystal, capacitors, and resistors.
Figure 4. Typical Data for Crystal Oscillator Circuit
Figure 3. Crystal Oscillator Circuit
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5
MC14521B
100
50
TEST CIRCUIT
FIGURE 7
8.0
4.0
V
= 10 V
DD
TEST CIRCUIT
FIGURE 7
V
= 15 V
DD
20
10
f AS A FUNCTION
OF R
TC
(C = 1000 pF)
(R ≈ 2R
0
−4.0
−8.0
−12
)
TC
S
5.0
f AS A FUNCTION
OF C
(R = 56 kW)
10 V
2.0
1.0
0.5
TC
(R = 120 k)
S
5.0 V
0.2
0.1
R
= 56 kW,
R
R
= 0, f = 10.15 kHz @ V = 10 V, T = 25°C
DD A
= 120 kW, f = 7.8 kHz @ V = 10 V, T = 25°C
DD A
TC
S
{
C = 1000 pF
S
1.0 k
10 k
R , RESISTANCE (OHMS)
TC
100 k
1.0 m
0.1
−16
−55
−25
0
25
50
75
100
125
T , AMBIENT TEMPERATURE (°C), DEVICE ONLY
0.0001
0.001
0.01
A
C, CAPACITANCE (mF)
Figure 5. RC Oscillator Stability
Figure 6. RC Oscillator Frequency as a
Function of RTC and C
R
R
TC
V
V
DD
S
DD
C
V
′
DD
V
V ′
DD
DD
IN 1
Q18
Q19
Q20
Q21
Q22
Q23
Q24
IN 1 OUT 1
OUT 2
Q18
Q19
Q20
Q21
Q22
Q23
Q24
IN 2
R
PULSE
GENERATOR
IN 2
OUT 1
OUT 2
R
V
V
SS
SS
V
V
′
SS
SS
Figure 7. RC Oscillator Circuit
Figure 8. Functional Test Circuit
FUNCTIONAL TEST SEQUENCE
Inputs
Reset In 2 Out 2
Outputs
Comments
V
′
V
′
DD
Q18
thru
Q24
Counter is in three 8−stage sections
in parallel mode Counter is reset. In 2
and Out 2 are connected together.
SS
1
0
0
1
0
1
V
GND
0
DD
First “0” to “1” transition on In 2,
Out 2 node.
A test function (see Figure 8) has been included
for the reduction of test time required to exercise all
24 counter stages. This test function divides the
counter into three 8−stage sections, and 255
counts are loaded in each of the 8−stage sections
in parallel. All flip−flops are now at a logic “1”. The
counter is now returned to the normal 24−stages in
series configuration. One more pulse is entered into
Input 2 (In 2) which will cause the counter to ripple
from an all “1” state to an all “0” state.
0
1
−
−
−
0
1
−
−
−
255 “0” to “1” transitions are clocked
into this In 2, Out 2 node.
1
1
1
The 255th “0” to “1” transition.
0
0
0
0
1
1
GND
Counter converted back to 24−stages
in series mode.
1
1
0
0
1
1
V
DD
Out 2 converts back to an output.
Counter ripples from an all “1” state
to an all “0” stage.
0
1
0
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6
MC14521B
LOGIC DIAGRAM
V
5
RESET
2
DD
9
STAGES
1
2
8
3 THRU 7
IN 1
6
IN 2
4
OUT 2
7
OUT 1
3
V
SS
STAGES
11 THRU 15
9
10
16
17
18
19
20
21
22
23
24
V
V
= PIN 16
= PIN 8
10
Q18
11
Q19
12
Q20
13
Q21
14
Q22
15
Q23
1
Q24
DD
SS
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7
MC14521B
PACKAGE DIMENSIONS
PDIP−16
CASE 648−08
ISSUE T
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
16
1
9
8
B
S
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
0.740 0.770 18.80 19.55
MILLIMETERS
F
C
L
MIN MAX
A
B
C
D
F
0.250 0.270
0.145 0.175
0.015 0.021
6.35
3.69
0.39
1.02
6.85
4.44
0.53
1.77
SEATING
PLANE
−T−
0.040
0.70
G
H
J
K
L
0.100 BSC
2.54 BSC
1.27 BSC
K
M
H
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
J
0.21
0.38
3.30
7.74
10
G
2.80
7.50
0
D 16 PL
M
M
0.25 (0.010)
T A
M
S
0
10
_
_
_
_
0.020 0.040
0.51
1.01
SOIC−16
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
G
DIM MIN
MAX
10.00
4.00
1.75
0.49
1.25
MIN
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
0.386
0.150
0.054
0.014
0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
C
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
−T−
SEATING
PLANE
K
M
P
R
J
_
_
_
_
M
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
D
16 PL
M
S
S
0.25 (0.010)
T B
A
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8
MC14521B
PACKAGE DIMENSIONS
SOEIAJ−16
CASE 966−01
ISSUE A
NOTES:
ꢀꢁ1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
L
16
9
E
ꢀꢁ2. CONTROLLING DIMENSION: MILLIMETER.
ꢀꢁ3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
Q
1
H
E
E
M
_
ꢀꢁ4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
1
8
L
ꢀꢁ5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
DETAIL P
Z
D
VIEW P
e
A
c
MILLIMETERS
INCHES
MIN MAX
−−− 0.081
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
A
−−−
0.05
0.35
0.10
9.90
5.10
A
A
1
0.002
0.008
0.020
0.011
0.413
0.215
1
b
0.13 (0.005)
b
c
0.014
0.007
0.390
0.201
0.10 (0.004)
M
D
E
e
1.27 BSC
0.050 BSC
H
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
E
L
L
E
0
10
10
0.035
M
Q
0
0.028
_
_
_
_
0.70
−−−
0.90
0.78
1
Z
−−− 0.031
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