FDMD8240LET40 [ONSEMI]
双 N 沟道,PowerTrench® MOSFET,40V,103A,2.6mΩ;型号: | FDMD8240LET40 |
厂家: | ONSEMI |
描述: | 双 N 沟道,PowerTrench® MOSFET,40V,103A,2.6mΩ |
文件: | 总8页 (文件大小:349K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – Dual, N-Channel
POWERTRENCH)
PQFN12 3.3X5, 0.65P
CASE 483BN
40 V, 103 A, 2.6 mW
FDMD8240LET40
Description
This Device Includes Two 40V N−Channel MOSFETs in a Dual
Power (3.3 mm x 5 mm) package. HS source and LS Drain are
internally connected for half/full bridge, low source inductance
1
2
3
4
12
11
10
9
G1
D1
D1
D1
G1R
D2/S1
package, low R
/Qg FOM silicon.
G2
S2
S2
D2/S1
D2/S1
DS(on)
8
5
6
Features
7
D2/S1
• Extended T Rating to 175°C
J
• Max R
• Max R
= 2.6 m ꢀ at V = 10 V, I = 23 A
GS D
DS(on)
= 3.95 m ꢀ at V = 4.5 V, I = 19 A
DS(on)
GS
D
MARKING DIAGRAM
• Ideal for Flexible Layout in Primary Side of Bridge Topology
• 100% UIL Tested
Y$ZYWWKK
FDMD
8240LET
• Kelvin High Side MOSFET Drive Pin−out Capability
• These Device is Pb−Free, Halide Free, and is RoHS Compliant
$Y
Z
= onsemi Logo
Typical Applications
= Assembly Plant Code
= Date Code (Year & Week)
= Lot Traceability Code
= Specific Device Code
• Synchronous Buck : Primary Switch of Half / Full Bridge Converter
for Telecom
• Motor Bridge : Primary Switch of Half / Full bridge Converter for
BLDC Motor
YWW
KK
FDMD8240LET
ORDERING INFORMATION
• MV POL : Synchronous Buck Switch
†
Device
Shipping
Package
MOSFET MAXIMUM RATINGS T = 25°C unless otherwise noted
FDMD8240LET40
PQFN12
3000 /
A
(Pb−Free)
Tape & Reel
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Value
40
Unit
V
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
V
DS
V
GS
20
V
I
D
A
− Continuous T = 25°C (Note 5)
103
73
24
489
C
− Continuous T = 100°C (Note 5)
C
− Continuous T = 25°C (Note 1 a)
A
− Pulsed (Note 4)
E
mJ
W
Single Pulse Avalanche Energy (Note 3)
216
50
AS
P
Power Dissipation T = 25°C
D
C
Power Dissipation T = 25°C (Note 1 a)
2.5
A
T , T
Operating and Storage Junction
Temperature Range
−55 to +175
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
May, 2023 − Rev 2
FDMD8240LET40/D
FDMD8240LET40
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
3.0
Unit
°C/W
°C/W
R
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient (Note 1 a)
θ
JC
JA
R
60
θ
ELECTRICAL CHARACTERISTICS T = 25°C unless otherwise noted
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Off Characteristics
BV
Drain to Source Breakdown Voltage
I
I
= 250 ꢁ A, V = 0 V
40
−
−
−
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= 250 ꢁ A, Referenced to 25°C
−
23
mV/°C
ꢂ BVDSS
ꢂ TJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 32 V, V = 0 V
−
−
−
−
1
ꢁ
A
DSS
DS
GS
I
=
20 V, V = 0 V
100
nA
GSS
GS
DS
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V , I = 250 ꢁ A
1.0
2.0
3.0
V
DS D
Gate to Source Threshold Voltage
Temperature Coefficient
I = 250 ꢁA, Referenced to 25°C
D
−
−6
−
mV/°C
ꢂ VGS(th)
ꢂ TJ
R
Static Drain−Source On−Resistance
V
GS
V
GS
V
GS
= 10 V, I = 23 A
−
−
−
2.0
3.2
3.3
2.6
3.95
4.3
mꢀ
DS(on)
D
= 4.5 V, I = 19 A,
D
= 10 V, I = 23 A, T = 150°C
D
J
g
FS
Forward Transconductance
V
DD
= 5 V, I = 23 A
−
107
−
S
D
Dynamic Characteristics
C
Input Capacitance
V
DS
= 20 V, V = 0 V, f = 1 MHz
−
−
3020
876
33
4230
1230
52
pF
pF
pF
ꢀ
iss
GS
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
0.1
2.8
6
g
Switching Characteristics
t
Turn−On Delay Time
Rise Time
V
V
= 20 V, I = 23 A,
−
−
−
−
−
12
8
22
16
58
18
56
ns
ns
ns
ns
nC
d(on)
DD
GS
D
= 10 V, R
= 6 Ω
GEN
t
r
t
Turn−Off Delay Time
Fall Time
36
9
d(off)
t
f
Q
Total Gate Charge
V
GS
V
DD
= 0 V, to 10 V,
40
g(TOT)
= 20 V, I = 23 A
D
Total Gate Charge
V
GS
V
DD
= 0 V, to 5 V,
−
21
30
nC
= 20 V, I = 23 A
D
Q
Q
Gate−Source Charge
V
DD
= 20 V, I = 23 A
−
−
9
5
−
−
nC
nC
gs
D
Gate to Drain “Miller” Charge
gd
Drain−Source Diode Characteristics
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = 23 A (Note 2)
−
−
−
−
0.8
0.7
41
1.3
1.2
65
V
V
SD
GS
S
= 0 V, I = 1.6 A (Note 2)
GS
S
t
Reverse Recovery Time
I = 23 A, di/dt = 100 A/ꢁ s
F
ns
nC
rr
Q
Reverse Recovery Charge
21
32
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
FDMD8240LET40
NOTES:
1. R
2
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is guaranteed
JC
ꢃ
ꢃ
JA
by design while R
is determined by the user’s board design.
ꢃ
CA
b. 130 °C/W when mounted on
a minimum pad of 2 oz copper
a. 60 °C/W when mounted on
2
a 1 in pad of 2 oz copper
2. Pulse Test: Pulse Width ≤ 300 ꢁ s, Duty Cycle ≤ 2.0%
3. E of 216 mJ is based on starting T = 25°C, L = 3 mH, I = 12 A, V = 40 V, V =10 V. 100% tested at L = 0.1 mH, I = 37 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Figure 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &
electro−mechanical application board design.
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3
FDMD8240LET40
TYPICAL CHARACTERISTICS T = 25°C UNLESS OTHERWISE NOTED
J
6
150
120
PULSE DURATION = 80 ꢁ s
DUTY CYCLE = 0.5% MAX
V
= 10 V
GS
V
= 6 V
GS
V
GS
= 4 V
V
GS
= 3.5 V
V
GS
= 4.5 V
4
2
0
V
= 4 V
90
60
30
GS
V
GS
= 4.5 V
V
= 3.5 V
GS
V
GS
= 6 V
PULSE DURATION = 80 ꢁ s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
0
120
150
0.0
0.3
0.6
0.9
1.2
1.5
0
30
60
90
I , DRAIN CURRENT (A)
D
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 2. Normalized On−Resistance vs.
Figure 1. On−Region Characteristics
Drain Current and Gate Voltage
15
10
5
1.9
1.8
1.7
PULSE DURATION = 80 ꢁ s
DUTY CYCLE = 0.5% MAX
I
V
= 23 A
= 10 V
D
GS
I
D
= 23 A
1.6
1.5
1.4
1.3
1.2
1.1
T = 150°C
J
1.0
0.9
0.8
0.7
T = 25°C
J
0
7
2
3
4
5
6
8
9
10
100 125 150 175
−75 −50 −25
0
25 50 75
V
GS
, GATE TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (5C)
J
Figure 3. Normalized On Resistance
vs. Junction Temperature
Figure 4. On Resistance vs. Gate to
Source Voltage
200
100
150
120
90
PULSE DURATION = 80 ꢁ s
DUTY CYCLE = 0.5% MAX
10
1
V
DS
= 5 V
V
GS
= 0 V
T = 25°C
J
T = 175°C
J
60
0.1
0.01
T = 25°C
J
T = 175°C
J
30
0
T = −55°C
J
T = −55°C
J
0.001
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs.
Source Current
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4
FDMD8240LET40
TYPICAL CHARACTERISTICS (CONTINUED) T = 25°C UNLESS OTHERWISE NOTED
J
10000
1000
10
8
I
D
= 23 A
C
ISS
C
OSS
6
V
= 15 V
DD
V
= 20 V
100
10
1
DD
4
V
= 25 V
C
DD
RSS
f = 1 MHz
2
V
GS
= 0 V
0
0.1
1
10
40
0
10
20
30
40
50
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain to Source Voltage
100
10
1
110
88
66
44
22
0
V
GS
= 10 V
T = 25°C
J
V
GS
= 4.5 V
T = 150°C
J
T = 100°C
J
R
= 3.0 °C/W
ꢃ
JC
0.001
0.01
0.1
1
10
100
25
50
75
100
125
150
175
t , TIME IN AVALANCHE (ms)
AV
T , CASE TEMPERATURE (5C)
C
Figure 10. Maximum ContinuousDrain
Current vs. Case Temperature
Figure 9. Unclamped Inductive Switching
Capability
10000
1000
SINGLE PULSE
R
= 3.0°C/W
= 25°C
ꢃ
JC
10 ꢁ s
T
C
100
1000
100
10
1
THIS AREA IS
100 ꢁ s
R
LIMITEDBY DS(on)
SINGLE PULSE
1 ms
10 ms
100 ms/
DC
T
R
J = MAX RATED
= 3.0°C/W
= 25°C
CURVE BENT TO
MEASURED DATA
ꢃ
JC
T
C
10
0.1
−5
−4
−3
−2
−1
10
100
10
10
10
10
10
0.1
1
1
V
DS
, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (s)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power Dissipation
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5
FDMD8240LET40
TYPICAL CHARACTERISTICS (CONTINUED) T = 25°C UNLESS OTHERWISE NOTED
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.1
0.01
0.05
0.02
0.01
t
1
t
2
NOTES:
Z
(t) = r(t) x R
= 3.0°C/W
ꢃ
ꢃ
JC
JC
Single Pulse
R
ꢃ
JC
Peak T = P
Z
ꢃ
(t) + T
JC C
J
DM X
Duty Cycle, D = t / t
1
2
0.001
−5
−4
−3
−2
−1
10
10
10
10
10
1
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is registered trademark and SUPERSOT is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN12 3.3X5, 0.65P
CASE 483BN
ISSUE A
DATE 26 AUG 2021
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13670G
PQFN12 3.3X5, 0.65P
PAGE 1 OF 1
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