FDBL86210-F085 [ONSEMI]
150 V、169 A、5 mΩ、TO-LLN 沟道 PowerTrench®;
| 型号： | FDBL86210-F085 |
| 厂家： | 
ONSEMI |
| 描述： | 150 V、169 A、5 mΩ、TO-LLN 沟道 PowerTrench® |
| 文件： | 总7页 (文件大小：582K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET – N-Channel,
POWERTRENCH)
150 V, 169 A, 6.3 mW
FDBL86210-F085
Features
www.onsemi.com
• Typical r
= 5 mꢀ at V = 10 V, I = 80 A
GS D
DS(on)
• Typical Q
= 70 nC at V = 10 V, I = 80 A
GS D
g(tot)
D
• UIS Capability
• AEC−Q101 Qualified and PPAP Capable
• This Device is Pb−Free and are RoHS Compliant
Applications
G
• Automotive Engine Control
• PowerTrain Management
• Solenoid and Motor Drivers
• Integrated Starter/Alternator
• Primary Switch for 12 V Systems
S
N−Channel
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current − Continuous
Ratings
150
Unit
V
V
DSS
V
GS
20
V
H−PSOF8L
CASE 100CU
I
D
169
A
(V = 10), T = 25°C (Note 1)
GS
C
Pulsed Drain Current, T = 25°C
See Figure 4
502
C
MARKING DIAGRAM
E
AS
Single Pulse Avalanche Energy
(Note 2)
mJ
P
Power Dissipation
500
3.3
W
D
$Y&Z&3&K
FDBL
86210
Derate Above 25°C
W/°C
°C
T , T
Operating and Storage Temperature
Thermal Resistance Junction to Case
−55 to +175
0.3
J
STG
R
°C/W
°C/W
ꢁ
JC
JA
R
Maximum Thermal Resistance
Junction to Ambient (Note 3)
43
ꢁ
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by silicon.
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
2. Starting T = 25°C, L = 0.24 mH, I = 64 A, V = 100 V during inductor
J
AS
DD
FDBL86210
= Specific Device Code
charging and V = 0 V during time in avalanche.
DD
3. R
is the sum of the junction−to−case and case−to−ambient thermal
ꢁ
JA
resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
is guaranteed by design, while R
ꢁ
JA
ORDERING INFORMATION
ꢁ
JC
is determined by the user’s board design. The maximum rating presented
{
2
Device
Top Mark
Package Shipping
here is based on mounting on a 1 in pad of 2oz copper.
FDBL86210 FDBL86210 H−PSOF8L 2000 Units/
−F085
Tape&Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
June, 2020 − Rev. 4
FDBL86210−F085/D
FDBL86210−F085
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
I
Drain to Source Breakdown Voltage
Drain to Source Leakage Current
I
= 250 ꢂ A, V = 0 V
150
−
−
−
−
−
−
1
V
DSS
D
GS
V
V
= 150 V,
= 0 V
T = 25°C
J
ꢂ A
mA
nA
DSS
DS
GS
T = 175°C (Note 4)
J
−
1
I
Gate to Source Leakage Current
V
=
20 V
−
100
GSS
GS
ON CHARACTERISTICS
V
r
Gate to Source Threshold Voltage
Drain to Source On Resistance
V
I
= V , I = 250 ꢂ A
2.0
−
2.8
5
4.0
6.3
V
GS(th)
GS
DS
D
= 80 A,
= 10 V
T = 25°C
J
mꢀ
mꢀ
DS(on)
D
V
GS
T = 175°C (Note 4)
−
14
17.5
J
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 75 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
5805
536
16
−
−
pF
pF
pF
ꢀ
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
−
rss
R
f = 1 MHz
2.2
−
g
Q
Total Gate Charge at 10 V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
GS
V
GS
V
DD
= 0 to 10 V
= 0 to 2 V
V = 75 V,
DD
D
70
90
13
−
nC
nC
nC
nC
g(ToT)
I
= 80 A
Q
10.5
32.5
10
g(th)
Q
= 75 V, I = 80 A
D
gs
Q
−
gd
SWITCHING CHARACTERISTICS
t
Turn−On Time
Turn−On Delay Time
Rise Time
V
DD
V
GS
= 75 V, I = 80 A,
−
−
−
−
−
−
−
80
−
ns
ns
ns
ns
ns
ns
on
D
= 10 V, R
= 6 ꢀ
GEN
t
t
39
30
70
23
−
d(on)
t
r
−
Turn−Off Delay Time
Fall Time
−
d(off)
t
f
−
t
Turn−Off Time
130
off
DRAIN−SOURCE DIODE CHARACTERISTIC
V
Source to Drain Diode Voltage
I
I
= 80 A, V = 0 V
−
−
−
−
−
1.25
1.2
V
V
SD
SD
GS
= 40 A, V = 0 V
−
SD
GS
T
Reverse Recovery Time
I = 80 A, dI /dt = 100 A/ꢂ s,
F
V
108
323
125
467
ns
nC
rr
SD
= 120 V
DD
Q
Reverse Recovery Charge
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
www.onsemi.com
2
FDBL86210−F085
TYPICAL CHARACTERISTICS
1.2
1.0
0.8
0.6
0.4
0.2
0.0
200
160
120
80
40
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
200
T , Case Temperature [°C]
C
T , Case Temperature [°C]
C
Figure 1. Normalized Power Dissipation
vs. Case Temperature
Figure 2. Maximum Continuous Drain Current
vs. Case Temperature
2
1
DUTY CYCLE − DESCENDING ORDER
D = 0.50
0.20
0.10
0.05
0.02
P
DM
0.01
0.1
t
1
t
2
NOTES:
Duty factor: D = t / t
SINGLE PULSE
1
2
Peak T = P
× Z
ꢁ
× R
+ T
JA C
ꢁ
J
DM
JA
0.01
−5
−4
−3
−2
−1
0
1
10
10
10
10
10
10
10
t, Rectangular Pulse Duration (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
1000
100
T 25°C
C =
For temperatures
above 25°C derate peak
current as follows:
V
GS
= 10 V
175 * T
C
Ǹ
I + I ƪ ƫ
2
150
SINGLE PULSE
10
−5
−4
−3
−2
−1
0
10
10
10
10
10
10
10
t, Rectangular Pulse Duration (s)
Figure 4. Peak Current Capability
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3
FDBL86210−F085
TYPICAL CHARACTERISTICS (continued)
1000
1000
100
10
If R = 0
t
= (L)(I ) / (1.3 × Rated BV V
)
AV
AS
DSS − DD
If R ≠ 0
= (L/R)ln[(I × R) / (1.3 × Rated BV
t
− V ) + 1]
DD
AV
AS
DSS
100
10
1
100 ꢂs
Operation in this
area may be
Starting T = 25°C
J
limited by r
DS(on)
1
1 ms
Starting T = 150°C
J
SINGLE PULSE
T
T
= max rated
= 25°C
J
10 ms
100 ms
C
0.1
1
10
100
0.001 0.01
0.1
1
10
100
1000 10000
V
DS
, Drain to Source Voltage [V]
t , Time in Avalanche [ms]
AV
NOTE: Refer to ON Semiconductor Application Notes AN7514 and AN7515.
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching Capability
200
400
Pulse duration = 80 ꢂs
V
GS
= 0 V
Duty cycle = 0.5% MAX
100
V
= 5 V
DD
160
120
80
T
J
= 175°C
T
J
= 175°C
10
1
T
J
= 25°C
T
= 25°C
T = −55°C
J
J
40
0
0.1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
2
3
4
5
6
7
8
V
GS
, Gate to Source Voltage [V]
V
SD
, Body Diode Forward Voltage [V]
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
300
300
V
GS
15 V Top
10 V
8 V
7 V
6 V
V
250
200
150
100
50
GS
250
200
150
15 V Top
10 V
8 V
7 V
6 V
5.5 V
5 V Bottom
5.5 V
5 V Bottom
5 V
100
50
5 V
80 ꢂs Pulse Width
Tj = 25°C
80 ꢂs Pulse Width
Tj = 175°C
0
0
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, Drain to Source Voltage [V]
V
DS
, Drain to Source Voltage [V]
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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4
FDBL86210−F085
TYPICAL CHARACTERISTICS (continued)
50
40
3.0
I
D
= 80 A
Pulse duration = 80 ꢂs
Duty cycle = 0.5% MAX
Pulse duration = 80 ꢂs
Duty cycle = 0.5% MAX
2.5
2.0
1.5
1.0
30
20
10
0
T
= 175°C
J
0.5
I
= 80 A
D
V
= 10 V
T
J
= 25°C
GS
0.0
2
4
6
8
10
−80
−40
0
40
80
120
160
200
V
GS
, Gate to Source Voltage [V]
T , Junction Temperature [°C]
J
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction Temperature
1.5
1.2
0.9
0.6
0.3
0.0
1.10
I
D
= 1 mA
V
D
= V
DS
GS
I
= 250 ꢂA
1.05
1.00
0.95
0.90
−80
−40
0
40
80
120
160
200
−80
−40
0
40
80
120
160
200
T , Junction Temperature [°C]
J
T , Junction Temperature [°C]
J
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10
10000
I
D
= 80 A
C
iss
V
DD
= 75 V
8
1000
100
V
DD
= 60 V
V
DD
= 90 V
6
4
C
oss
10
1
C
rss
2
0
f = 1 MHz
GS
V
= 0 V
0.1
1
10
100 200
0
20
40
60
80
Q , Gate Charge [nC]
g
V
DS
, Drain to Source Voltage [V]
Figure 15. Capacitance vs. Drain to Source Voltage
Figure 16. Gate Charge vs. Gate to Source Voltage
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
www.onsemi.com
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
H−PSOF8L 11.68x9.80
CASE 100CU
ISSUE C
DATE 22 MAY 2023
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXXX
XXXXXXXX
A
Y
= Assembly Location
= Year
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
WW = Work Week
ZZ
XXXX = Specific Device Code
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13813G
H−PSOF8L 11.68x9.80
PAGE 1 OF 1
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