FDBL9401-F085T6 [ONSEMI]
Power MOSFET, Single N-Channel, 40 V, 0.67 mΩ, 240 A;
| 型号： | FDBL9401-F085T6 |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET, Single N-Channel, 40 V, 0.67 mΩ, 240 A |
| 文件： | 总7页 (文件大小：444K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET - Power, Single
N-Channel, TOLL
40 V, 0.67 mW, 240 A
FDBL9401-F085T6
Features
• Low R
to Minimize Conduction Losses
• Low Q and Capacitance to Minimize Driver Losses
DS(on)
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G
• AEC−Q101 Qualified and PPAP Capable
• Small Footprint (TOLL) for Compact Design
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
40 V
0.67 mW @ 10 V
240 A
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
40
Unit
V
D (9)
V
DSS
Gate−to−Source Voltage
V
+20/−16
240
V
GS
Continuous Drain
Current R
T
= 25°C
= 100°C
= 25°C
I
A
C
D
q
JC
G (1)
T
C
240
(Notes 1, 3)
Steady
State
Power Dissipation
T
C
P
180.7
90.3
58.4
41.3
4.3
W
A
D
R
(Note 1)
q
JC
T
C
= 100°C
S (2 − 8)
Continuous Drain
Current R
T = 25°C
A
I
D
N−CHANNEL MOSFET
q
JA
T = 100°C
A
(Notes 1, 2, 3)
Steady
State
Power Dissipation
T = 25°C
A
P
W
D
R
(Notes 1, 2)
q
JA
T = 100°C
A
2.1
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
2758
A
A
p
Operating Junction and Storage Temperature
Range
T , T
−55 to
+175
°C
J
stg
Source Current (Body Diode)
I
138
A
S
H−PSOF8L
CASE 100CU
Single Pulse Drain−to−Source Avalanche
E
AS
1012
mJ
Energy (I
= 45 A, L = 1 mH)
L(pk)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
ORDERING INFORMATION
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
†
Device
Package
Shipping
FDBL9401−F085T6 H−PSOF8L 2000 / Tape &
(Pb−Free) Reel
THERMAL RESISTANCE MAXIMUM RATINGS
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Parameter
Symbol
Value
0.83
35
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
R
q
JA
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted. Current is limited by bondwire configuration.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
May, 2021 − Rev. 2
FDBL9401−F085T6/D
FDBL9401−F085T6
Table 1. ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Conditions
Min
Typ
Max
Units
Drain−to−Source Breakdown Voltage
V
I
D
= 250 mA, V = 0 V
40
V
(BR)DSS
GS
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/T
J
23.4
mV/°C
(BR)DSS
V
DS
= 40 V, V = 0 V
T = 25°C
1
Zero Gate Voltage Drain Current
I
mA
mA
nA
GS
J
DSS
T = 175°C
J
1
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
DS
= 0 V, V = +20/−16 V
100
GSS
GS
V
GS(th)
V
GS
= V , I = 290 mA
2
2.8
−6.5
0.6
4
V
DS
D
Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
mV/°C
mW
GS(th)
J
R
V
GS
= 10 V, I = 50 A
0.67
DS(on)
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
V
GS
= 0 V, V = 25 V, f = 100 KHz
10000
5100
177
2.1
pF
pF
pF
W
iss
DS
Output Capacitance
C
oss
Reverse Transfer Capacitance
Gate Resistance
C
rss
R
V
GS
= 0.5 V, f = 1 MHz
g
Total Gate Charge
Q
V
GS
= 10 V, V = 20 V, I = 50 A
148
18
nC
nC
nC
nC
V
G(tot)
DS
D
Threshold Gate Charge
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
Plateau Voltage
Q
V
GS
= 0 to 2 V
G(th)
Q
V
DD
= 32 V, I = 50 A
42
gs
gd
D
Q
30
V
4.5
GP
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
V
= 10 V, V = 20 V,
37
76
ns
ns
ns
ns
d(on)
GS
D
DD
I
= 50 A, R
= 6 W
GEN
Turn−On Rise Time
t
r
Turn−Off Delay Time
t
133
65
d(off)
Turn−Off Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Source−to−Drain Diode Voltage
Reverse Recovery Time
Charge Time
I
= 50 A, V = 0 V
0.77
97
1.2
V
V
SD
GS
SD
t
ns
ns
ns
nC
V
= 0 V, dI /d = 100 A/ms,
S t
rr
GS
I
S
= 50 A
t
37
a
b
Discharge Time
t
60
Reverse Recovery Charge
Q
218
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
5. Switching characteristics are independent of operating junction temperatures
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2
FDBL9401−F085T6
TYPICAL CHARACTERISTICS
1200
900
1200
V
= 10 V
V
= 8.0 V
GS
GS
V
DS
= 5 V
T = 25°C
J
V
GS
= 9.0 V
V
= 7.0 V
GS
900
600
600
V
V
= 6.0 V
= 5.0 V
GS
300
0
300
0
GS
T = 175°C
J
T = −55°C
J
0
0.5
1.0
1.5
2.0
2.5
3.0
2
3
4
5
6
7
8
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
5
4
3
2
1.3
1.1
0.9
0.7
I
D
= 50 A
T = 25°C
J
V
= 6 V
GS
V
GS
= 10 V
T = 175°C
J
1
0
0.5
0.3
T = 25°C
J
4
5
6
7
8
9
10
10 20
30
40
50
60
70
80
90 100
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
1.8
1.7
1000
100
V
I
= 10 V
= 50 A
GS
T = 175°C
J
D
1.6
1.5
1.4
1.3
1.2
1.1
1.0
T = 150°C
J
T = 125°C
J
10
1
T = 85°C
J
0.9
0.8
0.7
0.1
−75 −50 −25
0
25 50 75 100 125 150 175 200
5
10
15
20
25
30
35
40
T , JUNCTION TEMPERATURE (°C)
J
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
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FDBL9401−F085T6
TYPICAL CHARACTERISTICS
10
100K
10K
1K
Q
G(tot)
8
6
4
C
ISS
C
OSS
RSS
Q
Q
GD
GS
C
100
10
T = 25°C
D
J
V
= 0 V
2
0
GS
I
= 50 A
f = 1 MHz
T = 25°C
V
DS
= 32 V
J
0
30
60
90
120
150
0
5
10
15
20
25
30
35
40
Q , TOTAL GATE CHARGE (nC)
G
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
1000
300
30
3
t
V
V
= 10 V
= 20 V
= 50 A
V
GS
= 0 V
d(off)
GS
DS
t
f
I
D
t
r
t
d(on)
100
10
0.3
T = 175°C
J
0.03
T = 25°C
T = −55°C
J
J
0.003
1
10
R , GATE RESISTANCE (W)
100
0
0.2
0.4
0.6
0.8
1.0
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
G
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
300
100
5000
1000
10 ms
T
= 25°C
J(initial)
100 ms
100
T
C
= 25°C
Single Pulse
≤ 10 V
T
= 150°C
J(initial)
V
GS
10
1
R
Limit
DS(on)
1 ms
Thermal Limit
Package Limit
10 ms
100 ms
10
10
0.1
1
100
0.01
0.1
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
t , TIME IN AVALANCHE (mS)
AV
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
FDBL9401−F085T6
TYPICAL CHARACTERISTICS
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.1
0.01
0.01
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Transient Thermal Impedance
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
H−PSOF8L 11.68x9.80
CASE 100CU
ISSUE C
DATE 22 MAY 2023
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXXX
XXXXXXXX
A
Y
= Assembly Location
= Year
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
WW = Work Week
ZZ
XXXX = Specific Device Code
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13813G
H−PSOF8L 11.68x9.80
PAGE 1 OF 1
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