ESD7382MUT5G [ONSEMI]
ESD Protection Diodes;
| 型号： | ESD7382MUT5G |
| 厂家： | 
ONSEMI |
| 描述： | ESD Protection Diodes 局域网 测试 二极管 |
| 文件： | 总6页 (文件大小：108K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ESD7382MUT5G
ESD Protection Diodes
Micro−Packaged Diodes for ESD Protection
The ESD7382 is designed to protect voltage sensitive components
that require ultra−low capacitance from ESD and transient voltage
events. Excellent clamping capability, low capacitance, low leakage,
and fast response time, make these parts ideal for ESD protection on
designs where board space is at a premium. Because of its low
capacitance, it is suited for use in high frequency designs such as
USB 2.0 high speed and antenna line applications.
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1
2
Cathode
Anode
Features
• Ultra−Low Capacitance: 0.37 pF
• Low Clamping Voltage
MARKING
DIAGRAM
PIN 1
• Small Body Outline Dimensions: 0.60 mm x 0.30 mm
• Low Body Height: 0.3 mm
• Stand−off Voltage: 5.0 V
X3DFN2
CASE 152AF
M
• Low Leakage
• Insertion Loss: 0.030 dBm
• Response Time is < 1 ns
2
= Specific Device Code
(Rotated 270°)
M
= Date Code
• Low Dynamic Resistance < 1 W
• IEC61000−4−2 Level 4 ESD Protection
X2DFN2
CASE 714AB
(In Development)
XX M
G
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
XX = Specific Device Code
Typical Applications
M
= Date Code
• RF Signal ESD Protection
• RF Switching, PA, and Antenna ESD Protection
• Near Field Communications
G
= Pb−Free Package
ORDERING INFORMATION
MAXIMUM RATINGS
†
Device
Package
Shipping
Rating
IEC 61000−4−2 (ESD)
Symbol
Value
Unit
ESD7382MUT5G
X3DFN2
(Pb−Free)
10,000 / Tape &
Reel
Contact
Air
20
20
kV
ESD7382N2T5G
(In Development)
X2DFN2
(Pb−Free)
10,000 / Tape &
Reel
Total Power Dissipation on FR−5 Board
°P °
250
mW
D
(Note 1) @ T = 25°C
A
Thermal Resistance, Junction−to−Ambient
R
400
−40 to +125
260
°C/W
°C
q
JA
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Junction and Storage Temperature Range T , T
J
stg
Lead Solder Temperature − Maximum
(10 Second Duration)
T
L
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
See Application Note AND8308/D for further description of survivability specs.
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
January, 2017 − Rev. 2
ESD7382/D
ESD7382MUT5G
ELECTRICAL CHARACTERISTICS
I
(T = 25°C unless otherwise noted)
A
I
F
Symbol
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
I
PP
V
C
PP
V
C
V V
BR RWM
V
Working Peak Reverse Voltage
RWM
V
I
V
F
R
T
I
R
Maximum Reverse Leakage Current @ V
I
RWM
V
Breakdown Voltage @ I
Test Current
BR
T
I
T
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
I
PP
Uni−Directional TVS
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
A
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
V
Reverse Working Voltage
Breakdown Voltage (Note 2)
Reverse Leakage Current
Clamping Voltage (Note 3)
Clamping Voltage (Note 3)
ESD Clamping Voltage
Junction Capacitance
V
RWM
5.0
V
BR
I = 1 mA
5.2
V
T
I
R
V
RWM
= 5.0 V
1.0
8.0
10
mA
V
V
I
PP
I
PP
= 1 A
C
C
C
V
V
= 3 A
V
Per IEC61000−4−2
See Figures 1 and 2
C
V
R
V
R
= 0 V, f = 1 Mhz
= 0 V, f < 1 GHz
0.37
0.25
0.55
0.55
pF
J
Dynamic Resistance
Insertion Loss
R
TLP Pulse
0.32
W
DYN
f = 1 Mhz
f = 8.5 GHz
0.030
0.573
dB
2. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.
3. Non−repetitive current pulse at T = 25°C, per IEC61000−4−5 waveform.
A
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
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2
ESD7382MUT5G
1.E−02
1.E−03
1.E−04
1.E−05
1.E−06
1.E−07
1.E−08
1.E−09
1.E−10
1.E−11
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
−1
0
1
2
3
4
5
6
7
8
9
0
0.5
1
1.5
2
2.5
3
3.5
4
V1 (V)
VBias (V)
Figure 3. IV Characteristics
Figure 4. CV Characteristics
1
0
0.6
0.5
0.4
0.3
0.2
0.1
0.0
−1
−2
−3
−4
−5
−6
−7
−8
−9
3.3 V
0 V
−10
1.E+06
1.E+07
1.E+08
1.E+09
1.E+10
0.E+00 5.E+08 1.E+09 2.E+09 2.E+09 3.E+09 3.E+09
FREQUENCY (Hz)
FREQUENCY
Figure 5. RF Insertion Loss
Figure 6. Capacitance over Frequency
35
30
25
20
15
10
5
−35
−30
−25
−20
−15
−10
−5
0
0
0
2
4
6
8
10
12
14
16 18
0
−2
−4
−6
−8
−10
−12
−14
VOLTAGE (V)
VOLTAGE (V)
Figure 7. Positive TLP I−V Curve
Figure 8. Negative TLP I−V Curve
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3
ESD7382MUT5G
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
I
peak
First Peak
Current
(A)
100%
90%
Test Volt-
age (kV)
Current at
30 ns (A)
Current at
60 ns (A)
Level
1
2
3
4
2
4
6
8
7.5
15
4
8
2
4
6
8
I @ 30 ns
22.5
30
12
16
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
Figure 9. IEC61000−4−2 Spec
Oscilloscope
ESD Gun
TVS
50 W
Cable
50 W
Figure 10. Diagram of ESD Test Setup
ESD Voltage Clamping
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
100
t
r
PEAK VALUE I
@ 8 ms
RSM
90
80
70
60
50
40
30
20
PULSE WIDTH (t ) IS DEFINED
P
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I /2 @ 20 ms
RSM
t
P
10
0
0
20
40
t, TIME (ms)
60
80
Figure 11. 8 X 20 ms Pulse Waveform
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4
ESD7382MUT5G
PACKAGE DIMENSIONS
X3DFN2, 0.62x0.32, 0.355P, (0201)
CASE 152AF
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
A B
D
2. CONTROLLING DIMENSION: MILLIMETERS.
PIN 1
INDICATOR
(OPTIONAL)
MILLIMETERS
DIM MIN
MAX
0.33
0.05
0.28
0.66
0.36
A
A1
b
D
E
0.25
−−−
E
TOP VIEW
0.22
0.58
0.28
e
0.355 BSC
0.23
L2 0.17
0.05
0.05
C
C
A
2X
RECOMMENDED
MOUNTING FOOTPRINT*
A1
SIDE VIEW
SEATING
PLANE
C
2X
0.30
0.74
e
1
2X b
1
2
2X
0.31
M
0.05
C A B
2X L2
DIMENSIONS: MILLIMETERS
M
0.05
C A B
BOTTOM VIEW
See Application Note AND8398/D for more mounting details
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
ESD7382MUT5G
PACKAGE DIMENSIONS
X2DFN2 1.0x0.6, 0.65P
CASE 714AB
ISSUE O
NOTES:
0.10
C
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. EXPOSED COPPER ALLOWED AS SHOWN.
A B
E
D
PIN 1
INDICATOR
MILLIMETERS
DIM MIN
MAX
0.40
0.05
0.55
A
A1
b
0.34
−−−
0.45
0.05
C
TOP VIEW
D
E
e
1.00 BSC
0.60 BSC
0.65 BSC
NOTE 3
A
0.10
0.10
C
L
0.20
0.30
C
A1
RECOMMENDED
SEATING
PLANE
C
SIDE VIEW
SOLDER FOOTPRINT*
1.20
2X
0.60
e
2X
0.47
b
e/2
M
0.05
C A B
PIN 1
1
DIMENSIONS: MILLIMETERS
2X
L
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
M
0.05
C A B
BOTTOM VIEW
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ESD7382/D
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