CS8182YDFR8 [ONSEMI]
Micropower 200 mA Low Dropout Tracking Regulator/Line Driver; 微200毫安低压差稳压器跟踪/线路驱动器
| 型号： | CS8182YDFR8 |
| 厂家： | 
ONSEMI |
| 描述： | Micropower 200 mA Low Dropout Tracking Regulator/Line Driver |
| 文件： | 总10页 (文件大小：93K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CS8182
Micropower 200 mA
Low Dropout Tracking
Regulator/Line Driver
The CS8182 is a monolithic integrated low dropout tracking
regulator designed to provide adjustable buffered output voltage that
closely tracks (±10 mV) the reference input. The output delivers up to
200 mA while being able to be configured higher, lower or equal to the
reference voltages.
http://onsemi.com
The output has been designed to operate over a wide range (2.8 V to
45 V) while still maintaining excellent DC characteristics. The
CS8182 is protected from reverse battery, short circuit and thermal
runaway conditions. The device also can withstand 45 V load dump
transients and −50 V reverse polarity input voltage transients. This
makes it suitable for use in automotive environments.
8
1
1
5
2
SO−8
D PAK−5
DPS SUFFIX
CASE 936AC
DF SUFFIX
CASE 751
The V /ENABLE lead serves two purposes. It is used to provide
REF
PIN CONNECTIONS AND
MARKING DIAGRAMS
the input voltage as a reference for the output and it also can be pulled
low to place the device in sleep mode where it nominally draws less
than 30 mA from the supply.
1
V
IN
V
OUT
GND
GND
GND
GND
Adj
Features
V
REF
/ENABLE
GND
• 200 mA Source Capability
• Output Tracks within ±10 mV Worst Case
• Low Dropout (0.35 V Typ. @ 200 mA)
• Low Quiescent Current
• Thermal Shutdown
• Short Circuit Protection
Tab
Pin 1. V
2. V
IN
OUT
CS8182
AWLYWW
3. GND
4. Adj
5. V
REF
• Wide Operating Range
• Internally Fused Leads in SO−8 Package
1
A
WL, L
YY, Y
= Assembly Location
= Wafer Lot
= Year
• For Automotive and Other Applications Requiring Site and Change
Control
WW, W = Work Week
V
IN
V
OUT
ORDERING INFORMATION*
Current Limit &
SAT Sense
†
Device
Package
Shipping
CS8182YDF8
95 Units/Rail
2500 Tape & Reel
50 Units/Rail
SO−8
SO−8
Adj
V
−
CS8182YDFR8
CS8182YDPS5
CS8182YDPSR5
2
ENABLE
D PAK 5−PIN
+
/ENABLE
2
750 Tape & Reel
REF
D PAK 5−PIN
*Consult your local sales representative for SO−8 with
exposed pads package option.
+
−
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
GND
Thermal
Shutdown
2.0 V
Figure 1. Block Diagram
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
August, 2004 − Rev. 21
CS8182/D
CS8182
PACKAGE PIN DESCRIPTION
Package Lead Number
2
SO−8
D PAK 5−PIN
Lead Symbol
Function
8
1
2
3
4
5
V
Input voltage.
Regulated output.
Ground.
IN
1
V
OUT
2, 3, 6, 7
GND
Adj
4
5
Adjust lead.
V
REF
/ENABLE
Reference voltage and ENABLE input.
MAXIMUM RATINGS
Rating
Value
−65 to 150
−15 to 45
3.4 to 45
45
Unit
°C
V
Storage Temperature
Supply Voltage Range (continuous)
Supply Voltage Range (normal, continuous)
Peak Transient Voltage (V = 14 V, Load Dump Transient = 31 V)
V
V
IN
Voltage Range (Adj, V
, V
/ENABLE)
−10 to 45
150
V
OUT REF
Maximum Junction Temperature
°C
Package Thermal Resistance, SO−8:
Junction−to−Case, R
25
110
°C/W
°C/W
q
JC
Junction−to−Ambient, R
q
JA
2
Package Thermal Resistance, D PAK, 5−Pin:
Junction−to−Case, R
4.0
10−50**
°C/W
°C/W
q
JC
Junction−to−Ambient, R
q
JA
ESD Capability (Human Body Model)
(Machine Model)
2.0
200
kV
V
Lead Temperature Soldering:
(Note 1)
Reflow: (SO−8)
(D2PAK)
240 peak
225 peak
(Note 2)
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 60 second maximum above 183°C.
2. −5°C/+0°C allowable conditions.
*Depending on thermal properties of substrate. R
= R
+ R
q
JC CA
q
q
JA
http://onsemi.com
2
CS8182
ELECTRICAL CHARACTERISTICS (V = 14 V; V
/ENABLE > 2.75 V; −40°C < T < +125°C; C
≥ 10 mF;
IN
REF
J
OUT
0.1 W < C
< 1.0 W @ 10 kHz, unless otherwise specified.)
OUT−ESR
Parameter
Regular Output
− V
Test Conditions
Min
Typ
Max
Unit
V
REF
4.5 V ≤ V ≤ 26 V, 100 mA ≤ I ≤ 200 mA, Note 3
OUT
−10
−5.0
−
−
10
5
mV
mV
OUT
IN
V
OUT
Tracking Error
V
IN
= 12 V, I
= 30 mA, V = 5.0 V, Note 3
REF
OUT
Dropout Voltage (V − V
)
I
I
I
= 100 mA
= 30 mA
= 200 mA
−
−
−
100
−
350
150
500
600
mV
mV
mV
IN
OUT
OUT
OUT
OUT
Line Regulation
Load Regulation
Adj Lead Current
Current Limit
4.5 V ≤ V ≤ 26 V, Note 3
−
−
−
−
10
10
mV
mV
mA
IN
100 mA ≤ I
≤ 200 mA, Note 3
OUT
Loop in Regulation
−
0.2
−
1.0
700
V
IN
= 14 V, V
= 5.0 V, V
= 90% of V , Note 3
REF
225
mA
REF
OUT
Quiescent Current (I − I
)
V
IN
V
IN
V
IN
= 12 V, I
= 12 V, I
= 12 V, V
= 200 mA
= 100 mA
−
−
−
15
75
30
25
150
55
mA
mA
mA
IN
OUT
OUT
OUT
/ENABLE = 0 V
REF
Reverse Current
Ripple Rejection
Thermal Shutdown
V
= 5.0 V, V = 0 V
−
0.2
−
1.5
−
mA
dB
°C
OUT
IN
f = 120 Hz, I
GBD
= 200 mA, 4.5 V ≤ V ≤ 26 V
60
OUT
IN
150
180
210
V /ENABLE
REF
Enable Voltage
−
0.80
−
2.00
0.2
2.75
1.0
V
Input Bias Current
V /ENABLE
REF
mA
3. V
connected to Adj lead.
OUT
http://onsemi.com
3
CS8182
TYPICAL CHARACTERISTICS
18
16
14
12
10
8
6
4
2
0
0
20 40 60 80 100 120 140 160 180 200
OUTPUT CURRENT (mA)
Figure 2. Quiescent Current vs. Output Current
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
100
90
80
70
60
50
40
30
20
I (V ) = 20 mA
OUT
V
/ ENABLE = 0 V
0.1
0
10
0
REF
I (V
) = 1 mA
OUT
0
5
10
15
20
25
30
35
40
45
0
5
10
15
V , INPUT VOLTAGE (V)
IN
20
25
30
35
40
45
V
, INPUT VOLTAGE (V)
IN
Figure 3. Quiescent Current vs. Input Voltage
(Operating Mode)
Figure 4. Quiescent Current vs. Input Voltage
(Sleep Mode)
20
18
16
14
12
10
8
140
120
100
80
* Graph is duplicate for V > 1.6 V.
* Graph is duplicate for V > 1.6 V.
IN
IN
**Dip (@5 V) shifts with V
voltage.
**Dip (@5 V) shifts with V
voltage.
REF
REF
V
= 0 V
IN
60
V
V
= 6 V*
IN
REF
V
V
= 6 V*
= 5 V**
IN
REF
6
= 5 V**
40
4
20
2
0
V
= 0 V
IN
0
0
5
10
FORCED V
15
VOLTAGE (V)
20
25
0
5
10
15
20
25
30
35
40
FORCED V VOLTAGE (V)
OUT
OUT
Figure 5. VOUT Reverse Current
Figure 6. VOUT Reverse Current
http://onsemi.com
4
CS8182
CIRCUIT DESCRIPTION
ENABLE Function
Output Voltage
By pulling the V /ENABLE lead below 2.0 V typically,
(see Figure 10 or Figure 11), the IC is disabled and enters a
sleep state where the device draws less than 55 mA from
The output is capable of supplying 200 mA to the load
while configured as a similar (Figure 7), lower (Figure 9), or
higher (Figure 8) voltage as the reference lead. The Adj lead
REF
supply. When the V /ENABLE lead is greater than 2.75 V,
acts as the inverting terminal of the op amp and the V
lead as the non−inverting.
REF
REF
V
OUT
tracks the V /ENABLE lead normally.
REF
The device can also be configured as a high−side driver as
displayed in Figure 12.
V
, 200 mA
OUT
V , 200 mA
OUT
Loads
C2**
10 mF
B+
V
V
IN
Loads
C2**
10 mF
B+
OUT
V
V
IN
OUT
C1*
1.0 mF
C1*
1.0 mF
GND
GND
Adj
GND
GND
GND
GND
Adj
GND
GND
R
F
V
REF
V
/
5.0 V
REF
V
/
REF
C3***
10 nF
C3***
10 nF
ENABLE
ENABLE
R
A
R
R
E
A
V
OUT
+ V
REF
V
OUT
+ V
REF
(1 )
)
Figure 8. Tracking Regulator at Higher Voltages
Figure 7. Tracking Regulator at the Same Voltage
V
, 200 mA
OUT
V , 200 mA
OUT
B+
V
V
IN
OUT
Loads
C2**
10 mF
B+
V
V
IN
OUT
C1*
C2**
10 mF
C1*
GND
GND
Adj
GND
GND
1.0 mF
GND
GND
Adj
GND
GND
1.0 mF
R
R1
R2
V
REF
V
/
REF
V
REF
V
/
REF
C3***
10 nF
ENABLE
C3***
10 nF
ENABLE
from MCU
R2
R1 ) R2
V
OUT
+ V
REF
(
)
Figure 9. Tracking Regulator at Lower Voltages
Figure 10. Tracking Regulator with ENABLE Circuit
V
IN
V
REF
(5.0 V)
6.0 V−40 V
NCV8501
200 mA
B+
V
OUT
V
IN
100 nF
GND
GND
Adj
GND
GND
5.0 V
V
V
IN
OUT
mC
C1*
10 mF
To Load
(e.g. sensor)
GND
GND
Adj
GND
GND
1.0 mF
MCU
V
REF
/
C3***
10 nF
ENABLE
I/O
V
/
REF
C3***
10 nF
ENABLE
V
+ B ) * V
SAT
OUT
Figure 11. Alternative ENABLE Circuit
Figure 12. High−Side Driver
* C1 is required if the regulator is far from the power source filter.
** C2 is required for stability.
*** C3 is recommended for EMC susceptibility.
http://onsemi.com
5
CS8182
APPLICATION NOTES
VOUT Short to Battery
Figure 14. In this case the CS8182 supply input voltage is set
at 7 V when a short to battery (14 V typical) occurs on V
which normally runs at 5 V. The current into the device
(ammeter in Figure 14) will draw additional current as
displayed in Figure 15.
OUT
The CS8182 will survive a short to battery when hooked
up the conventional way as shown in Figure 13. No damage
to the part will occur. The part also endures a short to battery
when powered by an isolated supply at a lower voltage as in
Short to battery
B+
V
70 mA
OUT
Loads
V
V
IN
OUT
+
−
Automotive Battery
typically 14 V
C1*
1.0 mF
C2**
10 mF
GND
GND
Adj
GND
GND
V
/
REF
5.0 V
+
ENABLE
C3***
10 nF
5.0 V
−
V
OUT
= V
REF
Figure 13.
Short to battery
Loads
A
B+
Automotive Battery
typically 14 V
V
OUT
70 mA
V
V
IN
OUT
+
C1*
7 V
C2**
10 mF
−
1.0 mF
GND
GND
Adj
GND
GND
V
/
REF
5.0 V
+
ENABLE
C3***
10 nF
* C1 is required if the regulator is far from the power source filter.
** C2 is required for stability.
*** C3 is recommended for EMC susceptibility.
5.0 V
−
V
OUT
= V
REF
Figure 14.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
Switched Application
The CS8182 has been designed for use in systems where
the reference voltage on the V /ENABLE pin is
continuously on. Typically, the current into the
REF
V /ENABLE pin will be less than 1.0 mA when the
REF
voltage on the V pin (usually the ignition line) has been
IN
switched out (V can be at high impedance or at ground.)
IN
Reference Figure 16.
Ignition
Switch
V
OUT
V
OUT
V
IN
V
BAT
0.2
0
C1
1.0 mF
C2
10 mF
GND
GND
Adj
GND
GND
5 6 7 8 9 10 1112131415 1617181920 212223242526
V
VOLTAGE (V)
OUT
Figure 15. VOUT Short to Battery
V
/
REF
ENABLE
V
< 1.0 mA
REF
5.0 V
Figure 16.
http://onsemi.com
6
CS8182
External Capacitors
The value of R
can then be compared with those in the
qJA
package section of the data sheet. Those packages with
’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
The output capacitor for the CS8182 is required for
stability. Without it, the regulator output will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst−case is determined at the minimum ambient
temperature and maximum load expected.
R
qJA
The output capacitor can be increased in size to any
desired value above the minimum. One possible purpose of
this would be to maintain the output voltage during brief
conditions of negative input transients that might be
characteristic of a particular system.
The capacitor must also be rated at all ambient
temperatures expected in the system. To maintain regulator
stability down to −40°C, a capacitor rated at that temperature
must be used.
SMART
REGULATOR
I
IN
I
OUT
V
IN
V
OUT
Control
Features
I
Q
More information on capacitor selection for SMART
REGULATOR s is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through our
website at http://www.onsemi.com.
Figure 17. Single Output Regulator with Key
Performance Parameters Labeled
Heatsinks
Calculating Power Dissipation in a Single Output
Linear Regulator
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
The maximum power dissipation for a single output
regulator (Figure 17) is:
{
}
PD(max) + V (max) * V
(min) I (max)
IN
OUT OUT
) V (max)I
IN
Q
determine the value of R
(1)
qJA:
where:
R
+ R
) R
) R
qSA
(3)
qJA
qJC
qCS
V
V
is the maximum input voltage,
is the minimum output voltage,
is the maximum output current, for the
IN(max)
OUT(min)
OUT(max)
where:
I
R
qJC
R
qCS
R
qSA
= the junction−to−case thermal resistance,
= the case−to−heatsink thermal resistance, and
= the heatsink−to−ambient thermal resistance.
application,and
I
I
is the quiescent current the regulator consumes at
Q
.
OUT(max)
Once the value of PD(max) is known, the maximum
R
qJC
appears in the package section of the data sheet. Like
permissible value of R
can be calculated:
R
q
, it is a function of package type. R
and R
are
JA
qCS
qSA
qJA
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heatsink manufacturers.
150°C * T
A
R
+
qJA
(2)
P
D
http://onsemi.com
7
CS8182
PACKAGE DIMENSIONS
SOIC−8
DF SUFFIX
CASE 751−07
ISSUE AB
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−X−
A
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
M
J
H
D
K
M
N
S
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
0.020
0.244
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
Figure 18. SOIC−8
http://onsemi.com
8
CS8182
PACKAGE DIMENSIONS
D2PAK−5
DP SUFFIX
CASE 936AC−01
ISSUE O
A
TERMINAL 6
NOTES:
U
E
1. DIMENSIONS AND TOLERANCING PER
ANSI Y14.5M, 1982.
K
B
2. CONTROLLING DIMENSION: INCH.
3. PACKAGE OUTLINE EXCLUSIVE OF
MOLD FLASH AND METAL BURR.
4. PACKAGE OUTLINE INCLUSIVE OF
PLATING THICKNESS.
5. FOOT LENGTH MEASURED AT
INTERCEPT POINT BETWEEN DATUM A
AND LEAD SURFACE.
S
V
M
H
L
P
W
INCHES
MILLIMETERS
DIM
A
B
C
D
E
MIN
MAX
0.406
0.340
0.180
0.036
0.055
MIN
10.05
8.38
4.31
0.66
1.14
MAX
10.31
8.64
4.57
0.91
1.40
0.396
0.330
0.170
0.026
0.045
G
N
R
D
G
H
K
L
M
N
P
R
S
U
V
0.067 REF
1.70 REF
0.580
0.620
0.066
0.010
0.108
0.023
0.110
8
14.73
15.75
1.68
0.25
2.74
0.58
2.79
8
−A−
0.055
0.000
0.098
0.017
0.090
0
1.40
0.00
2.49
0.43
2.29
0
C
_
_
_
_
0.095
0.105
2.41
2.67
0.30 REF
7.62 REF
7.75 REF
0.25
0.305 REF
0.010
W
http://onsemi.com
9
CS8182
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
CS8182/D
相关型号：
©2020 ICPDF网 联系我们和版权申明