CS8182YDPR5 [ETC]

Positive Adjustable Voltage Regulator ; 正,可调式稳压器\n
CS8182YDPR5
型号: CS8182YDPR5
厂家: ETC    ETC
描述:

Positive Adjustable Voltage Regulator
正,可调式稳压器\n

稳压器
文件: 总8页 (文件大小:67K)
中文:  中文翻译
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CS8182  
Micropower 200mA Low Dropout  
Tracking Regulator/Line Driver  
Description  
Features  
The CS8182 is a monolithic integrat- short circuit and thermal runaway  
200mA Source Capability  
ed low dropout tracking regulator  
designed to provide an adjustable  
buffered output voltage that closely  
tracks (±10mV) the reference input.  
The output delivers up to 200mA  
while being able to be configured  
higher, lower or equal to the refer-  
ence voltage.  
conditions. The device also can  
withstand 45V load dump tran-  
sients and –50V reverse polarity  
input voltage transients. This makes  
it suitable for use in automotive  
environments.  
Output Tracks within  
±10mV Worst Case  
Low Dropout (0.35V typ.  
@ 200mA)  
The VREF/ ENABLE lead serves two  
purposes. It is used to provide the  
input voltage as a reference for the  
output and it also can be pulled low  
to place the device in sleep mode  
where it nominally draws less than  
10µA from the supply.  
Low Quiescent Current  
Thermal Shutdown  
The output has been designed to  
operate over a wide range (2.8V to  
40V) while still maintaining excel-  
lent DC characteristics. The CS8182  
is protected from reverse battery,  
Short Circuit Protection  
Wide Operating Range  
Block Diagram  
Package Options  
VIN  
VOUT  
8 Lead SO Narrow  
ESD  
1
V
OUT  
V
IN  
Current Limit &  
SAT Sense  
Gnd  
Gnd  
Adj  
Gnd  
Gnd  
V
/ENABLE  
REF  
Adj  
ESD  
ESD  
ENABLE  
5 Lead D2 PAK  
+
VREF/ENABLE  
Tab (Gnd)  
1
VIN  
2
3
4
5
VOUT  
Gnd  
Adj  
+
Thermal  
Shutdown  
Gnd  
VREF  
1
2.0V  
Consult Factory for 8 Lead SOIC with  
exposed pad.  
ON Semiconductor  
2000 South County Trail, East Greenwich, RI 02818  
Tel: (401)885–3600 Fax: (401)885–5786  
N. American Technical Support: 800-282-9855  
Web Site: www.onsemi.com  
September, 2000 - Rev. 8  
1
Absolute Maximum Ratings  
Storage Temperature..............................................................................................................................................65°C to 150°C  
Supply Voltage Range (continuous).........................................................................................................................15V to 40V  
Supply Voltage Range (normal, continuous) ...........................................................................................................3.4V to 40V  
Peak Transient Voltage (VIN = 14V, Load Dump Transient = 31V)...................................................................................45V  
Voltage Range (Adj, VOUT, VREF/ ENABLE) ...........................................................................................................10V to 45V  
Maximum Junction Temperature.........................................................................................................................................150°C  
ESD Capability (Human Body Model) ...................................................................................................................................2kV  
Lead Temperature Soldering  
Wave Solder(through hole styles only) ......................................................................................10 sec. max, 260°C peak  
Reflow (SMD styles only).......................................................................................60 sec. max above 183°C, 230°C peak  
Electrical Characteristics: VIN = 14V; VREF/ENABLE > 2.75V; 40°C < TJ < 125°C;  
COUT 10µF; 0.1Ω ≤ COUT-ESR 10@ 10kHz, unless otherwise specified.  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Regulator Output  
VREF – VOUT  
4.5V VIN 26V,  
10  
10  
mV  
VOUT Tracking Error  
100µA IOUT 200mA (Note 1)  
Dropout Voltage  
IOUT = 100µA  
IOUT = 200mA  
100  
350  
150  
600  
mV  
mV  
(VIN – VOUT  
)
Line Regulation  
Load Regulation  
Adj Lead Current  
Current Limit  
4.5V VIN 26V (Note 1)  
100µA IOUT 200mA (Note 1)  
Loop in Regulation  
10  
10  
mV  
mV  
µA  
0.2  
1.0  
700  
VIN = 14V, VREF = 5V, VOUT = 90% VREF  
(Note 1)  
225  
mA  
Quiescent Current  
VIN = 12V, IOUT = 200mA  
VIN = 12V, IOUT = 100µA, TJ 85°C  
VIN = 12V, VREF/ ENABLE = 0V, TJ 85°C  
15  
50  
10  
25  
100  
30  
mA  
µA  
µA  
(IIN – IOUT  
)
Reverse Current  
Ripple Rejection  
V
OUT = 5V, VIN = 0V  
0.2  
1.5  
mA  
dB  
f = 120Hz, IOUT = 200mA,  
4.5V VIN 26V  
60  
Thermal Shutdown  
GBD  
150  
180  
210  
°C  
VREF/ENABLE  
Enable Voltage  
0.80  
0
2.00  
2.75  
1
V
Input Bias Current  
VREF/ ENABLE  
µA  
Note 1: VOUT connected to Adj lead.  
Package Lead Description  
LEAD SYMBOL  
PACKAGE LEAD #  
8 Lead SOIC  
FUNCTION  
5 Lead D2PAK  
Narrow  
1
8
VIN  
Input voltage.  
2
1
VOUT  
Regulated output.  
3
4
5
2, 3, 6, 7  
Gnd  
Adj  
Ground.  
4
5
Adjust lead.  
V
REF/ ENABLE  
Reference voltage and ENABLE input.  
2
Circuit Description  
ENABLE Function  
By pulling the VREF/ ENABLE lead below 2V typically,  
(see Figure 4 or Figure 5), the IC is disabled and enters a  
sleep state where the device draws less than 10µA from  
supply. When the VREF/ ENABLE lead is greater than  
2.75V, VOUT tracks the VREF/ ENABLE lead normally.  
V
, 200mA  
OUT  
V
V
IN  
B+  
OUT  
C2**  
10µF  
C1*  
0.1µF  
Gnd  
Gnd  
Gnd  
Gnd  
CS8182  
R
V
/
REF  
V
Adj  
REF  
ENABLE  
Output Voltage  
from MCU  
The output is capable of supplying 200mA to the load  
while configured as a similar (Figure 1), lower (Figure 3),  
or higher (Figure 2) voltage as the reference lead. The Adj  
lead acts as the inverting terminal of the op amp and the  
VREF lead as the non-inverting.  
The device can also be configured as a high-side driver as  
displayed in Figure 6.  
Figure 4: Tracking regulator with ENABLE circuit.  
V
(5V)  
REF  
V
OUT  
, 200mA  
V
IN  
CS8101  
6–40V  
V
V
B+  
5V  
Loads  
OUT  
IN  
C2**  
10µF  
C1*  
0.1µF  
100nF  
Gnd  
Gnd  
Gnd  
Gnd  
CS8182  
V
V
IN  
OUT  
5V  
µC  
10µF  
To Load  
(e.g. sensor)  
V
/
REF  
ENABLE  
Gnd  
Gnd  
Adj  
Gnd  
Gnd  
CS8182  
V
OUT  
= V  
REF  
I/O  
V
/
REF  
Adj  
ENABLE  
Figure 1: Tracking regulator at the same voltage.  
V
, 200mA  
OUT  
Figure 5: Alternative ENABLE circuit.  
V
V
IN  
Loads  
B+  
OUT  
C2**  
10µF  
C1*  
0.1µF  
Gnd  
Gnd  
Gnd  
Gnd  
CS8182  
R
F
V
V
B+  
200mA  
OUT  
IN  
V
/
REF  
Adj  
V
REF  
ENABLE  
Gnd  
Gnd  
Gnd  
Gnd  
CS8182  
R
A
V
= V  
(1 +R  
REF  
)
F
OUT  
R
A
V
/
REF  
MCU  
Adj  
ENABLE  
Figure 2: Tracking regulator at higher voltages.  
V
= B+ V  
OUT  
SAT  
Figure 6: High-Side Driver.  
V
, 200mA  
OUT  
B+  
V
V
IN  
Loads  
OUT  
C2**  
10µF  
C1*  
0.1µF  
Gnd  
Gnd  
Gnd  
Gnd  
CS8182  
R1  
V
/
REF  
Adj  
V
REF  
ENABLE  
R2  
R2  
R1 + R2  
V
= V  
(
)
OUT  
REF  
Figure 3: Tracking regulator at lower voltages.  
* C1 is required if the regulator is far from the power source filter.  
** C2 is required for stability.  
3
Application Notes  
External Capacitors  
The output capacitor for the CS8182 is required for stabili-  
ty. Without it, the regulator output will oscillate. Actual  
size and type may vary depending upon the application  
load and temperature range. Capacitor effective series  
resistance (ESR) is also a factor in the IC stability. Worst-  
case is determined at the minimum ambient temperature  
and maximum load expected.  
I
IN  
I
OUT  
V
Smart  
IN  
V
OUT  
Regulator  
Control  
Features  
}
The output capacitor can be increased in size to any  
desired value above the minimum. One possible purpose  
of this would be to maintain the output voltage during  
brief conditions of negative input transients that might be  
characteristic of a particular system.  
I
Q
Figure 1. Single output regulator with key performance parameters  
labeled.  
The capacitor must also be rated at all ambient tempera-  
tures expected in the system. To maintain regulator stabili-  
ty down to -40°C, a capacitor rated at that temperature  
must be used.  
Heatsinks  
More information on capacitor selection for Smart  
Regulators™ is available in the Smart Regulator applica-  
tion note, “Compensation for Linear Regulators.”  
A heatsink effectively increases the surface area of the  
package to improve the flow of heat away from the IC and  
into the surrounding air.  
Each material in the heat flow path between the IC and the  
outside environment will have a thermal resistance. Like  
series electrical resistances, these resistances are summed  
Calculating Power Dissipation  
in a Single Output Linear Regulator  
to determine the value of RΘJA  
.
The maximum power dissipation for a single output regu-  
lator (Figure 1) is:  
R
ΘJA = RΘJC + RΘCS + RΘSA  
(3)  
PD(max) = {VIN(max) - VOUT(min)}IOUT(max) + VIN(max) Q  
I
(1)  
where:  
ΘJC = the junction–to–case thermal resistance,  
R
where:  
RΘCS = the case–to–heatsink thermal resistance, and  
RΘSA = the heatsink–to–ambient thermal resistance.  
VIN(max) is the maximum input voltage,  
VOUT(min) is the minimum output voltage,  
RΘJC appears in the package section of the data sheet. Like  
RΘJA, it is a function of package type. RΘCS and RΘSA are  
functions of the package type, heatsink and the interface  
between them. These values appear in heat sink data  
sheets of heatsink manufacturers.  
IOUT(max) is the maximum output current for the applica-  
tion, and  
IQ is the quiescent current the regulator consumes at  
IOUT(max)  
.
Once the value of PD(max) is known, the maximum permis-  
sible value of RΘJA can be calculated:  
150°C - TA  
(2)  
RΘJA  
=
PD  
The value of RΘJA can then be compared with those in  
the package section of the data sheet. Those packages  
with RΘJA's less than the calculated value in equation 2  
will keep the die temperature below 150°C.  
In some cases, none of the packages will be sufficient to  
dissipate the heat generated by the IC, and an external  
heatsink will be required.  
4
Package Specification  
PACKAGE THERMAL DATA  
PACKAGE DIMENSIONS IN mm (INCHES)  
D
Thermal Data  
5 Lead  
8 Lead  
SOIC Narrow  
D2PAK  
Lead Count  
Metric  
English  
Max Min  
.197 .189  
RΘJC  
RΘJA  
typ  
typ  
4.0  
45  
°C/ W  
°C/ W  
Max  
Min  
4.80  
10-50*  
165  
8 Lead SOIC Narrow  
5.00  
* Depending on thermal properties of substrate. RΘJA = RΘJC + RΘCA  
Surface Mount Narrow Body (D); 150 mil wide  
6.20 (.244)  
5.80 (.228)  
4.00 (.157)  
3.80 (.150)  
0.51 (.020)  
0.33 (.013)  
1.27 (.050) BSC  
1.75 (.069) MAX  
1.57 (.062)  
1.37 (.054)  
0.25 (.010)  
0.19 (.008)  
1.27 (.050)  
0.40 (.016)  
0.25 (0.10)  
0.10 (.004)  
D
REF: JEDEC MS-012  
5 Lead D2PAK (DP)  
10.31 (.406)  
10.05 (.396)  
1.40 (.055)  
1.14 (.045)  
1.68 (.066)  
1.40 (.055)  
8.53 (.336)  
8.28 (.326)  
15.75 (.620)  
14.73 (.580)  
2.74(.108)  
2.49(.098)  
0.91 (.036)  
0.66 (.026)  
2.79 (.110)  
2.29 (.090)  
1.70 (.067) REF  
.254 (.010) REF  
0.10 (.004)  
0.00 (.000)  
4.57 (.180)  
4.31 (.170)  
Ordering Information  
ON Semiconductor and the ON Logo are trademarks of  
Semiconductor Components Industries, LLC (SCILLC). ON  
Semiconductor reserves the right to make changes without  
further notice to any products herein. For additional infor-  
mation and the latest available information, please contact  
your local ON Semiconductor representative.  
Part Number  
CS8182YDP5  
CS8182YDPR5  
CS8182YD8  
Description  
5 Lead D2PAK  
5 Lead D2PAK (tape & reel)  
8 Lead SOIC Narrow  
CS8182YDR8  
8 Lead SOIC Narrow (tape & reel)  
© Semiconductor Components Industries, LLC, 2000  
5
Notes  
Notes  
Notes  

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