AU5517 [ONSEMI]
Dual Operational Transconductance Amplifier; 双路运算跨导放大器
| 型号： | AU5517 |
| 厂家： | 
ONSEMI |
| 描述： | Dual Operational Transconductance Amplifier |
| 文件： | 总14页 (文件大小：187K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NE5517, NE5517A, AU5517
Dual Operational
Transconductance Amplifier
The AU5517 and NE5517 contain two current-controlled
transconductance amplifiers, each with a differential input and
push-pull output. The AU5517/NE5517 offers significant design and
performance advantages over similar devices for all types of
programmable gain applications. Circuit performance is enhanced
through the use of linearizing diodes at the inputs which enable a
10 dB signal-to-noise improvement referenced to 0.5% THD. The
AU5517/NE5517 is suited for a wide variety of industrial and
consumer applications.
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MARKING
DIAGRAMS
Constant impedance of the buffers on the chip allow general use of
the AU5517/NE5517. These buffers are made of Darlington
transistors and a biasing network that virtually eliminate the change of
SOIC−16
D SUFFIX
CASE 751B
xx5517DG
AWLYWW
1
1
offset voltage due to a burst in the bias current I , hence eliminating
ABC
the audible noise that could otherwise be heard in high quality audio
applications.
Features
• Constant Impedance Buffers
1
PDIP−16
N SUFFIX
CASE 648
• DV of Buffer is Constant with Amplifier I
Change
BE
BIAS
NE5517yy
AWLYYWWG
• Excellent Matching Between Amplifiers
• Linearizing Diodes
• High Output Signal-to-Noise Ratio
• Pb−Free Packages are Available*
1
xx
yy
A
= AU or NE
= AN or N
= Assembly Location
Applications
WL = Wafer Lot
YY, Y = Year
WW = Work Week
• Multiplexers
• Timers
G
= Pb−Free Package
• Electronic Music Synthesizers
• Dolby® HX Systems
• Current-Controlled Amplifiers, Filters
• Current-Controlled Oscillators, Impedances
PIN CONNECTIONS
N, D Packages
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
I
I
ABCb
ABCa
D
a
D
b
+IN
a
+IN
−IN
VO
b
−IN
a
b
VO
a
b
V−
V+
IN
IN
BUFFERa
BUFFERa
BUFFERb
VO
VO
BUFFERb
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
April, 2006 − Rev. 3
NE5517/D
NE5517, NE5517A, AU5517
PIN DESCRIPTION
Pin No.
Symbol
Description
1
2
I
Amplifier Bias Input A
Diode Bias A
ABCa
D
a
3
+IN
Non-inverted Input A
Inverted Input A
Output A
a
4
−IN
a
a
5
VO
6
V−
Negative Supply
Buffer Input A
7
IN
BUFFERa
8
VO
VO
Buffer Output A
Buffer Output B
Buffer Input B
BUFFERa
BUFFERb
9
10
11
12
13
14
15
16
IN
BUFFERb
V+
Positive Supply
Output B
VO
b
−IN
Inverted Input B
Non-inverted Input B
Diode Bias B
b
+IN
b
D
b
I
Amplifier Bias Input B
ABCb
V+
11
D4
D6
Q12
Q14
Q13
8,9
7,10
Q6
Q10
Q7
Q11
2,15
V
D3
OUTPUT
D2
Q4
5,12
Q5
+INPUT
3,14
−INPUT
4,13
Q15
Q16
1,16
AMP BIAS
INPUT
Q3
Q2
D7
D8
Q9
R1
Q1
Q8
D1
D5
V−
6
Figure 1. Circuit Schematic
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2
NE5517, NE5517A, AU5517
B
B
AMP
BIAS
INPUT
B
B
B
B
INPUT
(−)
DIODE
BIAS
INPUT
(+)
B
BUFFER
INPUT
BUFFER
OUTPUT
V+ (1)
11
OUTPUT
16
15
14
13
12
10
9
−
B
+
+
A
−
1
2
3
4
5
6
7
8
INPUT
(−)
A
V−
AMP
BIAS
INPUT
A
DIODE
BIAS
A
INPUT
(+)
A
OUTPUT
A
BUFFER
INPUT
A
BUFFER
OUTPUT
A
NOTE: V+ of output buffers and amplifiers are internally connected.
Figure 2. Connection Diagram
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Supply Voltage (Note 1)
V
S
D
44 V or 22
DC
Power Dissipation, T
= 25 °C (Still Air) (Note 2)
P
mW
amb
NE5517N, NE5517AN
NE5517D, AU5517D
1500
1125
Thermal Resistance, Junction−to−Ambient
R
°C/W
q
JA
D Package
N Package
140
94
Differential Input Voltage
Diode Bias Current
V
5.0
2.0
V
IN
I
D
mA
mA
Amplifier Bias Current
I
2.0
ABC
Output Short-Circuit Duration
Buffer Output Current (Note 3)
I
Indefinite
20
SC
I
mA
OUT
Operating Temperature Range
NE5517N, NE5517AN
AU5517T
T
amb
°C
0 °C to +70 °C
−40 °C to +125 °C
Operating Junction Temperature
DC Input Voltage
T
150
°C
J
V
DC
+V to −V
S S
Storage Temperature Range
Lead Soldering Temperature (10 sec max)
T
−65 °C to +150 °C
°C
°C
stg
T
sld
230
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. For selections to a supply voltage above 22 V, contact factory.
2. The following derating factors should be applied above 25 °C
N package at 10.6 mW/°C
D package at 7.1 mW/°C.
3. Buffer output current should be limited so as to not exceed package dissipation.
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NE5517, NE5517A, AU5517
ELECTRICAL CHARACTERISTICS (Note 4)
AU5517/NE5517
Min Typ Max
NE5517A
Typ
Min
Max
Test Conditions
Symbol
Characteristic
Unit
Input Offset Voltage
V
OS
0.4
5.0
5.0
0.4
2.0
5.0
2.0
mV
Overtemperature Range
5.0 mA
I
0.3
7.0
0.5
0.3
7.0
0.5
ABC
DV /DT
Avg. TC of Input Offset Voltage
Diode Bias Current
mV/°C
OS
V
OS
Including Diodes
5
2.0
mV
(I ) = 500 mA
D
Input Offset Change
Input Offset Current
5.0 mA ≤ I
≤ 500 mA
V
0.1
0.1
0.1
0.1
3.0
0.6
mV
mA
ABC
OS
OS
I
0.6
DI /DT
Avg. TC of Input Offset Current
0.001
0.001
mA/°C
mA
OS
Input Bias Current
I
0.4
1.0
5.0
8.0
0.4
1.0
5.0
7.0
BIAS
Overtemperature Range
Avg. TC of Input Current
DI /DT
B
0.01
0.01
mA/°C
Forward Transconductance
g
M
6700
5400
9600 13000 7700
4000
9600 12000 mmho
Overtemperature Range
g
Tracking
0.3
0.3
5.0
dB
M
Peak Output Current
R = 0, I
= 5.0 mA
= 500 mA
I
5.0
500
3.0
350
300
7.0
650
mA
L
ABC
OUT
OUT
350
300
650
R = 0, I
L
ABC
500
R = 0, Overtemperature
L
Range
Peak Output Voltage
V
V
Positive
Negative
R = ∞, 5.0 mA ≤ I
L
≤ 500 mA
≤ 500 mA
+12
−12
+14.2
−14.4
+12
−12
+14.2
−14.4
L
ABC
ABC
R = ∞, 5.0 mA ≤ I
Supply Current
Sensitivity
I
= 500 mA, both channels
I
2.6
4.0
2.6
4.0
mA
ABC
CC
V
OS
mV/V
Positive
D V /D V+
20
20
150
150
20
20
150
150
OS
Negative
D V /D V−
OS
Common-mode Rejection
Ration
CMRR
80
12
110
80
12
110
dB
Common-mode Range
Crosstalk
13.5
100
13.5
100
V
Referred to Input (Note 5)
20 Hz < f < 20 kHz
dB
Differential Input Current
Leakage Current
I
= 0, Input = 4.0 V
I
0.02
0.2
26
100
100
0.02
0.2
26
10
nA
nA
ABC
IN
I
= 0 (Refer to Test Circuit)
5.0
ABC
Input Resistance
R
B
10
10
10
10
kW
IN
Open-loop Bandwidth
Slew Rate
2.0
50
2.0
50
MHz
V/ms
mA
W
Unity Gain Compensated
SR
Buffer Input Current
Peak Buffer Output Voltage
5
5
IN
0.4
5.0
5.0
0.4
5.0
5.0
BUFFER
VO
V
BUFFER
DV of Buffer
Refer to Buffer V Test
0.5
0.5
mV
BE
BE
Circuit (Note 6)
4. These specifications apply for V
=
15 V, T
= 25°C, amplifier bias current (I
) = 500 mA, Pins 2 and 15 open unless otherwise
ABC
S
amb
specified. The inputs to the buffers are grounded and outputs are open.
5. These specifications apply for V 15 V, I = 500 mA, R = 5.0 kW connected from the buffer output to −V and the input of the buffer
=
S
ABC
OUT
S
is connected to the transconductance amplifier output.
6. V 15, R = 5.0 kW connected from Buffer output to −V and 5.0 mA ≤ I ≤ 500 mA.
ABC
=
S
OUT
S
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NE5517, NE5517A, AU5517
TYPICAL PERFORMANCE CHARACTERISTICS
3
2
4
3
2
10
10
10
10
10
10
5
4
V
=
15V
V = 15V
S
S
V
= 15V
S
3
2
+125°C
1
-55°C
+25°C
-55°C
+25°C
0
-1
-2
-3
-4
-5
-6
-7
-8
+125°C
-55°C
+25°C
+125°C
1
10
1
+125°C
0.1
0.1mA
1mA
10mA
100mA 1000mA
0.1mA
1mA
AMPLIFIER BIAS CURRENT (I )
ABC
10mA
100mA 1000mA
0.1mA
1mA
10mA
100mA 1000mA
AMPLIFIER BIAS CURRENT (I
)
AMPLIFIER BIAS CURRENT (I
)
ABC
ABC
Figure 4. Input Bias Current
Figure 5. Input Bias Current
Figure 3. Input Offset Voltage
5
4
3
2
10
10
10
10
10
1
5
4
V
OUT
(+)V = (−)V = V
IN IN OUT
= 36V
V
= 15V
S
V
CMR
3
+125°C
2
4
3
2
10
10
V
= 15V
S
1
RLOAD = ∞
0
+25°C
-55°C
Tamb = 25°C
-1
-2
-3
-4
-5
-6
-7
-8
V
V
CMR
0V
10
10
OUT
0.1mA 1mA
10mA
100mA 1000mA
-50°C -25°C 0°C 25°C 50°C 75°C100°C125°C
0.1mA 1mA
10mA
100mA
1000mA
AMBIENT TEMPERATURE (T
)
A
AMPLIFIER BIAS CURRENT (I
)
ABC
AMPLIFIER BIAS CURRENT (I
)
ABC
Figure 6. Peak Output Current
Figure 8. Leakage Current
Figure 7. Peak Output Voltage and
Common-Mode Range
2
1
5
4
10
10
10
10
10
10
10
1
PINS 2, 15
OPEN
gM
+125°C
PINS 2, 15
OPEN
mq
m
V
= 15V
S
M
4
3
2
3
2
10
10
10
10
1
+25°C
-55°C
+125°C
0.1
+25°C
10mA
0.01
0.1mA
1mA
100mA
1000mA
0.1mA
1mA
10mA
100mA
1000mA
0
1
2
3
4
5
6
7
INPUT DIFFERENTIAL VOLTAGE
AMPLIFIER BIAS CURRENT (I
)
AMPLIFIER BIAS CURRENT (I
)
ABC
ABC
Figure 11. Input Resistance
Figure 9. Input Leakage
Figure 10. Transconductance
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NE5517, NE5517A, AU5517
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
2000
1800
1600
1400
1200
1000
800
7
6
5
4
3
2
1
0
100
10
V
=
15V
T
= +25°C
S
amb
RL = 10kW
IABC = 1mA
-55°C
+25°C
CIN
COUT
1
+125°C
600
0.1
0.01
400
200
0
1
10
100
1000
)
0.1mA 1mA
10mA
100mA
1000mA
0.1mA 1mA
10mA
100mA 1000mA
DIFFERENTIAL INPUT VOLTAGE (mV
P-P
AMPLIFIER BIAS CURRENT (I
)
AMPLIFIER BIAS CURRENT (I
)
ABC
ABC
Figure 14. Distortion vs. Differential
Input Voltage
Figure 12. Amplifier Bias Voltage vs.
Amplifier Bias Current
Figure 13. Input and Output
Capacitance
20
600
500
400
VS = 15V
R
= 10kW
L
0
-20
VIN = 80mVP-P
VIN = 40mVP-P
-40
300
200
100
0
IABC = 1mA
-60
OUTPUT NOISE
20kHz BW
-80
IABC = 100mA
-100
0.1mA 1mA
10mA
100mA
1000mA
10
100
1k
10k
100k
I
AMPLIFIER BIAS CURRENT (mA)
FREQUENCY (Hz)
ABC
Figure 15. Voltage vs. Amplifier Bias Current
Figure 16. Noise vs. Frequency
+36V
+15V
4V
4, 13
4, 13
2, 15
3, 14
A
−
+
11
A
−
+
11
7, 10
5, 12
5, 12
1, 10
2, 15
3, 14
NE5517
NE5517
8, 9
1, 15
6
6
−15V
Figure 17. Leakage Current Test Circuit
Figure 18. Differential Input Current Test Circuit
V+
V
50kW
V−
Figure 19. Buffer VBE Test Circuit
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NE5517, NE5517A, AU5517
APPLICATIONS
+15V
0.01mF
3, 14
10kW
62kW
INPUT
−
+
11
1, 16
390pF
2, 15
4, 13
7, 10
5, 12
51W
NE5517
8, 9
OUTPUT
1.3kW
6
0.01mF
5kW
−15V
10kW
−15V
0.001mF
Figure 20. Unity Gain Follower
CIRCUIT DESCRIPTION
The circuit schematic diagram of one-half of the
AU5517/NE5517, a dual operational transconductance
amplifier with linearizing diodes and impedance buffers, is
shown in Figure 21.
If V is small, the ratio of I and I will approach unity and
IN 5 4
the Taylor series of In function can be approximated as
I5
I4
I5 * I4
I4
KT
q
KT
q
(eq. 3)
In
[
and I4 ^ I5 ^ IB
Transconductance Amplifier
I5
I4
I5 * I4
1ń2IB
I5 * I
IB
4 + VIN
KT
q
KT
q
2KT
q
(eq. 4)
In
[
+
The transistor pair, Q and Q , forms a transconductance
4
5
stage. The ratio of their collector currents (I and I ,
respectively) is defined by the differential input voltage, V ,
which is shown in Equation 1.
4
5
q
ǒI Ǔ
IN
B
I5 * I4 + VIN
2KT
I5
KT
q
(eq. 1)
The remaining transistors (Q to Q ) and diodes (D to D )
6 11 4 6
form three current mirrors that produce an output current equal
to I minus I . Thus:
VIN
+
In
I4
Where V is the difference of the two input voltages
IN
5
4
KT ≅ 26 mV at room temperature (300°k).
q
(eq. 5)
ǒI Ǔ
B 2KT
VIN
+ IO
Transistors Q , Q and diode D form a current mirror which
1
2
1
focuses the sum of current I and I to be equal to amplifier bias
q
4
5
ǒI Ǔ
2KT
B
current I :
B
The term
is then the transconductance of the amplifier
I4 ) I5 + IB
(eq. 2)
and is proportional to I .
B
V+
11
D4
D6
Q12
Q14
Q13
8,9
7,10
Q6
Q10
Q7
Q11
2,15
V
D3
+INPUT
OUTPUT
D2
Q4
5,12
Q5
−INPUT
3,14
4,13
Q15
Q16
1,16
AMP BIAS
INPUT
Q3
Q2
D7
D8
Q9
R1
Q1
Q8
D1
D5
V−
6
Figure 21. Circuit Diagram of NE5517
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NE5517, NE5517A, AU5517
Linearizing Diodes
Impedance Buffer
For V greater than a few millivolts, Equation 3 becomes
invalid and the transconductance increases non-linearly.
Figure 22 shows how the internal diodes can linearize the
The upper limit of transconductance is defined by the
maximum value of I (2.0 mA). The lowest value of I for
which the amplifier will function therefore determines the
IN
B
B
transfer function of the operational amplifier. Assume D
overall dynamic range. At low values of I , a buffer with
2
B
and D are biased with current sources and the input signal
very low input bias current is desired. A Darlington
3
current is I . Since I + I = I and I − I = I ,
amplifier with constant-current source (Q , Q , Q , D ,
S
4
5
B
5
4
0
14 15 16 7
that is: I = (I − I ), I = (I + I )
D , and R ) suits the need.
8 1
4
B
0
5
B
0
+VS
APPLICATIONS
I
Voltage-Controlled Amplifier
D
In Figure 23, the voltage divider R , R divides the
input-voltage into small values (mV range) so the amplifier
operates in a linear manner.
2
3
I
B
ǒ Ǔ
I
+
2 I
0
S
I
D
I
I
D
D
*
I
)
I
S
S
2
2
I
+
I
* I
4
0
5
It is:
I
I
5
4
R3
D
D
IOUT + *VIN
@
@ gM;
3
2
R2 ) R3
VOUT + IOUT @ RL;
1/2I
D
Q
I
5
4
I
S
I
S
VOUT
R3
R2 ) R3
1/2I
D
A +
+
@ gM @ RL
I
B
VIN
(3) gM = 19.2 IABC
(gM in mmhos for IABC in mA)
−VS
Figure 22. Linearizing Diode
Since g is directly proportional to I
, the amplification
ABC
M
is controlled by the voltage V in a simple way.
C
For the diodes and the input transistors that have identical
geometries and are subject to similar voltages and
temperatures, the following equation is true:
I
When V is taken relative to −V the following formula
C
CC
is valid:
(VC * 1.2V)
IABC
+
D ) IS
1ń2(IB ) IO)
(eq. 6)
1ń2(IB * IO)
R1
T
q
2
KT
q
In
+
In
I
D * IS
The 1.2 V is the voltage across two base-emitter baths in
the current mirrors. This circuit is the base for many
applications of the AU5517/NE5517.
2
2IB
ID
ID
2
IO + IS
for |IS| t
The only limitation is that the signal current should not
exceed I .
D
INT
V
C
+V
CC
+V
CC
11
R
I
ABC
1
R
= R / /R
2
3
4
4
3
+
−
1
5
7
NE5517
6
R
2
8
V
IN
V
OUT
I
OUT
R
L
R
R
S
3
INT
−V
CC
TYPICAL VALUES:
R
R
R
= 47kW
= 10kW
1
2
3
= 200W
R
R
R
= 200W
= 100kW
= 47kW
4
L
S
Figure 23.
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NE5517, NE5517A, AU5517
Stereo Amplifier With Gain Control
Modulators
Figure 24 shows a stereo amplifier with variable gain via
a control input. Excellent tracking of typical 0.3 dB is easy
Because the transconductance of an OTA (Operational
Transconductance Amplifier) is directly proportional to I
,
ABC
to achieve. With the potentiometer, R , the offset can be
adjusted. For AC-coupled amplifiers, the potentiometer
may be replaced with two 510 W resistors.
the amplification of a signal can be controlled easily. The
output current is the product from transconductance×input
voltage. The circuit is effective up to approximately 200 kHz.
Modulation of 99% is easy to achieve.
P
+V
CC
11
10kW
3
+
V
IN1
INT
+V
R
IN
15kW
CC
NE5517/A
I
R
P
+V
R
1k
D
CC
ABC
8
−
1
4
V
OUT1
R
L
30kW
10kW
V
C
5.1kW
R
C
10kW
14
16
+
V
−V
+V
IN2
CC
I
ABC
R
IN
15kW
15
10
CC
NE5517/A
R
P
+V
1k
12
R
D
CC
6
9
−
13
V
OUT2
R
10kW
L
R
S
−V
CC
INT
Figure 24. Gain-Controlled Stereo Amplifier
R
C
30kW
V
IN2
1
SIGNAL
I
ABC
+V
CC
11
INT
+V
I
D
3
4
CC
+
15kW
2
5
7
NE5517/A
−
1kW
V
OS
V
IN1
8
CARRIER
R
10kW
V
L
10kW
OUT
R
S
6
−V
CC
−V
CC
INT
Figure 25. Amplitude Modulator
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NE5517, NE5517A, AU5517
Voltage-Controlled Resistor (VCR)
Voltage-Controlled Oscillators
Because an OTA is capable of producing an output current
proportional to the input voltage, a voltage variable resistor
can be made. Figure 26 shows how this is done. A voltage
Figure 32 shows a voltage-controlled triangle-square
wave generator. With the indicated values a range from
2.0 Hz to 200 kHz is possible by varying I
from 1.0 mA
ABC
presented at the R terminals forces a voltage at the input.
to 10 mA.
X
This voltage is multiplied by g and thereby forces a current
The output amplitude is determined by I
Please notice the differential input voltage is not allowed
to be above 5.0 V.
× R
.
M
OUT
OUT
through the R terminals:
X
With a slight modification of this circuit you can get the
sawtooth pulse generator, as shown in Figure 33.
R ) RA
gM ) RA
Rx +
where g is approximately 19.21 mMHOs at room
APPLICATION HINTS
M
To hold the transconductance g within the linear range,
temperature. Figure 27 shows a Voltage Controlled Resistor
using linearizing diodes. This improves the noise
performance of the resistor.
M
I
should be chosen not greater than 1.0 mA. The current
ABC
mirror ratio should be as accurate as possible over the entire
current range. A current mirror with only two transistors is
not recommended. A suitable current mirror can be built
with a PNP transistor array which causes excellent matching
and thermal coupling among the transistors. The output
current range of the DAC normally reaches from 0 to
−2.0 mA. In this application, however, the current range is
Voltage-Controlled Filters
Figure 28 shows a Voltage Controlled Low-Pass Filter.
The circuit is a unity gain buffer until X /g is equal to
C
M
R/R . Then, the frequency response rolls off at a 6dB per
A
octave with the −3 dB point being defined by the given
equations. Operating in the same manner, a Voltage
Controlled High-Pass Filter is shown in Figure 29. Higher
order filters can be made using additional amplifiers as
shown in Figures 30 and 31.
set through R
(10 kW) to 0 to −1.0 mA.
REF
VREF
RREF
5V
10kW
IDACMAX + 2 @
+ 2 @
+ 1mA
R
g
)
R
A
R
X
+
@ R
M
A
30kW
+V
V
CC
C
INT
+V
3
11
CC
+
I
O
2
NE5517/A
5
7
−
4
C
8
V
OUT
R
X
R
200W
200W
−V
CC
10kW
100kW
−V
CC
INT
Figure 26. VCR
+V
30kW
CC
1
V
C
+V
CC
11
I
D
INT
+V
3
CC
R
P
2
V
OS
NE5517/A
6
1kW
5
7
C
4
8
R
X
R
−V
CC
10kW
100kW
−V
CC
INT
Figure 27. VCR with Linearizing Diodes
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NE5517, NE5517A, AU5517
30kW
1
V
C
+V
CC
11
I
ABC
INT
100kW
3
+V
CC
V
+
IN
2
NE5517/A
5
150pF
7
C
−
6
8
4
V
OUT
R
200W
−V
200W
R
CC
A
100kW
10kW
−V
CC
INT
NOTE:
R
g
M
A
f
+
g(R
O
)
RA) 2pC
Figure 28. Voltage-Controlled Low-Pass Filter
30kW
1
V
C
+V
CC
+V
CC
11
I
ABC
INT
+V
100kW
V
3
OS
NULL
CC
+
2
NE5517/A
5
0.005mF
7
C
-V
CC
−
6
8
4
V
OUT
R
1kW
A
R
1kW
−V
CC
100kW
10kW
−V
CC
INT
NOTE:
R
g
M
A
f
+
g(R
O
) RA) 2pC
Figure 29. Voltage-Controlled High-Pass Filter
15kW
V
C
+V
CC
+V
INT
CC
+V
CC
+
+
V
IN
NE5517/A
NE5517/A
−
100kW
200pF
C
−
C
2
100pF
V
R
OUT
A
200W
10kW
R
200W
100
kW
A
R
−V
200W
R
10kW
CC
A
100kW
200
−V
CC
-V
INT
CC
NOTE:
R
g
A
M
f
+
(R
O
)
R
) 2p C
A
Figure 30. Butterworth Filter − 2nd Order
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11
NE5517, NE5517A, AU5517
15kW
1
16
V
C
+V
CC
11
+V
INT
CC
10kW
14
+
+V
CC
3
+
5
7
12
10
2
NE5517/A
−
NE5517/A
15
LOW
PASS
20kW
−
6
V
800pF
OUT
800pF
13
9
1kW
1kW
−V
20kW
5.1kW
CC
5.1kW
20kW
−V
CC
−V
CC
INT
BANDPASS OUT
Figure 31. State Variable Filter
30kW
+V
CC
V
C
+V
INT
+V
CC
INT
+V
CC
47kW
13
14
4
CC
−
−
11
1
5
7
12
10
NE5517/A
+
NE5517/A
16
3
C
0.1mF
+
6
8
V
9
OUT2
−V
20kW
CC
10kW
−V
INT
CC
−V
V
CC OUT1
GAIN
CONTROL
Figure 32. Triangle−Square Wave Generator (VCO)
I
B
I
C
470kW
1
+V
CC
V
C
16
+V
INT
+V
CC
INT
+V
CC
CC
47kW
12
13
14
30kW
4
+
11
−
5
7
10
2
NE5517/A
+
NE5517/A
3
C
0.1mF
−
6
8
R
30kW
R
2
30kW
1
−V
20kW
CC
−V
CC
−V
V
CC OUT1
V
NOTE:
OUT2
INT
(V * 0.8) R
I
2V
x C
2V xC
PK
1
C
PK
C
V
+
T
+
T
+
f
I
t t I
C
B
PK
H
L
OSC
R
)
R
I
I
2V xC
1
2
B
C
PK
Figure 33. Sawtooth Pulse VCO
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NE5517, NE5517A, AU5517
ORDERING INFORMATION
Device
†
Temperature Range
Package
Shipping
AU5517DR2
SOIC−16
AU5517DR2G
−40 to +125 °C
2500 Tape & Reel
48 Units/Rail
SOIC−16
(Pb−Free)
NE5517D
SOIC−16
NE5517DG
SOIC−16
(Pb−Free)
NE5517DR2
SOIC−16
NE5517DR2G
2500 Tape & Reel
SOIC−16
(Pb−Free)
0 to +70 °C
NE5517N
PDIP−16
NE5517NG
PDIP−16
(Pb−Free)
25 Units/Rail
NE5517AN
PDIP−16
NE5517ANG
PDIP−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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13
NE5517, NE5517A, AU5517
PACKAGE DIMENSIONS
SOIC−16
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
16
9
8
−B−
P 8 PL
M
S
B
0.25 (0.010)
1
MILLIMETERS
INCHES
MIN
G
DIM MIN
MAX
10.00
4.00
1.75
0.49
1.25
MAX
0.393
0.157
0.068
0.019
0.049
A
B
C
D
F
9.80
3.80
1.35
0.35
0.40
0.386
0.150
0.054
0.014
0.016
F
R X 45
K
_
G
J
1.27 BSC
0.050 BSC
C
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
−T−
SEATING
PLANE
K
M
P
R
J
_
_
_
_
M
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
D
16 PL
M
S
S
0.25 (0.010)
T B
A
PDIP−16
CASE 648−08
ISSUE T
NOTES:
−A−
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
16
9
B
1
8
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
0.740 0.770 18.80 19.55
MILLIMETERS
MIN MAX
F
C
L
A
B
C
D
F
S
0.250 0.270
0.145 0.175
0.015 0.021
6.35
3.69
0.39
1.02
6.85
4.44
0.53
1.77
SEATING
PLANE
−T−
0.040
0.70
G
H
J
K
L
0.100 BSC
2.54 BSC
1.27 BSC
K
M
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
H
J
0.21
0.38
3.30
7.74
10
G
2.80
7.50
0
D 16 PL
M
M
0.25 (0.010)
T A
M
S
0
10
_
_
_
_
0.020 0.040
0.51
1.01
Dolby is a registered trademark of Dolby Laboratories Inc., San Francisco, Calif.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NE5517/D
相关型号：
AU5780AD,112
IC SPECIALTY INTERFACE CIRCUIT, PDSO8, 3.90 MM, PLASTIC, SOIC-8, Interface IC:Other
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AU5780AD/N,118
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