MSM7575GS-BK [OKI]
PCM Codec, A/MU-Law, 1-Func, PQFP64, 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64;
| 型号： | MSM7575GS-BK |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | PCM Codec, A/MU-Law, 1-Func, PQFP64, 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 PC 电信 电信集成电路 |
| 文件： | 总26页 (文件大小：261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
E2U0025-29-82
This version: Aug. 1999
Previous version: Jan. 1998
¡ Semiconductor
MSM7575
Multi-Function PCM CODEC
GENERAL DESCRIPTION
The MSM7575, developed for advanced digital cordless telephone systems, is a single channel
full duplex CODEC which performs mutual transcoding between the analog voice band signal
and the 64 kbps PCM serial data.
This device performs DTMF tone and several kinds of tone generation, transmit/receive data
mute and gain control, side-tone pass and its gain control, and VOX function.
Using advanced circuit technology, this device operates from a single 3 V power supply and
provides low power consumption.
FEATURES
• Single 3 V Power Supply Operation
VDD: 2.7 V to 3.6 V
• Transmit/Receive Full-Duplex Single Channel Operation
• Transmit/Receive Synchronous Mode Only
• PCM Interface Data Format :
• Serial PCM Transmission Data Rate :
• Low Power Consumption
Operating Mode :
Power-Down Mode :
• Two Analog Input Amplifier Stages:
• Analog Output Stage
A-law/µ-law/linear (2's complement) Selectable
64 kbps to 2048 kbps
24 mW Typ. (VDD = 3.0 V)
0.03 mW Typ. (VDD = 3.0 V)
Externally Gain Adjustable
Push-pull Drive (direct drive of 350 W + 120 nF)
9.600/19.200 MHz Selectable
• Master Clock Frequency :
• Transmit/Receive Mute, Transmit/Receive Programmable Gain Control
• Side Tone Path with Programmable Attenuation
• Built-in DTMF Tone Generator
(8-step Level Adjustment)
• Built-in Various Ringing Tones Generator
• Built-in Various Ring Back Tone Generator
• Control by Serial MCU Interface
• Built-in VOX Control
Transmit side
Receive side
:
:
Voice/Silence Signal Detect
Background Noise Generation
• Built-in Op-amps and Analog Switches for Various Analog Interfaces.
• Package:
64-pin plastic QFP
(QFP64-P-1414-0.80-BK)(Product name : 7575GS-BK)
1/25
+
-
AIN1+
AIN1-
GSX1
Voice Signal
Detect
VOXO
VOXI
P
/
+
-
AIN2
Prefilter
VREF
BPF
PCMSO
A/D
Compand
ToneGEN.
S
ATT
GSX2
XSYNC
-1
ATT
AOUT+
BCLK
+
AOUT-
PWI
-
Back ground
Noise Gen.
ATT
ATT
RSYNC
PCMRI
VFRO
SAO
-1
-1
S
/
P
Postfilter
+
+
Expand
LPF
D/A
+
TOUT1
TOUT2
TOUT3
-
RINGC
-
To each circuit
MCU Interface
REF1
AVIN
+
-
DIN
REF2
+
DOUT
DEN
AIN3+
AIN3-
GSX3
EXCK
VDD
VDD
VDD
-
+
AIN4+
AIN4-
GSX4
Clock/
Timing
-
+
SW1
SW2
SW3
SW4
SW5
SW6
SW7
SW8
SW9
MSM7575
¡ Semiconductor
PIN CONFIGURATION (TOP VIEW)
VOXI
VOXO
DOUT
DIN
1
2
3
4
5
6
7
8
9
48 AOUT+
47 AOUT-
46 PWI
45 VFRO
44 SAO
EXCK
DEN
43 GSX2
42 AIN2
41 GSX1
40 AIN1-
39 AIN1+
38 GSX4
37 AIN4-
36 AIN4+
35 GSX3
34 AIN3-
33 AIN3+
PCMRI
PCMSO
RSYNC
XSYNC 10
BCLK 11
DG 12
IO1 13
IO2 14
IO3 15
IO4 16
64-Pin Plastic QFP
NC : No connect pin
3/25
MSM7575
¡ Semiconductor
PIN AND FUNCTIONAL DESCRIPTIONS
AIN1+, AIN1–, AIN2, GSX1, GSX2
Transmit analog input and the output for transmit gain adjustment. The pin AIN1– (AIN2)
connects to the inverting input of the internal transmit amplifier, and the pin AIN1+ connects to
the non-inverting input of the internal transmit amplifier. The pin GSX1 (GSX2) connects to
output of the internal transmit amplifier. Gain adjustment should be referred to Fig. 1.
VFRO, AOUT+, AOUT–, PWI, SAO, RINGC
Used for the receive analog output and the output for receive gain adjustment. VFRO is an
output of the receive filter. AOUT+ and AOUT– are differential analog signal outputs which can
directly drive ZL = 350 W + 120 nF or the 1.2 kW load. Gain adjustment should be referred to Fig.
1.
The ORed signal with the control register data CR4-B5 and the external pin RINGC determines
the output pins (AOUT+ and AOUT- /SAO+ and SAO-) for the speech signal and an acoustic
component of the sounder tone, DTMF tone, R tone, F tone, various kinds of tones at either the
VFRO pin or the SAO pin.
AIN1–
–
VREF
C1
C1
R1
R1
Differential
Analog Input
R2
+
Vi
AIN1+
GSX1
R2
10 mF
SG
AIN2
+
0.1 mF
–
+
–
C2
R3
to ENCODER
R4
GSX2
VFRO
Transmit Gain: VGSX2/Vi
= (R2/R1) ¥ (R4/R3)
Receive Gain: Vo/VVFRO
= 2 ¥ (R6/R5)
from
DECODER
R5
R6
PWI
SELECT
–
+
AOUT–
from MCU INT.
Differential
Analog
ZL = 120 nF
VO
+ 350 W
Output
AOUT+
TOUT1
TOUT2
TOUT3
–1
SAO
+1
+
–
Sounder Output
Signal
RINGC
from MCU INT.
Figure 1 Analog Input/Output Interface
4/25
MSM7575
¡ Semiconductor
TOUT1, TOUT2, TOUT3
These are pins for outputs of the NOR gates whose inputs are the comparator output signal
between the SAO output level and the SG level, and each register signal stored by the MCU
interface.
The each output is NOR-gated with the comparator output and the invented signal of CR1-B7 at
TOUT3, the inverted signal of CR1-B6 at TOUT2, and the inverted signal of CR1-B5 at TOUT1.
AVIN, REF1, REF2
These pins are for inputs of two comparators internal to the device. AVIN is connected to each
non-inverting input of comparator1 and comparator2. REF1 is connected to an inverting input
of comparator1 and REF2 is connected to an inverting input of comparator2. The output of each
comparator is connected to the input of ENOR. The interval analog switch SW1 is ON/OFF
controlled by the output which is the logical OR of the ENOR and the CR5-B7 signal. When CR5-
B7 is at "0", the SW1 is turned to OFF if AVIN is within the voltage range of REF1 and REF2 and
the SW1 is turned to ON if AVIN is out of the voltage range of REF1 and REF2.
AIN3+, AIN3-, GSX3, AIN4+, AIN4-, GSX4
These pins are for inputs and outputs of the internal op-amps. Refer to BLOCK DIAGRAM for
the connection.
IO1 to IO14
These pins are for inputs and outputs of the internal analog switch. Refer to BLOCK DIAGRAM
and FUNCTIONAL DESCRIPTION for the connection and the control method.
X1, X2
Crystal oscillator connection pins. X2 is for the clock output pin. When a conventional external
clock is used, X1 should be connected to the ground, X2 should be left open, and the clock should
be input to the MCK pin.
For the use of a self-oscilation circut
MSM7575
For the use of an external clock
MSM7575
X1
X2 MCK
X1
X2 MCK
9.6 MHz or
19.2 MHz
9.6 MHz or
19.2 MHz
Figure 2 Connection to a Crystal Oscillator or an External Clock
5/25
MSM7575
¡ Semiconductor
SG, SGB
Analog signal ground output.
The output voltage is about 1.4 V. The bypass capacitors (10 µF in parallel with 0.1 µF ceramic
type) should be put between this pin and AG to get the specified noise characteristics. This
output voltage is 0 V during power-down.
AG
Analog ground.
DG
Digital ground.
This ground is separated from the analog signal ground(AG) in this device. The DG pin must be
kept as close to the AG pin possible on the PCB.
VDD
+3 V power supply.
PDN/RESET
Power down and reset control input.
“L” level makes the whole chip enter to power down state, and, at the same time, all of control
registerdataareresettotheinitialstate. Setthispinto “H”level duringnormaloperatingmode.
The power down state is controlled by a logical OR with CR0-B5 of the control register. When
using the pin PDN/RESET for the power down and reset control, CR0-B5 should be set to digital
“0”.
MCK
Master clock input.
The frequency must be 9.6 MHz or 19.2 MHz. The applied clock frequency is selected by the
control register data CR0-B6. The master clock signal is allowed to be asynchronous with BCLK,
XSYNC, and RSYNC.
PCMSO
Transmit PCM data output.
This PCM output signal is output from MSB in synchronization with the rising edge of BCLK or
XSYNC. A pull-up resistor must be connected to this pin, because this output is configuared as
an open drain.
During power down, this output is at high impedance state.
6/25
MSM7575
¡ Semiconductor
PCMRI
Receive PCM data input.
This PCM input signal is shifted on the falling edge of BCLK and input from MSB.
BCLK
Shift clock input for the PCM data (PCMSO, PCMRI).
The frequency is set in the range of 64 kHz to 2048 kHz.
XSYNC
8 kHz synchronous signal input for Transmit PCM data.
This signal should be synchronized with BCLK. XSYNC is used for indicating MSB of the
transmit serial PCM.
Be sure to input the XSYNC signal because it is also used as the input of the timing circuit and
the clock source of the tone generator.
RSYNC
8 kHz synchronous signal input for Receive PCM data.
This signal should be synchronized with BCLK signal. RSYNC is used for indicating the MSB
of the receive serial PCM.
BCLK
XSYNC
PCMSO
RSYNC
PCMRI
MSB
MSB
LSB
LSB
8kHz
(125ms)
Figure 3 PCM Interface Basic Timing Diagram
7/25
MSM7575
¡ Semiconductor
VOXO
Transmit VOX function signal output.
VOX function is to recognize the presence or absence of the transmit voice signal by detecting the
signal energy. “H” and “L” levels set to this pin correspond to the presence and the absence,
respectively. This result appears also at the register data CR7-B7. The signal energy detect
threshold is set by the control register data CR6-B6, B5.
VOXI
Signal input for receive VOX function.
The “H” level at VOXI indicates the presence of voice signal, the decoder block processes normal
receive signal, and the voice signal appears at analog output pins . The “L” level indicates the
absenceofvoicesignal, thebackgroundnoisegeneratedinthisdeviceistransferredtotheanalog
output pins. The background noise amplitude is set by the control register CR6. Because this
signal is ORed with the register data CR6-B3, the control register data CR6-B3 should be set to
digital “0”.
Voice Input
GSX2
(Absence)
VOXO
(Presence)
(Presence)
TVXOFF
Absence
Detect (Hang-over time)
TVXON
Presence
Detect
(a) Transmit VOX Function Timing Diagram
(Absence)
VOXI
(Presence)
(Presence)
Voice Output
VFRO
Background
Noise
Normal Voice Signal
Decoded Time period
(b) Receive VOX Function (CR6-B3: digital "0") Timing Diagram
Note: VOXO, VOXI function become valid when setting CR6-B7 to digital “1”.
Figure 4 VOX Function
8/25
MSM7575
¡ Semiconductor
DEN , EXCK, DIN, DOUT
Serial control ports for MCU interface. Reading and writing data is performed by an external
MCU through these pins. Total 8 registers with 8 bits are provided on the devices.
DEN is the “Enable” control signal input, EXCK is the data shift clock input, DIN is the address
and data input, and DOUT is the data output from which inverted data of the contents of the
register is output.
Fig.5 shows the input or output timing diagram.
DEN
EXCK
W
A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
DIN
DOUT
High Impedance
(a) Write Data Timing Diagram
DEN
EXCK
DIN
R
A2 A1 A0
DOUT
B7 B6 B5 B4 B3 B2 B1 B0
High Impedance
(b) Read Data Timing Diagram
Figure 5 MCU Interface Input/Output Timing
Register map is shown below.
Table-1
Address
Name
Control and Detect Data
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
A2 A1 A0
B7
A/m
B6
MCK
SEL
B5
PDN
ALL
B4
PDN
TX
B3
PDN
RX
B2
B1
B0
PDN
CR0
CR1
CR2
CR3
CR4
CR5
CR6
CR7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
—
LNR
SEL
SAO/AOUT
TOUT3
-CONT
TX
TOUT2 TOUT1
-CONT -CONT
—
—
—
—
RX PAD
TX
TX
TX
RX
RX
RX
RX
ON/OFF GAIN2
GAIN1
GAIN0 ON/OFF GAIN2
GAIN1
TONE
GAIN1
GAIN0
TONE
GAIN0
Side Tone Side Tone Side Tone TONE
TONE
TONE
GAIN2 GAIN1
GAIN0 ON/OFF GAIN3
SAO/
GAIN2
DTMF/
TONE
OTHERS
TONE4 TONE3 TONE2 TONE1 TONE0
SEND
SW8-
CONT
ON
VFRO
SW9-
SEL
SW7-
CONT
SW5&
SW4-
SW3-
CONT
SW2-
CONT
SW1-
CONT
CONT SW6-CONT CONT
VOX
ON
OFF
VOX RX NOISE RX NOISE RX NOISE
ON/OFF
LVL1
LVL0
TIME
IN
LEVEL SEL LVL1
LVL0
VOX TX NOISE TX NOISE
OUT LVL1 LVL0
—
—
—
—
—
R/W : Enable to read/write R : Read only register.
9/25
MSM7575
¡ Semiconductor
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Operating Temperature
Storage Temperature
Symbol
VDD
Condition
Rating
–0.3 to +5
Unit
V
—
—
—
—
—
VAIN
– 0.3 to VDD + 0.3
–0.3 to VDD + 0.3
–30 to +85
V
VDIN
Top
V
°C
°C
TSTG
–55 to +150
RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
Symbol
VDD
Condition
—
Min.
Typ.
—
Max.
Unit
V
+2.7
–25
+3.6
+70
Ta
+25
°C
Operating Temperature Range
—
MCK, XSYNC, RSYNC, PCMRI,
RINGC, BCLK, VOXI,
PDN/RESET, DEN, EXCK, DIN
MCK, XSYNC, RSYNC, PCMRI,
RINGC, BCLK, VOXI,
PDN/RESET, DEN, EXCK, DIN
MCK (CR0–B6 = "0")
MCK (CR0–B6 = "0")
BCLK
VIH
0.45 ¥ VDD
—
VDD
V
V
Input High Voltage
VIL
0
—
0.16 ¥ VDD
Input Low Voltage
fMCK1
fMCK2
fBCK
fSYNC
DC
–0.01%
9.600
+0.01% MHz
Master Clock Frequency
–0.01% 19.200 +0.01% MHz
Bit Clock Freqency
64
—
30
—
8.0
50
2048
—
kHz
kHz
%
Synchronous Signal Frequncy
Clock Duty Ratio
XSYNC, RSYNC
MCK, BCLK, EXCK
MCK, XSYNC, RSYNC, PCMRI,
RINGC, BCLK, VOXI,
PDN/RESET, DEN, EXCK, DIN
MCK, XSYNC, RSYNC, PCMRI,
RINGC, BCLK, VOXI,
PDN/RESET, DEN, EXCK, DIN
BCLK to XSYNC
70
tIr
Digital Input Rise Time
Digital Input Fall Time
—
—
—
—
50
50
ns
ns
tIf
tXS
tSX
100
100
—
—
—
—
—
—
—
—
—
—
—
—
100
—
—
—
ns
ns
ns
ns
ms
ns
ns
W
Transmit Sync Signal Setting Time
Receive Sync Signal Setting Time
XSYNC to BCLK
tRS
tSR
tWS
tDS
tDH
RDL
BCLK to RSYNC
100
RSYNC to BCLK
100
Synchronous Signal Width
PCM Set-up Time
XSYNC, RSYNC
1 BCLK
100
—
PCM Hold Time
—
100
PCMSO (Pull-up Resistor)
TOUT1, TOUT2, TOUT3,
PCMSO, VOXO, DOUT
SG to AG
500
Digital Output Load
CDL
CSG
—
—
—
100
—
pF
Bypass Capacitors for SG
10 + 0.1
mF
10/25
MSM7575
¡ Semiconductor
ELECTRICAL CHARACTERISTICS
DC and Digital Interface Characteristics
(VDD = 2.7 V to 3.6 V, Ta = –25°C to +70°C)
Parameter
Symbol
IDD1
IDD2
VIH
Condition
Operating Mode,
Min.
—
Typ.
8
Max.
6
Unit
mA
mA
V
3.0 V)
=
(VDD
Power Down Mode,
Power Supply Current
3.0 V)
(VDD
=
—
0.01
—
—
—
—
—
—
0.2
—
5
0.1
Input High Voltage
Input Low Voltage
—
—
0.45¥VDD
0.0
VDD
0.16¥VDD
2.0
VIL
V
IIH
VI = VDD
—
mA
mA
V
Input Leakage Current
Output High Voltage
IIL
VI = 0 V
—
0.5
IOH = 0.4 mA
IOH = 1 mA
0.5 ¥ VDD
0.8 ¥ VDD
0.0
VDD
VDD
0.4
VOH
V
Output Low Voltage
Output Leakage Current
Input Capacitance
VOL 1 LSTTL, Pull-up: 500 W
V
IO
PCMSO
—
10
mA
pF
kW
CIN
—
—
—
Output Resistance
ROSG SG
—
25
50
Transmit Analog Interface Characteristics
(VDD = 2.7 V to 3.6 V, Ta = –25°C to +70°C)
Parameter
Input Resistance
Symbol
Condition
Min.
10
Typ.
—
Max.
—
Unit
MW
kW
RINX AIN1+ , AIN1– , AIN2
RLGX GSX1, GSX2
Output Load Resistance
Output Load Capacitance
Output Amplitude
20
—
—
CLGX GSX1, GSX2
—
—
100
pF
VOGX GSX1, GSX2, RL = 20 kW
VOFGX Pre–OPAMPs
—
—
1.30 (*1) VPP
Input Offset Voltage
–20
—
20
mV
*1 –7.7 dBm (600 W) = 0 dBm0, + 3.17 dBm0 = 1.30 V (m-law Selected)
PP
11/25
MSM7575
¡ Semiconductor
Receive Analog Interface Characteristics
(VDD = 2.7 V to 3.6 V, Ta = –25°C to +70°C)
Parameter
Input Resistance
Symbol
Condition
PWI, AIN3+/–, AIN4+/–, REF1,
REF2, AVIN
Min.
Typ.
Max.
Unit
RINPW
10
—
—
MW
RLVF VFRO, SAO
20
1.2
—
—
—
—
—
—
—
—
—
—
—
—
kW
kW
pF
Output Load Resistance
Output Load Capacitance
RLAO AOUT+, AOUT–, GSX3, GSX4
CLVF VFRO, SAO
100
100
CLAO AOUT+, AOUT–, GSX3, GSX4
VOVF VFRO, SAO RL = 20 kW
pF
1.30 (*1) VPP
1.30 (*1) VPP
AOUT+,
AOUT–,
GSX3,
GSX4
RL = 1.2 kW
Output Voltage Level
VOAO
ZL = 350 kW
—
—
—
—
—
1.30 (*1) VPP
+ 120 nF(See Fig.1)
VOFVF VFRO, SAO
–100
–20
100
20
mV
mV
—
Offset Voltage
AOUT+, AOUT– (Gain = 0 dB,
Power amp only) GSX3, GSX4
VOFAO
Comparator Input Voltage Range
Analog Switch "ON" Resistance
GDB AVIN, REF1, REF2
IO1-IO2, IO3-IO4, IO5-IO6,
0.85
VDD–0.75
RSW IO7-IO8, IO9-IO10, IO10-IO11,
IO12-VDD, IO13-VDD, IO14-VDD
100
—
400
W
*1 –7.7 dBm (600 W) = 0 dBm0, + 3.17 dBm0 = 1.30 V (m-law Selected)
PP
12/25
MSM7575
¡ Semiconductor
AC Chracteristics
(VDD = 2.7 V to 3.6 V, Ta = –25°C to +70°C)
Condition
Level
Parameter
Symbol
Freq.
(Hz)
Min.
Typ.
Max.
Unit
Others
(dBm0)
LOSS T1
0 to 60
25
—
—
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
LOSS T2 300 to 3000
–0.15
—
0.20
Transmit Frequency
Response
LOSS T3
LOSS T4
LOSS T5
LOSS T6
1020
3300
Reference
0
0
—
–0.15
0
—
0.80
0.80
—
3400
—
3968.75
13
—
LOSS R1 0 to 3000
–0.15
—
0.20
LOSS R2
LOSS R3
LOSS R4
LOSS R5
SD T1
SD T2
SD T3
SD T4
SD T5
SD R1
SD R2
SD R3
SD R4
SD R5
GT T1
GT T2
GT T3
GT T4
GT T5
GT R1
GT R2
GT R3
GT R4
GT R5
1020
3300
Reference
Receive Frequency
Responce
—
(*2)
(*2)
—
–0.15
0
—
0.80
0.80
—
3400
—
3968.75
13
—
3
35
—
—
0
35
—
—
Transmit Signal
1020
1020
1020
1020
–30
–40
–45
3
35
—
—
to Distortion Ratio
28
—
—
23
—
—
35
—
—
0
35
—
—
Receive Signal
–30
–40
–45
3
35
—
—
to Distortion Ratio
28
—
—
23
—
—
–0.2
—
0.2
–10
–40
–50
–55
3
Reference
Transmit Gain
Tracking
–0.2
–0.5
–1.2
–0.2
—
0.2
0.5
1.2
0.2
—
—
—
–10
–40
–50
–55
Reference
—
Receive Gain
Tracking
—
–0.2
–0.5
–1.2
0.2
0.5
1.2
–68
—
—
NIDLT
NIDLR
AVT
—
—
AIN = SG
—
(*2)
—
—
—
—
(–75.7) dBmOp
Idle Channel Noise
(*2)
(*3)
–72
(dBmp)
(–79.7)
0.320
(*4)
GSX2 0.285
VFRO 0.285
0.359 Vrms
0.359 Vrms
Absolute Signal
Amplitude
1020
0
0.320
(*4)
AVR
13/25
MSM7575
¡ Semiconductor
AC Characteristics (Continued)
(VDD = 2.7 V to 3.6 V, Ta = –25°C to +70°C)
Condition
Level
Parameter
Symbol
Freq.
(Hz)
Min.
Typ.
Max.
Unit
Others
(dBm0)
PSRRT Noise Freq.
PSRRR : 0 to 50 kHz
Noise Level
: 50 mVPP
30
30
—
—
—
—
dB
dB
Power Supply Noise
Rejection Ratio
—
200
*5(100)
200
*5(100)
200
*5(100)
200
*5(100)
—
tSDX
0
0
0
0
—
—
—
—
ns
ns
ns
ns
tXD1
Digital Input/Output
Setting Time
1LSTTL + 100 pF See
—
pull-up: 500 W Fig.4
tXD2
tXD3
tM1
tM2
tM3
tM4
tM5
50
50
50
50
100
50
50
0
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
—
—
ns
—
ns
Serial Port Digital
Input/Output Setting
Time
—
ns
See
CLoad = 100 pF
Fig.7
tM6
tM7
—
—
—
ns
—
ns
tM8
50
ns
tM9
50
50
0
—
ns
tM10
tM11
FEXCK
—
ns
50
ns
Shift Clock Frequency
—
EXCK
—
10
MHz
*2 Use the P-message weighted filter
*3 PCMRI input code "11010101"(A-law)
"11111111"(m-law)
*4 0.320 Vrms = 0 dBm0 = –7.7 dBm
*5 Value in ( ) is for C
= 10 pF Pull-up £ 20 kW
Load
Note: All ADPCM coder and decoder characteristics comply with ITU-T Recommendation
G.721.
14/25
MSM7575
¡ Semiconductor
AC Characteristics (DTMF and Other Tones)
(VDD = 2.7 V to 3.6 V, Ta = –25°C to +70°C)
Parameter
Symbol
Condition
Min.
–7
Typ.
—
Max. Unit
DFT1 DTMF Tones
DFT2 Other Tones
+7
+7
Hz
Hz
Frequency Difference
–7
—
VTL
–18
–16
–14
dBm0
DTMF (Low)
DTMF (High)
and Other Tones
DTMF (Low)
Transmit
Tones
VTH
VRL
VRH
–16
–4
–14
–2
0
–12
0
dBm0
dBm0
dBm0
Original (reference)
Tone Signal Level
*6
Receive
Tones
DTMF (High)
–2
+2
and Other Tones
Relative Level of
DTMF Tones
RDTMF VTH/VTL, VRH/VRL
+1
+2
+3
dBm0
*6 Not contain the setting value of the programmable gain
AC Characteristics (Programmable Gain Stages)
(VDD = 2.7 V to 3.6 V, Ta = –25°C to +70°C)
Parameter
Gain Accuracy
Symbol
Condition
Min.
Typ.
Max. Unit
+1 dB
DG
All gain stages, to programmed value
–1
0
AC Characteristics (VOX Function)
(VDD = 2.7 V to 3.6 V, Ta = –25°C to +70°C)
Parameter
Symbol
Condition
VOXO,
Fig.4
Min.
Typ.
Max. Unit
ms
Transmit VOX Detect Time tVXON OFF Æ ON
—
5
—
(Voice signal ON/OFF detect time
Transmit VOX Detect Level
Accuracy
)
tVXOF ON Æ OFF
150/310 160/320 170/330 ms
To the setting of detect level
by CR6-B6, B5.
D
VX
–2.5
0
+2.5
dB
(Threshold Level)
15/25
MSM7575
¡ Semiconductor
TIMING DIAGRAM
Transmit Side PCM Data Interface
0
1
2
3
4
5
6
7
8
9
10
BCLK
tSX
tWS
tXS
XSYNC
PCMSO
tXD1
tXD2
tXD3
LSB
MSB
tSDX
Receive Side PCM Data Interface
0
1
2
3
4
5
6
7
8
9
10
BCLK
tSR
tWS
tDH
tRS
RSYNC
PCMRI
tDS
MSB
LSB
Figure 6 PCM Data Interface
16/25
MSM7575
¡ Semiconductor
Serial Port Data Transfer for MCU Interface
DEN
tM10
tM5
tM2
EXCK
1
2
3
4
5
6
11
12
tM6
tM7
tM9
tM1
tM3
tM4
DIN
W/R
A2
A1
A0
B7
B1
B1
B0
B0
tM11
tM8
B7
DOUT
Figure 7 MCU Interface
17/25
MSM7575
¡ Semiconductor
FUNCTIONAL DESCRIPTION
Control Registers
(1) CR0 (Basic operating mode)
B7
B6
B5
B4
B3
PDN RX
0
B2
—
0
B1
LNR
0
B0
PDN
CR0
A/m SEL MCK SEL PDN ALL PDN TX
SAO/AOUT
0
Initial Value
0
0
0
0
Note) "Initial": Reset state by PDN/RESET
B7 ...PCM Companding law select:
B6 ...Master clock frequency select:
B5 ...Power down (whole system):
0/µ-law, 1/A-law
0/9.600 MHz, 1/19.200 MHz
0/Power on, 1/Power down
When using this data for power down control, pin PDN/RESET should be set at
“H”level. The control registers are not reset by this signal.
B4 ...Power down (Transmit only):
0/Power on, 1/Power down
B3 ...Power down (Receive only including the op-amps of GSX3, GSX4 and comparator): 0/
Power on, 1/Power down
B2 ...Not used
B1 ...PCM interface linear code select:
0/Companding law selected by CR0-B7
1/14-bit Linear code (2's complement) in spite of the value of CR0-B7
B0 ...Power Down for Sounder output amps: (SAO), or Receiver output amp (AOUT, VFRO ):
When this data is set to digital “1”, the circut which is not selected by CR4-B5 are at the
power down state.
When this data is set to digital "0", sounder amplifiers and receiver amplifiers are in the
power-on state.
18/25
MSM7575
¡ Semiconductor
(2) CR1
B7
B6
TOUT2
–CONT
0
B5
TOUT1
–CONT
0
B4
—
0
B3
—
0
B2
—
0
B1
—
0
B0
RX PAD
0
TOUT3
CR1
–CONT
Initial Value
0
B7 ... TOUT3 control bit :
0/TOUT3 = "0", 1/Enable TOUT3
B6 ... TOUT2 control bit :
0/TOUT2 = "0", 1/Enable TOUT2
B5 ... TOUT1 control bit :
0/TOUT1 = "0", 1/Enable TOUT1
B4 ... Not used
B3 ... Not used
B2 ... Not used
B1 ... Not used
B0 ... Receive side PAD : 1/inserted,12 dB loss
0/no PAD
19/25
MSM7575
¡ Semiconductor
(3)CR2 (PCM CODEC operational mode setting and transmit/receive gain adjustment)
B7
B6
B5
B4
B3
B2
B1
B0
CR2
TX ON/OFF TX GAIN2 TX GAIN1 TX GAIN0 RX ON/OFF RX GAIN2 RX GAIN1 RX GAIN0
Initial Value
0
0
1
1
0
0
1
1
B7 ... PCM Coder disable :
0/Enable, 1/Disable (transmit PCM idle pattern)
B6, B5, B4 ... Transmit gain adjustment, refer to Table-2.
B3 ... PCM Decoder disable :
0/Enable, 1/Disable (receive PCM idle pattern)
B2, B1, B0 ... Receive gain setting, refer to Table-2.
Table-2 Transmit/Receive Gain Setting table
B6
0
B5
0
B4
0
Transmit Gain
–6 dB
B2
0
B1
0
B0
0
Receive Gain
–6 dB
0
0
1
–4 dB
0
0
1
–4 dB
0
1
0
–2 dB
0
1
0
–2 dB
0
1
1
0 dB
0
1
1
0 dB
1
0
0
+2 dB
1
0
0
+2 dB
1
0
1
+4 dB
1
0
1
+4 dB
1
1
0
+6 dB
1
1
0
+6 dB
1
1
1
+8 dB
1
1
1
+8 dB
Thisprogrammablegaintableshouldbeassigned,notonlyfortransmit/receivevoicesignal,but
also for the transmitted DTMF and other tones. The transmission of these tone signals are
enabled, by the CR4-B6 data described later, The original (reference) signal amplitude of these
tones are analogically defined as follows.
DTMF low-group-tones.................................... –16 dBm0/Tone
DTMF high-group-tones and others............... –14 dBm0/Tone
For example, when selecting +8 dB (B6, B5, B4) = (1,1,1) as a transmit gain, each tone signal
amplitude with analogical expression on the pin PCMSO becomes as follows .
DTMF low-group tones .................................... –8 dBm0
DTMF high-group tones and other tones ...... –6 dBm0
Gain setting of side tone (path to receive side from transmit side) and receive side tone is
performed by register CR3.
20/25
MSM7575
¡ Semiconductor
(4) CR3 (Side tone and other tone generator gain setting)
B7
B6
B5
B4
TONE
ON/OFF
0
B3
TONE
GAIN3
0
B2
TONE
GAIN2
0
B1
TONE
GAIN1
0
B0
TONE
GAIN0
0
Side. Tone Side. Tone Side. Tone
CR3
GAIN2
0
GAIN1
0
GAIN0
0
Initial Value
B7, B6, B5 ... Side tone path gain setting, refer to Table-3.
B4 ... Tone generator enable : 0/Disable, 1/Enable
B3, B2, B1, B0 ... Tone generator gain adjustment for receive side, refer to Table-4
Table-3 Side Tone Gain Setting Table
B7
0
B6
0
B5
0
Side Tone Path Gain
OFF
0
0
1
–21 dB
–19 dB
–17 dB
–15 dB
–13 dB
–11 dB
–9 dB
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Table-4 Receive Tone Generator Gain Setting Table
B3
0
B2
0
B1
0
B0 Tone Generator Gain B3
B2
0
B1
0
B0 Tone Generator Gain
0
1
0
1
0
1
0
1
–36 dB
–34 dB
–32 dB
–30 dB
–28 dB
–26 dB
–24 dB
–22 dB
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
1
–20 dB
–18 dB
–16 dB
–14 dB
–12 dB
–10 dB
–8 dB
0
0
0
0
0
0
0
1
0
1
0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
0
1
1
1
1
0
1
1
1
1
–6 dB
The tone generator gain setting table for receive side, shown by Table-4, depends upon the
following reference level.
DTMF low-group tones ................................ –2 dBm0
DTMF high-group tones and others ............ 0 dBm0
Forexample,whenselecting–6dB(B3,B2,B1,B0)=(1,1,1,1)asatonegeneratorgain,eachDTMF
tone signal amplitude on SAO or VFRO is as follows.
DTMF low-group tone..................................–8 dBm0
DTMF high-group tone or other tones ....... –6 dBm0
21/25
MSM7575
¡ Semiconductor
(5) CR4 (Tone genereator operating mode and frequency setting)
B7
DTMF/OTHERS
SEL
B6
TONE
SEND
0
B5
SAO/
VFRO
0
B4
B3
B2
B1
B0
TONE4
TONE3
TONE2
TONE1
TONE0
CR4
Initial Value
0
0
0
0
0
0
B7 ... DTMF or Other tones select : 0/Others, 1/DTMF
B6 ... Tone transmit enable (Transmit side) : 0/Voice signal (transmit), 1/Tone transmit
B5 ... Tone output pin select (Receive side) : 0/VFRO, 1/SAO
B4, B3, B2, B1, B0 ... Tone frequency setting, referred to Table-5-1, -2.
(a) B7 = 1 (DTMF tone)
Table-5-1
B4 B3 B2 B1 B0
Frequency
B4 B3 B2 B1 B0
Frequency
*
*
*
*
*
*
*
*
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
697 Hz + 1209 Hz
697 Hz + 1336 Hz
697 Hz + 1477 Hz
697 Hz + 1633 Hz
770 Hz + 1209 Hz
770 Hz + 1336 Hz
770 Hz + 1477 Hz
770 Hz + 1633 Hz
*
*
*
*
*
*
*
*
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
852 Hz + 1209 Hz
852 Hz + 1336 Hz
852 Hz + 1477 Hz
852 Hz + 1633 Hz
941 Hz + 1209 Hz
941 Hz + 1336 Hz
941 Hz + 1477 Hz
941 Hz + 1633 Hz
*Unrelated
(b) B7 = 0 (Other tones)
Table-5-2 Tone Generator Frequency Setting
B4 B3 B2 B1 B0
Frequency
2 k/2.48 kHz, 8 Hz wamble
2 k/2.2 kHz, 8 Hz wamble
2 k/2.48 kHz, 4 Hz wamble
2 k/2.2 kHz, 4 Hz wamble
1 k/1.333 kHz, 8 Hz wamble
2.73 k/2.5 kHz, 8 Hz wamble
1.8 k/2 kHz, 8 Hz wamble
400 Hz,16 Hz wamble
400 Hz,20 Hz wamble
400 Hz
B4 B3 B2 B1 B0
Frequency
2000 Hz
2042 Hz
2514 Hz
500 Hz
667 Hz
1333 Hz
2100 Hz
—
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
—
—
350 Hz + 440 Hz Mix
1.5kHz
—
—
1.8kHz
—
800 Hz
—
1000 Hz
—
1300 Hz
—
22/25
MSM7575
¡ Semiconductor
Wamble Tone Wave
t
Repeatative waveform
Tf1
Tf2
4Hz wamble... Tf1 = Tf2 = 125 ms
8Hz wamble... Tf1 = Tf2 = 62.5 ms
16Hz wamble...Tf1 = Tf2 = 31.25 ms
20Hz wamble...Tf1 = Tf2 = 25 ms
(6) CR5 (Analog switch control)
B7
SW7_
CONT
0
B6
SW8_
CONT
0
B5
B4
B3
B2
SW3_
CONT
0
B1
SW2_
CONT
0
B0
SW1_
CONT
0
SW9_ SW5&SW6_ SW4_
CR5
CONT
0
CONT
0
CONT
0
Initial Value
B7 ... Control Analog switch SW7 between IO12 and V
0/SW7 OFF, 1/SW7 ON
B6 ... Control Analog switch SW8 between IO13 and V
0/SW8 OFF, 1/SW8 ON
B5 ... Control Analog switch SW9 between IO14 and V
0/SW9 OFF, 1/SW9 ON
:
DD
DD
DD
:
:
B4 ... Control Analog switch SW5 between IO9 and IO10, and Analog switch SW6 between IO10
and IO11 :
0/SW5 OFF, SW6 ON, 1/SW5 ON, SW6 OFF
B3 ... Control Analog switch SW4 between IO7 and IO8 :
0/SW4 OFF, 1/SW4 ON
B2 ... Control Analog switch SW3 between IO5 and IO6 :
0/SW3 OFF, 1/SW3 ON
B1 ... Control Analog switch SW2 between IO3 and IO4 :
0/SW2 OFF, 1/SW2 ON
B0 ... Control Analog switch SW1 between IO1 and IO2 :
0/SW1 OFF, 1/SW1 ON
23/25
MSM7575
¡ Semiconductor
(7) CR6 (VOX function control)
B7
VOX
ON/OFF
0
B6
B5
ON
B4
OFF
TIME
0
B3
B2
B1
B0
ON
LVL1
0
VOX IN RX NOISE RX NOISE RX NOISE
CR6
LVL0
0
LEVEL SEL
0
LVL1
0
LVL0
0
Initial Value
0
B7 ... VOX function enable :
0/Disable, 1/Enable
B6, B5 ... Transmit signal energy detect (Transmit VOX) threshold
(0, 0): –30 dBm0
(0, 1): –35 dBm0
(1, 0): –40 dBm0
(1, 1): –45 dBm0
B4 ... Hang-over time (Fig. 2, T
:
0/160 ms, 1/320 ms
0/Background noise transmit, 1/Voice signal detect
When using this data for control, the pin VOXI should be set at a “L” level.
VXOFF)
B3 ... Receive VOX function setting :
B2 ... Background noise amplitude setting :
0/Automatic, 1/Programmable by B1 and B0
Automatic : The noise is set at the voice signal amplitude at the time when B3
(or VOXI) changes from “1” to digital “0”.
B1, B0 ... (0, 0):
(0, 1):
No noise
–55 dBm0
–45 dBm0
–35 dBm0
(1, 0):
(1, 1):
(8) CR7 (Detect register, read only)
B7
VOX
OUT
0
B6
B5
B4
B3
B2
B1
B0
TX NOISE TX NOISE
—
—
—
—
—
CR7
LVL1
0
LVL0
0
Initial
*
*
*
*
*
For IC test
*
B7 ... Transmit VOX function result :
0/Absence, 1/Presence
B6, B5 ... Transmit voiceless level (indicator) :
(0, 0) : below –60 dBm0
(0, 1) : –50 to –60 dBm0
(1, 0) : –40 to –50 dBm0
(1, 1) : over –40 dBm0
B4 ... Not used
Note)TheseoutputsarevalidonlywhenVOX
function is enabled by CR6-B7.
B3 ... Not used
B2 ... Not used
B1 ... Not used
B0 ... Not used
24/25
MSM7575
¡ Semiconductor
PACKAGE DIMENSIONS
QFP64-P-1414-0.80-BK
(Unit : mm)
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.87 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
25/25
E2Y0002-29-62
NOTICE
1.
The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.
2.
The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit, assembly, and program designs.
3.
4.
When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.
Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.
5.
6.
Neither indemnity against nor license of a third party’s industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or the information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party’s right which may result from the use thereof.
The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety
devices, aerospace equipment, nuclear power control, medical equipment, and life-support
systems.
7.
Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
thelegalityofexportoftheseproductsandwilltakeappropriateandnecessarystepsattheir
own expense for these.
8.
9.
No part of the contents contained herein may be reprinted or reproduced without our prior
permission.
MS-DOS is a registered trademark of Microsoft Corporation.
Copyright 1999 Oki Electric Industry Co., Ltd.
Printed in Japan
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