PHN103T [NXP]

TRANSISTOR 8600 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, PLASTIC, SO-8, FET General Purpose Small Signal;
PHN103T
型号: PHN103T
厂家: NXP    NXP
描述:

TRANSISTOR 8600 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, PLASTIC, SO-8, FET General Purpose Small Signal

开关 光电二极管 晶体管
文件: 总12页 (文件大小:98K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PHN103T  
N-channel enhancement mode field-effect transistor  
Rev. 02 — 28 April 2004  
Product data  
1. Product profile  
1.1 Description  
N-channel enhancement mode field-effect transistor in a plastic package using  
TrenchMOS™ technology.  
1.2 Features  
TrenchMOS™ technology  
Low on-state resistance  
Fast switching  
Logic level compatible.  
1.3 Applications  
Motor driver  
Actuator driver  
Battery management  
High speed, low resistance switch.  
1.4 Quick reference data  
Table 1:  
Quick reference data  
Symbol Parameter  
Conditions  
Typ Max Unit  
VDS  
ID  
drain-source voltage (DC)  
25 °C Tj 150 °C  
Tsp = 25 °C; VGS = 4.5 V  
Tsp = 25 °C  
-
30  
V
A
drain current (DC)  
-
8.6  
Ptot  
Tj  
total power dissipation  
junction temperature  
-
6.25 W  
-
150 °C  
RDSon  
drain-source on-state resistance VGS = 10 V; ID = 5 A  
VGS = 4.5 V; ID = 2.5 A  
20  
30  
30  
50  
mΩ  
mΩ  
2. Pinning information  
Table 2:  
Pin  
Pinning - SOT96-1 (SO8), simplified outline and symbol  
Description  
source (s)  
gate (g)  
Simplified outline  
Symbol  
1,2,3  
4
d
s
8
5
5,6,7,8  
drain (d)  
g
1
4
MBB076  
Top view  
MBK187  
SOT96-1 (SO8)  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
3. Ordering information  
Table 3:  
Ordering information  
Type number  
Package  
Name  
SO8  
Description  
Plastic small outline package; 8 leads  
Version  
PHN103T  
SOT96-1  
4. Limiting values  
Table 4:  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
Unit  
VDS  
VDGR  
VGS  
ID  
drain-source voltage (DC)  
25 °C Tj 150 °C  
-
30  
V
drain-gate voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
25 °C Tj 150 °C; RGS = 20 kΩ  
-
30  
V
-
±20  
8.6  
V
Tsp = 25 °C; VGS = 4.5 V; Figure 2 and 3  
Tsp = 100 °C; VGS = 4.5 V; Figure 2  
Tsp = 25 °C; pulsed; tp 10 µs; Figure 3  
Tsp = 25 °C; Figure 1  
-
A
-
5.4  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
-
34  
A
total power dissipation  
storage temperature  
junction temperature  
-
6.25  
+150  
+150  
W
°C  
°C  
65  
65  
Source-drain diode  
IS  
source (diode forward) current (DC) Tsp = 25 °C  
-
-
7
A
A
ISM  
peak source (diode forward) current Tsp = 25 °C; pulsed; tp 10 µs  
34  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
2 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03aa17  
03aa25  
120  
120  
Ider  
Pder  
(%)  
(%)  
80  
40  
0
80  
40  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
Tsp ( C)  
Tsp ( C)  
°
°
Ptot  
ID  
Pder  
=
× 100%  
Ider  
=
× 100%  
-----------------------  
-------------------  
P
I
°
°
tot(25 C)  
D(25 C)  
Fig 1. Normalized total power dissipation as a  
function of solder point temperature.  
Fig 2. Normalized continuous drain current as a  
function of solder point temperature.  
03ac24  
2
10  
I
D
(A)  
Limit R  
= V  
/ I  
DS D  
t
p
= 10 s  
µ
DSon  
100  
s
µ
10  
1 ms  
10 ms  
DC  
1
100 ms  
-1  
10  
-1  
10  
2
10  
1
10  
V
(V)  
DS  
Tsp = 25 °C; IDM is single pulse.  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
3 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
5. Thermal characteristics  
Table 5: Thermal characteristics  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
Rth(j-sp) thermal resistance from junction to solder point Figure 4  
-
-
-
20  
K/W  
K/W  
Rth(j-a)  
thermal resistance from junction to ambient  
mounted on a printed-circuit board;  
minimum footprint  
150 -  
5.1 Transient thermal impedance  
03ac22  
2
10  
Z
th(j-sp)  
(K/W)  
= 0.5  
δ
10  
0.2  
0.1  
0.05  
1
0.02  
t
p
single pulse  
P
δ =  
-1  
T
10  
t
t
p
T
-2  
10  
-5  
10  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
1
10  
t
p
(s)  
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
4 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
6. Characteristics  
Table 6:  
Characteristics  
Tj = 25 °C unless otherwise specified.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
Static characteristics  
V(BR)DSS drain-source breakdown voltage  
ID = 10 µA; VGS = 0 V  
Tj = 25 °C  
30  
27  
43  
-
-
-
V
V
Tj = 55 °C  
VGS(th)  
gate-source threshold voltage  
drain-source leakage current  
ID = 1 mA; VDS = VGS; Figure 9  
Tj = 25 °C  
1
2
-
2.8  
-
V
V
V
Tj = 150 °C  
0.6  
-
Tj = 55 °C  
-
3.5  
IDSS  
VDS = 24 V; VGS = 0 V  
Tj = 25 °C  
-
-
-
10  
-
100  
10  
nA  
µA  
nA  
Tj = 150 °C  
IGSS  
gate-source leakage current  
VGS = ±20 V; VDS = 0 V  
VGS = 10 V; ID = 5 A; Figure 7 and 8  
Tj = 25 °C  
10  
100  
RDSon  
drain-source on-state resistance  
-
20  
30  
mΩ  
VGS = 4.5 V; ID = 2.5 A; Figure 8  
Tj = 25 °C  
-
-
30  
-
50  
85  
mΩ  
mΩ  
Tj = 150 °C  
Dynamic characteristics  
gfs  
forward transconductance  
VDS = 5 V; ID = 5.5 A; Figure 11  
-
-
-
-
-
-
-
-
-
-
-
-
-
12  
-
S
Qg(tot)  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
gate-source charge  
gate-drain (Miller) charge  
input capacitance  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
rise time  
ID = 5 A; VDS = 15 V; VGS = 10 V; Figure 14  
24  
40  
nC  
nC  
nC  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
ns  
ns  
3.3  
7.4  
770  
265  
180  
8
-
-
VGS = 0 V; VDS = 24 V; f = 1 MHz;  
Figure 12  
-
-
-
VDD = 15 V; RD = 15 ;  
VGS = 10 V; RG = 6 Ω  
-
10  
-
ton  
turn-on time  
18  
35  
td(off)  
tf  
turn-off delay time  
fall time  
24  
-
20  
-
toff  
turn-off time  
44  
150  
Source-drain diode  
VSD  
trr  
source-drain (diode forward) voltage IS = 1.25 A; VGS = 0 V; Figure 13  
-
-
-
0.73 1.0  
V
reverse recovery time  
recovered charge  
IS = 1.25 A; dIS/dt = 100 A/µs;  
VGS = 0 V; VDS = 25 V  
120  
150  
-
-
ns  
nC  
Qr  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
5 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03ac25  
03ac27  
20  
20  
10 V 5 V  
V
> I x R  
D
T = 25 C  
°
DS  
DSon  
j
I
I
D
D
(A)  
(A)  
15  
15  
10  
5
10  
5
3.4 V  
3.2 V  
3 V  
150 C  
T = 25 C  
°
j
°
2.8 V  
V
= 2.6 V  
GS  
0
0
0
0.5  
1
1.5  
2
0
1
2
3
4
5
V
(V)  
DS  
V
(V)  
GS  
Tj = 25 °C  
Tj = 25 °C and 150 °C; VDS > ID × RDSon  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 6. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
03aa27  
2
03ac26  
0.2  
V
= 3.4 V  
2.8 V 3 V 3.2 V  
GS  
T = 25 C  
°
R
j
a
DSon  
(
)
1.5  
0.15  
0.1  
0.05  
0
1
0.5  
0
5 V  
10 V  
0
5
10  
15  
20  
-60  
0
60  
120  
180  
T ( C)  
°
I
D
(A)  
j
Tj = 25 °C  
RDSon  
a =  
----------------------------  
RDSon(25 C)  
°
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 8. Normalized drain-source on-state resistance  
factor as a function of junction temperature.  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
6 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03aa34  
03aa37  
2.4  
10-1  
ID  
VGS(th)  
(A)  
(V)  
typ  
10-2  
10-3  
1.8  
min  
typ  
1.2  
0.6  
0
min  
10-4  
10-5  
10-6  
-60  
0
60  
120  
180  
0
0.6  
1.2  
1.8  
2.4  
T ( C)  
VGS (V)  
°
j
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = 5 V  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage.  
03ac28  
03ac30  
4
16  
10  
g
fs  
(S)  
C
(pF)  
T = 25 C  
°
j
150 C  
°
12  
8
3
10  
C
iss  
4
C
C
oss  
rss  
V
> I x R  
D
DS  
DSon  
20  
2
10  
0
-1  
2
10  
0
5
10  
15  
10  
1
10  
I
(A)  
VDS (V)  
D
Tj = 25 °C and 150 °C; VDS > ID × RDSon  
VGS = 0 V; f = 1 MHz  
Fig 11. Forward transconductance as a function of  
drain current; typical values.  
Fig 12. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values.  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
7 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
03ac29  
03ac31  
20  
15  
V
= 0 V  
I
= 5 A  
GS  
D
I
S
V
GS  
(V)  
(A)  
V
= 15 V  
DS  
15  
T = 25 C  
°
j
10  
10  
5
5
0
150 C  
°
T = 25 C  
°
j
0
0
0.3  
0.6  
0.9  
1.2  
0
10  
20  
30  
40  
V
(V)  
Q (nC)  
G
SD  
Tj = 25 °C and 150 °C; VGS = 0 V  
ID = 5 A; VDS = 15 V  
Fig 13. Source (diode forward) current as a function of  
source-drain (diode forward) voltage; typical  
values.  
Fig 14. Gate-source voltage as a function of gate  
charge; typical values.  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
8 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
7. Package outline  
SO8: plastic small outline package; 8 leads; body width 3.9 mm  
SOT96-1  
D
E
A
X
v
c
y
H
M
A
E
Z
5
8
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
4
e
w
M
detail X  
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(2)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
5.0  
4.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.05  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.20  
0.014 0.0075 0.19  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches 0.069  
0.01 0.004  
Notes  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT96-1  
076E03  
MS-012  
Fig 15. SOT96-1 (SO8).  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
9 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
8. Revision history  
Table 7:  
Revision history  
CPCN  
Rev Date  
Description  
02 20040428  
-
Product data (9397 750 13185)  
Modifications  
Updated to latest standard.  
Section 3 “Ordering information” added.  
Section 6 “Characteristics” RDSon conditions corrected.  
Product specification (9397 750 07304)  
Converted from VDMOS (Nijmegen) to TrenchMOS™ technology (Hazel Grove).  
01 20000828 HZG336  
9397 750 13185  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 02 — 28 April 2004  
10 of 12  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
9. Data sheet status  
Level Data sheet status[1]  
Product status[2][3]  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
10. Definitions  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
licence or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
12. Trademarks  
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.  
11. Disclaimers  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
Contact information  
For additional information, please visit http://www.semiconductors.philips.com.  
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
11 of 12  
9397 750 13185  
Product data  
Rev. 02 — 28 April 2004  
PHN103T  
N-channel enhancement mode field-effect transistor  
Philips Semiconductors  
Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
1.4  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Transient thermal impedance . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
3
4
5
5.1  
6
7
8
9
10  
11  
12  
© Koninklijke Philips Electronics N.V. 2004.  
Printed in The Netherlands  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
liability will be accepted by the publisher for any consequence of its use. Publication  
thereof does not convey nor imply any license under patent- or other industrial or  
intellectual property rights.  
Date of release: 28 April 2004  
Document order number: 9397 750 13185  

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NXP

PHN105-TAPE-7

TRANSISTOR 4.8 A, 20 V, 0.05 ohm, N-CHANNEL, Si, POWER, MOSFET, FET General Purpose Power
NXP

PHN110

N-channel enhancement mode MOS transistor
NXP

PHN110T/R

TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 4A I(D) | SO
ETC

PHN203

Dual N-channel enhancement mode TrenchMOS transistor
NXP

PHN203,118

PHN203 - Dual N-channel TrenchMOS logic level FET SOIC 8-Pin
NXP

PHN205

Dual N-channel enhancement mode MOS transistor
NXP

PHN205-T

TRANSISTOR 6400 mA, 30 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MS-012AA, FET General Purpose Small Signal
NXP

PHN205/T3

TRANSISTOR 6400 mA, 30 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MS-012AA, PLASTIC, SOP-8, FET General Purpose Small Signal
NXP

PHN210

Dual N-channel enhancement mode TrenchMOS transistor
NXP