GTL2003PW-T [NXP]

NXP bidirectional low-voltage translators; 恩智浦的双向低电压转换器
GTL2003PW-T
型号: GTL2003PW-T
厂家: NXP    NXP
描述:

NXP bidirectional low-voltage translators
恩智浦的双向低电压转换器

转换器
文件: 总2页 (文件大小:239K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
4ꢀ  
         
4ꢀ  
4ꢀ  
4ꢀ  
4ꢀ  
         
Propagationꢀdelay:ꢀ1.5ꢀnsꢀ(typ)  
Channelꢀoff-stateꢀcapacitance:ꢀ7.5ꢀpF  
Veryꢀlowꢀ(5ꢀµA)ꢀstandbyꢀcurrent  
         
Eachꢀdeliversꢀhigh-speedꢀtranslationꢀ  
betweenꢀdifferentꢀvoltageꢀlevelsꢀwithꢀ  
         
         
Noꢀpowerꢀsupplyꢀrequiredꢀ–ꢀpreventsꢀ lowꢀON-stateꢀresistanceꢀandꢀminimalꢀ  
4ꢀ  
         
VeryꢀsmallꢀQFNꢀpackageꢀoptions  
4ꢀ  
4ꢀ  
4ꢀ  
         
Uni-ꢀandꢀbidirectionalꢀtranslationꢀforꢀ  
         
theyꢀofferꢀgreaterꢀdesignꢀflexibilityꢀthanꢀ  
level-shiftingꢀbusꢀswitches,ꢀwhichꢀonlyꢀ  
translateꢀbetweenꢀfixedꢀvoltages.ꢀ  
characteristicsꢀsoꢀdeviationꢀfromꢀoneꢀ  
outputꢀtoꢀanotherꢀinꢀvoltageꢀandꢀ  
         
propagationꢀdelayꢀisꢀkeptꢀtoꢀaꢀminimum.ꢀ  
Theꢀtransistorsꢀalsoꢀprovideꢀexcellentꢀ  
ESDꢀprotectionꢀinꢀcaseꢀtheꢀlow-voltageꢀ  
devicesꢀthatꢀareꢀlessꢀresistantꢀtoꢀESD.ꢀ  
4ꢀ  
         
Noꢀdirectionalꢀcontrolꢀrequiredꢀforꢀ  
NXP bidirectional  
low-voltage translators  
GTL20xx  
Low cost bidirectional voltage  
translation without directional control  
Unlikeꢀlevel-shiftingꢀbusꢀswitches,ꢀwhichꢀonlyꢀtranslateꢀbetweenꢀfixedꢀvoltages,ꢀtheseꢀbidirectionalꢀ  
low-voltageꢀtranslatorsꢀcanꢀtranslateꢀanyꢀvoltageꢀbetweenꢀ1ꢀandꢀ5ꢀVꢀtoꢀanyꢀotherꢀvoltageꢀbetweenꢀ  
1ꢀandꢀ5ꢀV.ꢀTheyꢀalsoꢀreduceꢀON-stateꢀresistanceꢀandꢀminimizeꢀpropagationꢀdelay.  
Key features  
TheꢀNXPꢀfamilyꢀofꢀGunningꢀTransceiverꢀ  
Logicꢀ(GTL)ꢀbidirectionalꢀlow-voltageꢀ  
translatorsꢀincludesꢀtheꢀ22-bitꢀGTL2000,ꢀ  
theꢀ2-bitꢀGTL2002,ꢀtheꢀ8-bitꢀGTL2003,ꢀ  
andꢀtheꢀ10-bitꢀGTL2010.ꢀ  
WhenꢀoneꢀofꢀtheꢀSnꢀorꢀDnꢀportsꢀisꢀlow,ꢀ  
theꢀclampꢀisꢀinꢀtheꢀON-stateꢀandꢀtheꢀSnꢀ  
andꢀDnꢀportsꢀareꢀlinkedꢀthroughꢀaꢀlowꢀ  
ON-resistanceꢀconnection.ꢀAssumingꢀtheꢀ  
higherꢀvoltageꢀisꢀappliedꢀonꢀtheꢀDnꢀport,ꢀ  
whenꢀtheꢀDnꢀportꢀisꢀhigh,ꢀtheꢀvoltageꢀonꢀ  
theꢀSnꢀportꢀisꢀlimitedꢀtoꢀtheꢀvoltageꢀsetꢀ  
byꢀSREF.ꢀWhenꢀtheꢀSnꢀportꢀisꢀhigh,ꢀtheꢀDnꢀ  
portꢀisꢀpulledꢀtoꢀaꢀhigherꢀvoltageꢀbyꢀaꢀ  
pull-upꢀresistor.  
bidirectionalꢀvoltageꢀtranslations  
LowꢀRONꢀresistanceꢀ(6.5ꢀΩ)ꢀbetweenꢀ  
inputꢀandꢀoutputꢀpinsꢀ(Sn/Dn)  
latch-ups  
propagationꢀdelay.ꢀ  
Theyꢀcanꢀtranslateꢀanyꢀvoltageꢀbetweenꢀ  
1ꢀandꢀ5ꢀVꢀtoꢀanyꢀotherꢀvoltageꢀbetweenꢀ  
1ꢀandꢀ5ꢀVꢀasꢀlongꢀasꢀthereꢀisꢀatꢀleastꢀ1ꢀVꢀ  
Thisꢀset-upꢀenablesꢀseamlessꢀtranslationꢀ  
betweenꢀuser-selectedꢀvoltages,ꢀwithoutꢀ  
theꢀneedꢀforꢀdirectionalꢀcontrolꢀsignals.ꢀ  
Applications  
anyꢀvoltageꢀbetweenꢀ1ꢀandꢀ5ꢀV  
Bidirectionalꢀtranslationꢀofꢀlow-  
voltageꢀandꢀlegacyꢀI2C-busꢀsignals  
ShiftingꢀprocessorꢀsidebandꢀI/Oꢀ  
signalsꢀbetweenꢀGTLꢀandꢀLVTTL/TTLꢀ  
levels  
differenceꢀbetweenꢀtheꢀvoltageꢀlevels,ꢀsoꢀ Allꢀtransistorsꢀhaveꢀtheꢀsameꢀelectricalꢀ  
EachꢀGTL20xxꢀdeviceꢀincludesꢀNMOSꢀ  
passꢀtransistorsꢀ(SnꢀandꢀDnꢀpins)ꢀwithꢀaꢀ  
commonꢀgateꢀ(GREFꢀpin)ꢀandꢀaꢀreferenceꢀ  
transistorꢀ(SREFꢀandꢀDREFꢀpins).ꢀ  
Theꢀtranslatorsꢀcanꢀbeꢀusedꢀinꢀanyꢀ  
applicationꢀthatꢀrequiresꢀuni-ꢀorꢀ  
toꢀSREFꢀandꢀtheꢀoutputꢀofꢀeachꢀDnꢀhasꢀaꢀ  
maximumꢀoutputꢀvoltageꢀequalꢀtoꢀtheꢀ  
Forꢀup-onlyꢀtranslation,ꢀaꢀpull-upꢀresistorꢀ  
isꢀrequiredꢀonꢀtheꢀhigh-sideꢀvoltageꢀ(Dn).ꢀ  
bidirectionalꢀvoltageꢀtranslationꢀforꢀ  
voltageꢀlevelsꢀbetweenꢀ1ꢀandꢀ5ꢀV.ꢀ  
Theꢀopen-drainꢀconstruction,ꢀwhichꢀ  
eliminatesꢀtheꢀneedꢀforꢀdirectionalꢀ  
control,ꢀmakesꢀtheꢀtranslatorsꢀidealꢀforꢀ  
voltageꢀofꢀtheꢀpull-upꢀresistorꢀ(3.3ꢀand/orꢀ Thisꢀisꢀbecauseꢀtheꢀtranslatorꢀwillꢀonlyꢀ  
5ꢀV).  
passꢀtheꢀreferenceꢀsourceꢀvoltageꢀ(SREF)ꢀ  
asꢀaꢀhighꢀwhenꢀdoingꢀup-translation.ꢀTheꢀ  
driverꢀonꢀtheꢀlow-sideꢀvoltageꢀonlyꢀneedsꢀ  
aꢀpull-upꢀresistorꢀifꢀitꢀisꢀsetꢀasꢀopenꢀdrain.ꢀ  
Unidirectional voltage translation  
designsꢀthatꢀcombineꢀlow-voltageꢀ(1.0ꢀtoꢀ Theꢀsameꢀconfigurationꢀcanꢀbeꢀusedꢀforꢀ  
1.8ꢀV)ꢀandꢀlegacyꢀ(3.3ꢀand/orꢀ5.5ꢀV)ꢀI2C-  
busꢀsignals.ꢀTheꢀtranslatorsꢀcanꢀchangeꢀ  
I2C-busꢀsignalꢀlevelsꢀatꢀspeedsꢀupꢀtoꢀ3.4ꢀ  
MHz.  
one-wayꢀvoltageꢀtranslation,ꢀeitherꢀupꢀ  
orꢀdown.ꢀForꢀdown-onlyꢀtranslation,ꢀifꢀ  
theꢀchipsetꢀI/Oꢀareꢀopenꢀdrain,ꢀpull-upꢀ  
resistorsꢀareꢀrequired.  
Forꢀmoreꢀinformationꢀonꢀusingꢀtheꢀ  
GTL20xxꢀfamily,ꢀpleaseꢀreferꢀtoꢀ  
ApplicationꢀNoteꢀAN10145ꢀatꢀwww.nxp.  
com/interface.  
Theꢀtranslatorsꢀcanꢀalsoꢀbeꢀusedꢀinꢀ  
designsꢀthatꢀcombineꢀGTLꢀandꢀLVTTL/  
TTLꢀsignals,ꢀshiftingꢀprocessorꢀsidebandꢀ  
I/Oꢀsignalsꢀbetweenꢀvoltageꢀlevels.  
GND  
1
2
3
4
5
6
7
8
9
48  
47  
46  
45  
44  
43  
42  
41  
40  
G
D
REF  
REF  
1
S
REF  
GTL2002  
S
1
D
D
D
D
D
D
D
D
D
S
2
2
S
3
3
GTL2003  
S
4
4
S
5
5
5V  
1.8V  
1.5V  
1.2V  
1.0V  
Bidirectional voltage translation  
Toꢀconfigureꢀtheꢀtranslatorsꢀforꢀ  
bidirectionalꢀclamping,ꢀtheꢀGREFꢀinputꢀ  
mustꢀbeꢀconnectedꢀtoꢀDREFꢀandꢀbothꢀ  
pinsꢀmustꢀbeꢀpulledꢀtoꢀtheꢀhigh-sideꢀ  
VCCꢀthroughꢀaꢀpull-upꢀresistorꢀ(typicallyꢀ  
200ꢀkΩ).ꢀAꢀfilterꢀcapacitorꢀonꢀDREFꢀisꢀ  
recommended.  
GTL2010  
S
6
6
Totem Pole or  
Open Drain I/O  
S
7
7
200 K7  
S
8
10  
11  
12  
13  
14  
15  
16  
17  
18  
39  
38  
37  
36  
8
GTL2002  
S
9
9
GND  
G
D
REF  
S
10  
D
D
D
10  
11  
12  
S
V
V
REF  
REF  
D1  
CC  
CORE  
S
11  
S1  
S2  
S
12  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
CPU I/O  
Chipset I/O  
D2  
S
13  
D
D
D
D
D
D
D
D
D
D
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
S
14  
3.3V  
S
15  
Increase bit size by using  
8-bit GTL2003 or 10-bit  
GTL2010 or 22-bit GTL2000  
S
16  
S
17  
19  
20  
21  
22  
23  
24  
V
CC  
S
18  
S3  
S4  
S5  
Sn  
D3  
D4  
D5  
Dn  
Chipset I/O  
S
19  
TheꢀCPUꢀoutputꢀcanꢀbeꢀsetꢀasꢀtotemꢀ  
poleꢀorꢀopenꢀdrainꢀ(pull-upꢀresistorsꢀmayꢀ  
beꢀrequired),ꢀasꢀcanꢀtheꢀchipsetꢀoutputꢀ  
(pull-upꢀresistorsꢀareꢀrequiredꢀtoꢀpullꢀ  
theꢀDnꢀoutputsꢀtoꢀVCC).ꢀNoꢀdirectionalꢀ  
controlꢀisꢀneededꢀifꢀbothꢀoutputsꢀareꢀsetꢀ  
asꢀopenꢀdrain.ꢀIfꢀeitherꢀoutputꢀisꢀsetꢀtoꢀ  
totemꢀpole,ꢀhowever,ꢀthereꢀmayꢀbeꢀhigh-  
to-lowꢀcontentionsꢀinꢀeitherꢀdirection.ꢀToꢀ  
preventꢀthis,ꢀsetꢀdataꢀasꢀunidirectionalꢀ  
orꢀuseꢀ3-stateableꢀoutputsꢀwithꢀaꢀ  
S
20  
S
21  
S
22  
GTL20xx pinout diagram  
Typical configuration for bidirectional voltage translation  
Ordering information  
Package  
Container GTL2000  
GTL2002  
GTL2003  
GTL2010  
SO  
Tube  
T&R  
Tube  
T&R  
Tube  
T&R  
T&R  
--  
GTL2002D  
--  
--  
--  
GTL2002D-T  
--  
--  
SSOP  
GTL2000DL  
GTL2000DL-T  
GTL2000DGG  
--  
--  
--  
--  
--  
--  
--  
mechanismꢀforꢀdirectionꢀcontrol.ꢀ  
TSSOP  
GTL2003PW  
GTL2010PW  
GTL2000DGG-T GTL2002DP-T GTL2003PW-T GTL2010PW-T  
TheꢀoppositeꢀsideꢀofꢀSREFꢀisꢀconnectedꢀ  
toꢀtheꢀCPUꢀpower-supplyꢀvoltage.ꢀWhenꢀ  
DREFꢀisꢀconnectedꢀthroughꢀaꢀ200-kΩꢀ  
resistorꢀtoꢀVCCꢀandꢀSREFꢀisꢀsetꢀbetweenꢀ1.0ꢀ  
andꢀVCCꢀminusꢀ1.5ꢀV,ꢀtheꢀoutputꢀofꢀeachꢀ  
HVQFN  
--  
--  
--  
--  
--  
--  
--  
GTL2010BS-T  
DHVQFN T&R  
GTL2003BQ-T --  
VSSOP  
XQFN  
T&R  
T&R  
GTL2002DC-T --  
GTL2002GM-T --  
--  
--  
Note: In Europe and Asia, for tube orders, add “, 112” (e.g. GTL2010PW, 112), and for tape and  
Snꢀhasꢀaꢀmaximumꢀoutputꢀvoltageꢀequalꢀ reel orders, replace “-T” with “, 118” (e.g. GTL2010PW, 118).  
www.nxp.com  
© 2007 NXP N.V.  
Date of release: March 2007  
Document order number: 9397 750 15911  
Printed in the USA  
All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The  
information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and  
may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof  
does not convey nor imply any license under patent or other industrial or intellectual property rights.  

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