BUK9230-100B [NXP]
TrenchMOS⑩ logic level FET; 的TrenchMOS ™逻辑电平FET![BUK9230-100B](http://pdffile.icpdf.com/pdf1/p00035/img/icpdf/BUK9230-100B_183345_icpdf.jpg)
型号: | BUK9230-100B |
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描述: | TrenchMOS⑩ logic level FET |
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BUK9230-100B
TrenchMOS™ logic level FET
Rev. 01 — 22 January 2004
Product data
M3D300
1. Product profile
1.1 Description
N-channel enhancement mode field-effect power transistor in a plastic package using
Philips High-Performance Automotive (HPA) TrenchMOS™ technology.
1.2 Features
■ Very low on-state resistance
■ 185 °C rated
■ Q101 compliant
■ Logic level compatible.
1.3 Applications
■ Automotive systems
■ 12 V, 24 V, and 42 V loads
■ Motors, lamps and solenoids
■ General purpose power switching.
1.4 Quick reference data
■ EDS(AL)S ≤ 150 mJ
■ ID ≤ 47 A
■ RDSon = 25 mΩ (typ)
■ Ptot ≤ 167 W.
2. Pinning information
Table 1:
Pinning - SOT428 (D-PAK), simplified outline and symbol
Pin Description
Simplified outline
Symbol
1
2
3
gate (g)
d
mb
[1]
drain (d)
source (s)
g
mb mounting base;
connected to
s
MBB076
drain (d)
2
1
3
Top view
MBK091
SOT428 (D-PAK)
[1] It is not possible to make connection to pin 2 of the SOT428 package.
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
3. Ordering information
Table 2:
Ordering information
Type number
Package
Name
Description
Version
BUK9230-100B
D-PAK
Plastic single-ended surface mounted package (Philips version of D-PAK); SOT428
3 leads (one lead cropped).
4. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
100
100
±15
47
Unit
V
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
-
-
-
-
VDGR
VGS
RGS = 20 kΩ
V
V
ID
Tmb = 25 °C; VGS = 5 V;
A
Figure 2 and 3
T
mb = 100 °C; VGS = 5 V; Figure 2
-
-
33
A
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
185
Figure 3
Ptot
Tstg
Tj
total power dissipation
storage temperature
junction temperature
Tmb = 25 °C; Figure 1
-
167
W
−55
−55
+185
+185
°C
°C
Source-drain diode
IDR
reverse drain current (DC)
peak reverse drain current
Tmb = 25 °C
-
-
47
A
A
IDRM
Tmb = 25 °C; pulsed; tp ≤ 10 µs
185
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-source
avalanche energy
unclamped inductive load; ID = 47 A;
-
150
mJ
VDS ≤ 100 V; VGS = 5 V;
RGS = 50 Ω; starting Tj = 25 °C
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
2 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
03no96
03no40
120
50
I
D
P
(A)
der
(%)
40
30
20
10
0
80
40
0
0
50
100
150
200
(°C)
0
50
100
150
200
(°C)
T
T
mb
mb
VGS ≥ 5 V
Ptot
Pder
=
× 100%
-----------------------
P
°
tot(25 C)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Continuous drain current as a function of
mounting base temperature.
03no39
3
10
I
D
(A)
Limit R
DSon
= V / I
DS D
2
10
t
p
= 10 s
µ
100
s
µ
10
DC
1 ms
10 ms
100 ms
1
2
3
10
1
10
10
V
(V)
DS
Tmb = 25 °C; IDM single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
3 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
5. Thermal characteristics
Table 4:
Symbol Parameter
Rth(j-a) thermal resistance from junction to
ambient
Thermal characteristics
Conditions
Min
Typ
Max Unit
K/W
-
71.4
-
Rth(j-mb) thermal resistance from junction to
mounting base
Figure 4
-
-
0.95 K/W
5.1 Transient thermal impedance
03nk52
1
δ = 0.5
Z
th(j-mb)
(K/W)
0.2
0.1
-1
10
0.05
0.02
-2
10
t
p
P
δ =
T
single shot
t
t
p
T
t
-3
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
10
1
(s)
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
4 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
6. Characteristics
Table 5:
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Static characteristics
V(BR)DSS drain-source breakdown
voltage
Characteristics
Conditions
Min
Typ
Max
Unit
ID = 0.25 mA; VGS = 0 V
Tj = 25 °C
100
89
-
-
-
-
V
V
Tj = −55 °C
VGS(th)
gate-source threshold voltage ID = 1 mA; VDS = VGS
Figure 9
Tj = 25 °C
;
1.1
0.4
-
1.5
2
V
V
V
Tj = 185 °C
Tj = −55 °C
-
-
-
2.3
IDSS
drain-source leakage current VDS = 100 V; VGS = 0 V
Tj = 25 °C
Tj = 185 °C
-
-
-
0.02
1
µA
µA
nA
-
500
100
IGSS
gate-source leakage current VGS = ±15 V; VDS = 0 V
2
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 25 A;
Figure 7 and 8
Tj = 25 °C
-
-
-
-
25
-
30
78
33
28
mΩ
mΩ
mΩ
mΩ
Tj = 185 °C
VGS = 4.5 V; ID = 25 A
VGS = 10 V; ID = 25 A
-
24
Dynamic characteristics
Qg(tot)
Qgs
Qgd
Ciss
Coss
Crss
td(on)
tr
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
VGS = 5 V; VDS = 80 V;
ID = 25 A; Figure 14
-
-
-
-
-
-
-
-
-
-
-
33
-
nC
nC
nC
pF
pF
pF
nS
nS
nS
nS
nH
7
-
13
-
VGS = 0 V; VDS = 25 V;
f = 1 MHz; Figure 12
2854
232
81
3805
278
110
VDS = 30 V; RL = 1.2 Ω;
VGS = 5 V; RG = 10 Ω
30
-
-
-
-
-
86
td(off)
tf
turn-off delay time
fall time
96
46
Ld
internal drain inductance
measured from drain to
center of die
2.5
Ls
internal source inductance
measured from source lead
to source bond pad
-
-
7.5
-
nH
V
Source-drain diode
VSD
source-drain (diode forward) IS = 25 A; VGS = 0 V;
0.85
1.2
voltage
Figure 15
trr
reverse recovery time
recovered charge
IS = 20 A; dIS/dt = −100 A/µs
VGS = −10 V; VDS = 30 V
-
-
114
196
-
-
ns
Qr
nC
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
5 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
03no36
03no35
140
45
5
4.6
4.4
Label is V
(V)
R
10
GS
DSon
(mΩ)
I
D
(A)
40
4.2
4
105
35
30
25
20
3.8
70
35
0
3.6
3.4
3.2
3
2.8
2.6
0
2
4
6
8
10
(V)
3
7
11
15
V
(V)
GS
V
DS
Tj = 25 °C; tp = 300 µs
Tj = 25 °C; ID = 25 A
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values.
03np02
03no37
70
2.8
3.4
3.8
4
5 10
R
DSon
3.6
a
(mΩ)
60
50
40
30
20
2.1
1.4
0.7
0
Label is V
105
(V)
GS
0
35
70
140
-60
10
80
150
220
I
(A)
T ( C)
°
D
j
Tj = 25 °C; tp = 300 µs
RDSon
a =
----------------------------
RDSon(25 C)
°
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
6 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
03ng53
-1
10
03no99
2.5
I
D
V
GS(th)
(V)
(A)
-2
10
2.0
max
min
typ
max
-3
10
1.5
typ
min
-4
-5
-6
10
10
10
1.0
0.5
0.0
0
0.5
1
1.5
2
2.5
3
(V)
-60
10
80
150
220
T ( C)
°
V
j
GS
ID = 1 mA; VDS = VGS
Tj = 25 °C; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
03no33
03no38
80
5000
g
(S)
C
fs
C
iss
(pF)
60
3750
40
20
0
2500
1250
0
C
oss
C
rss
-1
2
10
0
10
20
30
40
50
10
1
10
V
(V)
I
(A)
DS
D
Tj = 25 °C; VDS = 25 V
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of
drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
7 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
03no34
03no32
80
5
V
(V)
GS
I
D
(A)
4
60
V
= 14 V
V
= 80 V
DD
DD
3
2
1
0
40
20
T = 185 C
°
j
T = 25 C
°
j
0
0
1
2
3
4
0
10
20
30
40
Q
(nC)
V
(V)
G
GS
VDS = 25 V
Tj = 25 °C; ID = 25 A
Fig 13. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
Fig 14. Gate-source voltage as a function of gate
charge; typical values.
03no31
100
I
S
(A)
75
50
T = 185 C
°
j
T = 25 C
°
j
25
0
0.0
0.3
0.6
0.9
1.2
V
(V)
SD
VGS = 0 V
Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values.
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
8 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
7. Package outline
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads
(one lead cropped)
SOT428
seating plane
y
A
A
E
A
2
A
b
E
1
1
2
mounting
base
D
1
D
H
E
L
2
2
L
1
L
1
3
b
b
w
M
A
c
1
e
e
1
0
10
20 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
D
L
y
1
1
A
A
A
b
D
E
E
H
UNIT
b
b
c
e
e
1
L
L
w
2
1
2
1
E
1
2
max.
min.
min.
0.65
0.45
0.89
0.71
0.9
0.5
2.38
2.22
0.93
0.73
1.1
0.9
5.46
5.26
0.4 6.22
0.2 5.98
6.73
6.47
10.4 2.95
9.6
2.55
4.81
4.45
mm
4.57
0.2
0.2
4.0
2.285
0.5
Note
1. Measured from heatsink back to lead.
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEITA
99-09-13
01-12-11
SOT428
TO-252
SC-63
Fig 16. SOT428 (D-PAK)
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
9 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
8. Revision history
Table 6:
Revision history
CPCN
Rev Date
Description
01 20040122
-
Product data (9397 750 12237)
9397 750 12237
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 01 — 22 January 2004
10 of 12
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
9. Data sheet status
Level Data sheet status[1]
Product status[2][3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
10. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
12. Trademarks
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.
11. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11 of 12
9397 750 12237
Product data
Rev. 01 — 22 January 2004
BUK9230-100B
TrenchMOS™ logic level FET
Philips Semiconductors
Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Transient thermal impedance . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3
4
5
5.1
6
7
8
9
10
11
12
© Koninklijke Philips Electronics N.V. 2004.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 22 January 2004
Document order number: 9397 750 12237
相关型号:
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