BUK725R0-40C [NXP]
N-channel TrenchMOS standard level FET; N沟道的TrenchMOS标准水平FET
| 型号： | BUK725R0-40C |
| 厂家： | 
NXP |
| 描述： | N-channel TrenchMOS standard level FET |
| 文件： | 总13页 (文件大小：215K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BUK725R0-40C
N-channel TrenchMOS standard level FET
Rev. 01 — 23 March 2009
Product data sheet
1. Product profile
1.1 General description
Standard level gate drive N-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using advanced TrenchMOS technology. This product has been designed
and qualified to the appropriate AEC standard for use in high performance automotive
applications.
1.2 Features and benefits
AEC Q101 compliant
Avalanche robust
Suitable for standard level gate drive
Suitable for thermally demanding
environment up to 175°C rating
1.3 Applications
12V Motor, lamp and solenoid loads
High performance Pulse Width
Modulation (PWM) applications
High performance automotive power
systems
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
Min
Typ
Max Unit
VDS
ID
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
-
-
40
75
V
A
drain current
VGS = 10 V; Tmb = 25 °C; see Figure 1;
see Figure 3;
[1]
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
-
-
-
157
240
W
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source ID = 75 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V;
mJ
avalanche energy
Tj(init) = 25 °C; unclamped
Dynamic characteristics
QGD
gate-drain charge
VGS = 10 V; ID = 25 A; VDS = 32 V; Tj = 25 °C;
see Figure 15
-
-
27
-
nC
Static characteristics
RDSon drain-source on-state
resistance
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 12; see Figure 13
4.1
5
mΩ
[1] Current is limited by package.
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pinning information
Pin
1
Symbol Description
Simplified outline
Graphic symbol
G
D
S
D
gate
mb
D
2
drain
source
3
G
mb
mounting base; connected to
drain
mbb076
S
2
1
3
SOT428
(SC-63; DPAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BUK725R0-40C
SC-63;
DPAK
plastic single-ended surface-mounted package (DPAK); 3 leads (one
lead cropped)
SOT428
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
2 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
40
Unit
V
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
RGS = 20 kΩ
-
VDGR
VGS
-
40
V
-20
-
20
V
ID
Tmb = 25 °C; VGS = 10 V; see Figure 1;
see Figure 3;
[1]
[1]
75
A
Tmb = 100 °C; VGS = 10 V; see Figure 1
-
75
A
IDM
Ptot
Tstg
Tj
peak drain current
Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3
-
490
157
175
175
A
total power dissipation Tmb = 25 °C; see Figure 2
storage temperature
-
W
°C
°C
-55
-55
junction temperature
Source-drain diode
IS
source current
peak source current
Tmb = 25 °C;
[2]
-
-
75
A
A
ISM
tp ≤ 10 µs; pulsed; Tmb = 25 °C
490
Avalanche ruggedness
EDS(AL)S non-repetitive
ID = 75 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V;
-
-
240
-
mJ
J
drain-source avalanche Tj(init) = 25 °C; unclamped
energy
EDS(AL)R
repetitive drain-source see Figure 4
avalanche energy
[3][4]
[5]
[1] Current is limited by package.
[2] Continuous current is limited by package.
[3] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
[4] Repetitive avalanche rating limited by average junction temperature of 170 °C.
[5] Refer to application note AN10273 for further information.
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
3 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aac066
03na19
120
140
ID
(A)
P
(%)
120
der
100
80
80
(1)
60
40
40
20
0
0
0
50
100
150
200
0
50
100
150
200
Tmb (°C)
T
mb
(°C)
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aac305
103
ID
Limit RDSon = VDS / ID
10 μs
(A)
102
100 μs
10
DC
1 ms
100 ms
10 ms
1
10-1
10-1
1
10
102
VDS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
4 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aac068
102
(1)
IAL
(A)
10
(2)
(3)
1
10-1
10-3
10-2
10-1
1
10
AL (ms)
t
Fig 4. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from see Figure 5
junction to mounting
base
-
0.65
0.95
K/W
Rth(j-a)
thermal resistance from vertical in still air; mounted on a printed
-
70
-
K/W
junction to ambient
circuit board; minimum foot-print
003aac067
1
δ = 0.5
Zth(j-mb)
(K/W)
0.2
0.1
10-1
10-2
10-3
0.05
0.02
tp
δ =
P
T
single shot
t
tp
T
tp (s)
10-6
10-5
10-4
10-3
10-2
10-1
1
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
5 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
40
36
1
-
-
-
-
-
-
V
V
V
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 175 °C;
voltage
see Figure 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
-
-
4.4
4
V
V
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10; see Figure 11
2
3
IDSS
drain leakage current
gate leakage current
VDS = 40 V; VGS = 0 V; Tj = 175 °C
VDS = 40 V; VGS = 0 V; Tj = 25 °C
VDS = 0 V; VGS = 20 V; Tj = 25 °C
VDS = 0 V; VGS = -20 V; Tj = 25 °C
-
-
-
-
-
-
500
1
µA
µA
nA
nA
mΩ
0.05
IGSS
2
2
-
100
100
9.5
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 12
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 12; see Figure 13
-
4.1
5
mΩ
Dynamic characteristics
QG(tot)
QGS
QGD
Ciss
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
ID = 25 A; VDS = 32 V; VGS = 10 V;
Tj = 25 °C; see Figure 15
-
-
-
-
-
-
60
-
nC
nC
nC
pF
pF
pF
12
-
27
-
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
2870
540
350
3820
650
490
Coss
Crss
reverse transfer
capacitance
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 30 V; RL = 1.2 Ω; VGS = 10 V;
RG(ext) = 10 Ω; Tj = 25 °C
-
-
-
-
-
27
73
82
63
2.5
-
-
-
-
-
ns
ns
ns
ns
nH
turn-off delay time
fall time
LD
internal drain
inductance
measured from drain to centre of die;
Tj = 25 °C
LS
internal source
inductance
measured from source lead to source
bond pad; Tj = 25 °C
-
-
7.5
-
nH
V
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 14
0.85
1.2
trr
reverse recovery time
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V;
VDS = 30 V; Tj = 25 °C
-
-
50
25
-
-
ns
Qr
nC
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
6 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aac245
003aac244
300
50
ID
10
20
8
ID
(A)
VGS (V) = 7.5
(A)
40
30
20
7
200
100
0
6.5
6
5.5
Tj = 175 °C
10
0
5
Tj = 25 °C
4.5
0
2
4
6
0
2
4
6
8
10
DS (V)
V
GS (V)
V
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 7. Output characteristics: drain current as a
function of drain-source voltage; typical values
003aac248
003aac249
100
30
gfs
(S)
80
RDSon
(mΩ)
20
10
0
60
40
20
0
0
20
40
60
5
10
15
20
ID (A)
VGS (V)
Fig 8. Forward transconductance as a function of
drain current; typical values
Fig 9. Drain-source on-state resistance as a function
of gate-source voltage; typical values
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
7 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
03aa32
03aa35
−1
−2
−3
−4
−5
−6
5
10
I
V
D
GS(th)
(A)
(V)
min
typ
max
4
10
10
10
10
10
max
3
2
1
0
typ
min
−60
0
60
120
180
0
2
4
6
T (°C)
V
GS
(V)
j
Fig 11. Sub-threshold drain current as a function of
gate-source voltage
Fig 10. Gate-source threshold voltage as a function of
junction temperature
03aa27
003aac250
2
16
5.5
7
5
a
RDSon
VGS (V) = 6
(mΩ)
1.5
12
8
1
0.5
0
8
10
20
300
4
0
100
200
400
-60
0
60
120
180
ID (A)
T ( C)
°
j
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values
Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
8 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aac251
003aac247
60
10
VGS
(V)
8
IS
(A)
40
VDS = 32 V
6
4
2
0
20
Tj = 175 °C
Tj = 25 °C
0
0.0
0.5
1.0
V
SD (V) 1.5
0
20
40
60
80
G (nC)
Q
Fig 14. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
Fig 15. Gate-source voltage as a function of gate
charge; typical values
003aac246
5000
C
(pF)
Ciss
4000
Coss
3000
2000
Crss
1000
0
10-1
1
10
102
VDS (V)
Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
9 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
7. Package outline
Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped)
SOT428
y
E
A
A
A
1
b
2
E
1
mounting
base
D
2
D
1
H
D
2
L
L
2
L
1
1
3
b
1
b
M
c
w
A
e
e
1
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
y
max
D
min
E
min
L
1
min
2
1
UNIT
A
A
1
b
b
b
c
D
E
e
e
1
H
D
L
L
2
w
1
2
1
2.38
2.22
0.93
0.46
0.89
0.71
1.1
0.9
5.46
5.00
0.56
0.20
6.22
5.98
6.73
6.47
10.4
9.6
2.95
2.55
0.9
0.5
4.0
4.45
0.5
mm
2.285 4.57
0.2
0.2
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
06-02-14
06-03-16
SOT428
SC-63
TO-252
Fig 17. Package outline SOT428 (DPAK)
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
10 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BUK725R0-40C_1
20090323
Product data sheet
-
-
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
11 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
9. Legal information
9.1 Data sheet status
Document status [1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Applications — Applications that are described herein for any of these
9.2 Definitions
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
9.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
BUK725R0-40C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 23 March 2009
12 of 13
BUK725R0-40C
NXP Semiconductors
N-channel TrenchMOS standard level FET
11. Contents
3
2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
4
5
6
7
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 23 March 2009
Document identifier: BUK725R0-40C_1
相关型号：
BUK7506-30127
TRANSISTOR 75 A, 30 V, 0.006 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, FET General Purpose Power
NXP
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