BUK75 [NXP]

N-channel TrenchMOS standard level FET; N沟道的TrenchMOS标准水平FET
BUK75
型号: BUK75
厂家: NXP    NXP
描述:

N-channel TrenchMOS standard level FET
N沟道的TrenchMOS标准水平FET

文件: 总14页 (文件大小:91K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BUK75/7608-40B  
N-channel TrenchMOS standard level FET  
Rev. 02 — 16 November 2007  
Product data sheet  
1. Product profile  
1.1 General description  
N-channel enhancement mode field-effect power transistor in a plastic package using  
NXP High-Performance Automotive (HPA) TrenchMOS technology.  
1.2 Features  
I Very low on-state resistance  
I Q101 compliant  
I 175 °C rated  
I Standard level compatible  
1.3 Applications  
I Automotive systems  
I General purpose power switching  
I 12 V loads  
I Motors, lamps and solenoids  
1.4 Quick reference data  
I EDS(AL)S 241 mJ  
I ID 75 A  
I RDSon = 6.6 m(typ)  
I Ptot 157 W  
2. Pinning information  
Table 1.  
Pinning - SOT78 and SOT404, simplified outlines and symbol  
Pin  
1
Description  
Gate (G)  
Simplified outline  
Symbol  
mb  
mb  
D
S
[1]  
2
Drain (D)  
3
Source (S)  
mounting base,  
connected to  
drain (D)  
G
mb  
mbb076  
2
1
3
SOT404 (D2PAK)  
1
2 3  
SOT78 (TO-220AB)  
[1] It is not possible to make connection to pin 2 of the SOT404 package.  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
3. Ordering information  
Table 2.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
plastic single-ended package; heat sink mounted; 1 mounting hole; 3-leads SOT78A  
BUK7508-40B  
BUK7608-40B  
TO-220AB  
D2PAK  
plastic single-ended surface mounted package (D2PAK); 3 leads (one lead SOT404  
cropped)  
4. Limiting values  
Table 3.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
40  
Unit  
V
VDS  
VDGR  
VGS  
ID  
drain-source voltage  
-
drain-gate voltage (DC)  
gate-source voltage  
drain current  
RGS = 20 kΩ  
-
40  
V
-
±20  
101  
75  
V
[1]  
[2]  
[1]  
Tmb = 25 °C; VGS = 10 V; see Figure 2 and 3  
-
A
-
A
Tmb = 100 °C; VGS = 10 V; see Figure 2  
Tmb = 25 °C; pulsed; tp 10 µs; see Figure 3  
Tmb = 25 °C; see Figure 1  
-
71  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
-
407  
157  
+175  
+175  
A
total power dissipation  
storage temperature  
junction temperature  
-
W
°C  
°C  
55  
55  
Source-drain diode  
[1]  
[2]  
IDR  
reverse drain current  
Tmb = 25 °C  
-
-
-
101  
75  
A
A
A
IDRM  
peak reverse drain current  
Tmb = 25 °C; pulsed; tp 10 µs  
unclamped inductive load; ID = 75 A; VDS 40 V;  
407  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-source  
avalanche energy  
-
241  
mJ  
VGS = 10 V; RGS = 50 ; starting at Tmb = 25 °C  
[1] Current is limited by power dissipation chip rating.  
[2] Continuous current is limited by package.  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
2 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aac070  
003aac081  
120  
120  
P
I
D
der  
(%)  
(A)  
80  
80  
(1)  
40  
40  
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
(°C)  
T
(°C)  
mb  
mb  
V
GS 10 V  
Ptot  
Pder  
=
× 100 %  
-----------------------  
[1] Capped at 75 A due to package.  
Ptot(25°C)  
Fig 1. Normalized total power dissipation as a  
function of solder point temperature  
Fig 2. Continuous drain current as a function of  
mounting base temperature  
003aac079  
3
10  
Limit R  
= V / I  
DS D  
DSon  
I
D
(A)  
t
= 10 µs  
p
2
10  
100 µs  
(1)  
1 ms  
10  
10 ms  
100 ms  
DC  
1
10  
1  
2
1
10  
10  
V
(V)  
DS  
Tmb = 25 °C; IDM is single pulse.  
[1] Capped at 75 A due to package.  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
3 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
5. Thermal characteristics  
Table 4.  
Thermal characteristics  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
Rth(j-mb) thermal resistance from junction to mounting  
base  
see Figure 4  
-
-
0.95 K/W  
[1]  
[2]  
Rth(j-a)  
thermal resistance from junction to ambient  
-
-
60  
50  
-
-
K/W  
K/W  
[1] Vertical in still air; SOT78 package.  
[2] mounted on a printed circuit board; minimum footprint; SOT404 package  
003aac080  
1
δ = 0.5  
Z
th(jmb)  
(K/W)  
0.2  
1  
0.1  
10  
10  
10  
0.05  
0.02  
t
p
single pulse  
P
δ =  
2  
3  
T
t
t
p
T
t
6  
5  
4  
3  
2  
1  
10  
10  
10  
10  
10  
10  
1
(s)  
p
Fig 4. Transient thermal impedance from junction to mounting bast as a function of pulse duration  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
4 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
6. Characteristics  
Table 5.  
Characteristics  
Tj = 25 °C unless otherwise specified.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
Static characteristics  
V(BR)DSS drain-source breakdown  
voltage  
ID = 250 µA; VGS = 0 V  
Tj = 25 °C  
40  
36  
-
-
-
-
V
V
Tj = 55 °C  
VGS(th)  
gate-source threshold voltage  
ID = 1 mA; VDS = VGS; see Figure 9 and 10  
Tj = 25 °C  
2
1
-
3
-
4
V
V
V
Tj = 175 °C  
-
Tj = 55 °C  
-
4.4  
IDSS  
drain leakage current  
gate leakage current  
VDS = 40 V; VGS = 0 V  
Tj = 25 °C  
-
-
-
0.02  
1
µA  
µA  
nA  
Tj = 175 °C  
-
500  
100  
IGSS  
VGS = ±20 V; VDS = 0 V  
VGS = 10 V; ID =25 A; see Figure 6 and 8  
Tj = 25 °C  
2
RDSon  
drain-source on-state  
resistance  
-
-
6.6  
-
8
mΩ  
Tj = 175 °C  
15.2 mΩ  
Dynamic characteristics  
QG(tot)  
QGS  
QGD  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
gate-source charge  
gate-drain charge  
input capacitance  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
rise time  
ID = 25 A; VDD = 32 V; VGS = 10 V;  
see Figure 14  
-
-
-
-
-
-
-
-
-
-
-
36  
9
-
-
-
nC  
nC  
nC  
12  
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
see Figure 12  
2017 2689 pF  
486  
213  
20  
583  
pF  
pF  
ns  
ns  
ns  
ns  
nH  
291  
VDD = 30 V; RL = 1.2 ;  
-
-
-
-
-
VGS = 10 V; RG = 10 Ω  
51  
td(off)  
tf  
turn-off delay time  
fall time  
20  
33  
LD  
internal drain inductance  
from drain lead 6 mm from  
package to center of die  
from contact screw on  
mounting base to center of die  
SOT78  
4,5  
-
-
-
3.5  
2.5  
7.5  
nH  
nH  
nH  
from upper edge of drain  
mounting base to center of die  
SOT404  
-
-
LS  
internal source inductance  
from source lead 6 mm from  
package to source bond pad  
Source-drain diode  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
5 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
Table 5.  
Characteristics …continued  
Tj = 25 °C unless otherwise specified.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
VSD  
trr  
source-drain voltage  
reverse recovery time  
recovered charge  
IS = 25 A; VGS = 0 V; see Figure 15  
-
-
-
0.85 1.2  
V
IS = 20 A; dIS/dt = 100 A/µs;  
53  
44  
-
-
ns  
nC  
VGS = 10 V; VDS = 20 V  
Qr  
003aac076  
003aac075  
300  
14  
V
(V) = 10  
9.5  
GS  
20  
14  
12  
R
DSon  
(m)  
I
D
(A)  
12  
9.0  
8.5  
8.0  
200  
10  
8
7.5  
7.0  
100  
6.5  
6.0  
5.5  
6
5.0  
4.5  
0
4
0
2
4
6
8
10  
(V)  
5
10  
15  
20  
V
V
(V)  
GS  
DS  
Tj = 25 °C; tp = 300 µs  
Tj = 25 °C; ID = 25 A  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
Fig 6. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
003aac077  
003aab851  
16  
2
6.0 6.5 7.0  
8.0  
a
R
DSon  
(m)  
1.5  
V
(V) = 10  
GS  
12  
1
0.5  
0
8
4
20  
0
100  
200  
300  
60  
0
60  
120  
180  
I
(A)  
T (°C)  
j
D
Tj = 25 °C  
RDSon  
a =  
-----------------------------  
RDSon(25°C)  
Fig 7. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 8. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
6 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aab852  
003aab853  
1  
2  
3  
4  
5  
6  
5
10  
I
V
D
GS(th)  
(A)  
(V)  
min  
typ  
max  
4
10  
10  
10  
10  
10  
max  
typ  
3
2
1
0
min  
60  
0
60  
120  
160  
0
2
4
6
T (°C)  
V
(V)  
GS  
j
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = VGS  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage  
003aac073  
003aac078  
60  
3000  
C
iss  
g
fs  
C
(S)  
(pF)  
40  
2000  
1000  
0
C
oss  
20  
C
rss  
0
2  
1  
2
0
20  
40  
60  
10  
10  
1
10  
10  
I
(A)  
V
DS  
(V)  
D
Tj = 25 °C; VDS = 25 V  
VGS = 0 V; f = 1 MHz  
Fig 11. Forward transconductance as a function of  
drain current; typical values.  
Fig 12. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values.  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
7 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aac074  
003aac072  
100  
10  
V
(V)  
GS  
I
D
(A)  
8
6
4
2
0
V
= 14 V  
DD  
75  
V
= 32 V  
DD  
50  
25  
0
T = 175 °C  
25 °C  
j
0
2
4
6
8
0
10  
20  
30  
40  
V
(V)  
Q (nC)  
G
GS  
VDS = 25 V  
Tj = 25 °C; ID = 25 A  
Fig 13. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
Fig 14. Gate-source voltage as a function of turn-on  
gate charge; typical values.  
003aac071  
100  
I
S
(A)  
75  
50  
25  
0
T = 175 °C  
25 °C  
j
0.0  
0.3  
0.6  
0.9  
1.2  
V
(V)  
SD  
VGS = 0 V  
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
8 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
7. Package outline  
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB  
SOT78A  
E
p
A
A
1
q
mounting  
base  
D
1
D
(1)  
L
L
2
1
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
L
max.  
(1)  
2
e
A
b
D
E
L
D
L
1
A
1
c
UNIT  
p
q
Q
1
1
4.5  
4.1  
1.39  
1.27  
0.9  
0.6  
1.3  
1.0  
0.7  
0.4  
15.8  
15.2  
6.4  
5.9  
10.3  
9.7  
15.0  
13.5  
3.30  
2.79  
3.8  
3.6  
3.0  
2.7  
2.6  
2.2  
mm  
3.0  
2.54  
Note  
1. Terminals in this zone are not tinned.  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
03-01-22  
05-03-14  
SOT78A  
3-lead TO-220AB  
SC-46  
Fig 16. Package outline SOT78A (TO-220AB)  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
9 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)  
SOT404  
A
A
E
1
mounting  
base  
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
D
E
A
A
b
UNIT  
c
D
e
L
H
Q
1
1
p
D
max.  
4.50  
4.10  
1.40  
1.27  
0.85  
0.60  
0.64  
0.46  
1.60  
1.20  
10.30  
9.70  
2.90 15.80 2.60  
2.10 14.80 2.20  
mm  
11  
2.54  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
05-02-11  
06-03-16  
SOT404  
Fig 17. Package outline SOT404 (D2PAK)  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
10 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
8. Soldering  
10.85  
10.60  
10.50  
1.50  
7.50  
7.40  
1.70  
2.15  
1.50  
2.25  
8.275  
8.35  
8.15  
4.60  
0.30  
4.85  
5.40  
7.95  
8.075  
3.00  
0.20  
1.20  
1.30  
1.55  
solder lands  
solder resist  
occupied area  
solder paste  
5.08  
msd057  
Dimensions in mm.  
Fig 18. Reflow soldering footprint for SOT404  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
11 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
9. Revision history  
Table 6.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
BUK75_7608-40B_2  
Modifications:  
20071116  
Product data sheet  
-
BUK75_7608_40B-01  
The format of this data sheet has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
BUK75_7608_40B-01  
20030319  
Product data sheet  
-
-
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
12 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
10. Legal information  
10.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
to result in personal injury, death or severe property or environmental  
10.2 Definitions  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
10.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
10.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
TrenchMOS — is a trademark of NXP B.V.  
11. Contact information  
For additional information, please visit: http://www.nxp.com  
For sales office addresses, send an email to: salesaddresses@nxp.com  
BUK75_7608-40B_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 16 November 2007  
13 of 14  
BUK75/7608-40B  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
12. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
1.4  
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1  
2
3
4
5
6
7
8
9
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12  
10  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
10.1  
10.2  
10.3  
10.4  
11  
12  
Contact information. . . . . . . . . . . . . . . . . . . . . 13  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2007.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 16 November 2007  
Document identifier: BUK75_7608-40B_2  

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