BSP145 [NXP]

N-channel enhancement mode vertical D-MOS transistor; N沟道增强型垂直的D- MOS晶体管
BSP145
型号: BSP145
厂家: NXP    NXP
描述:

N-channel enhancement mode vertical D-MOS transistor
N沟道增强型垂直的D- MOS晶体管

晶体 晶体管
文件: 总9页 (文件大小:54K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DISCRETE SEMICONDUCTORS  
DATA SHEET  
BSP145  
N-channel enhancement mode  
vertical D-MOS transistor  
1995 Apr 24  
Product specification  
File under Discrete Semiconductors, SC07  
Philips Semiconductors  
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP145  
FEATURES  
Direct interface to C-MOS, TTL, etc.  
High speed switching  
d
4
handbook, halfpage  
No secondary breakdown.  
APPLICATIONS  
g
Intended for applications in relay, high speed and line  
transformer drivers.  
1
2
3
s
DESCRIPTION  
Top view  
MAM054  
N-channel enhancement mode vertical D-MOS transistor  
in a SOT223 plastic SMD package.  
Fig.1 Simplified outline and symbol.  
PINNING - SOT223  
PIN  
SYMBOL  
DESCRIPTION  
gate  
1
2
3
4
g
d
s
d
CAUTION  
drain  
The device is supplied in an antistatic package. The  
gate-source input must be protected against static  
discharge during transport or handling.  
source  
drain  
QUICK REFERENCE DATA  
SYMBOL  
PARAMETER  
CONDITIONS  
TYP.  
MAX.  
450  
UNIT  
VDS  
drain-source voltage  
gate-source voltage  
3
V
V
V
VGSO  
VGSth  
ID  
open drain  
±20  
4
gate-source threshold voltage  
drain current  
ID = 1 mA; VDS = VGS  
250  
14  
mA  
RDSon  
Ptot  
drain-source on-state resistance  
total power dissipation  
ID = 100 mA; VGS = 10 V  
10  
up to Tamb = 25 °C  
1.5  
W
1995 Apr 24  
2
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP145  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL  
VDS  
VGSO  
ID  
PARAMETER  
drain-source voltage  
CONDITIONS  
MIN. MAX. UNIT  
450  
±20  
250  
1
V
gate-source voltage  
drain current  
open drain  
V
mA  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
total power dissipation  
storage temperature  
operating junction temperature  
up to Tamb = 25 °C; note 1  
1.5  
W
°C  
°C  
65  
+150  
150  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
thermal resistance from junction to ambient note 1  
CONDITIONS  
VALUE  
83.3  
UNIT  
Rth j-a  
K/W  
Note to the “Limiting values” and “Thermal characteristics”  
1. Device mounted on an epoxy printed-circuit board, 40 × 40 × 1.5 mm; mounting pad for drain lead minimum 6 cm2.  
CHARACTERISTICS  
Tj = 25 °C unless otherwise specified.  
SYMBOL  
PARAMETER  
drain-source breakdown voltage  
gate-source threshold voltage  
drain-source leakage current  
gate leakage current  
CONDITIONS  
VGS = 0; ID = 10 µA  
MIN.  
450  
TYP. MAX. UNIT  
V(BR)DSS  
VGSth  
IDSS  
V
VDS = VGS; ID = 1 mA  
2
3
4
V
VGS = 0; VDS = 350 V  
1
µA  
nA  
IGSS  
VDS = 0; VGS = ±20 V  
±100  
14  
RDSon  
yfs  
drain-source on-state resistance  
forward transfer admittance  
input capacitance  
VGS = 10 V; ID = 100 mA  
VDS = 25 V; ID =250 mA  
VGS = 0; VDS = 25 V; f = 1 MHz  
VGS = 0; VDS = 25 V; f = 1 MHz  
VGS = 0; VDS = 25 V; f = 1 MHz  
10  
200  
mS  
pF  
pF  
pF  
Ciss  
90  
25  
2
120  
35  
5
Coss  
output capacitance  
Crss  
reverse transfer capacitance  
Switching times (see Figs 2 and 3)  
ton  
turn-on time  
VGS = 0 to 10 V; VDD = 200 V;  
ID = 100 mA  
10  
ns  
ns  
toff  
turn-off time  
VGS = 10 to 0 V; VDD =200 V;  
ID = 100 mA  
100  
1995 Apr 24  
3
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP145  
V
= 50 V  
handbook, halfpage  
handbook, halfpage  
INPUT  
DD  
90 %  
10 %  
10 V  
0 V  
90 %  
I
D
OUTPUT  
50  
10 %  
MSA631  
t
t
off  
on  
MBB692  
Fig.2 Switching time test circuit.  
Fig.3 Input and output waveforms.  
MRC207  
MGC433  
1
2
handbook, halfpage  
handbook, halfpage  
P
(1)  
t
=
p
tot  
I
D
(W)  
10 µs  
100 µs  
1 ms  
(A)  
1.5  
1
10  
10 ms  
100 ms  
1
t
p
P
=
δ
1 s  
DC  
2
T
10  
0.5  
t
t
p
T
3
0
0
10  
2
3
50  
100  
150  
1
10  
10  
10  
V
(V)  
T
(°C)  
amb  
DS  
δ = 0.01.  
Tamb = 25 °C.  
(1) RDSon limitation.  
Fig.4 Power derating curve.  
Fig.5 DC SOAR.  
1995 Apr 24  
4
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP145  
MGC431  
MGC436  
120  
1
handbook, halfpage  
handbook, halfpage  
V
= 10 V  
6 V  
GS  
I
D
(A)  
C
(pF)  
0.8  
80  
C
5 V  
iss  
0.6  
0.4  
0.2  
4.5 V  
4 V  
40  
C
oss  
C
rss  
0
0
0
0
10  
20  
30  
4
8
12  
16  
(V)  
V
(V)  
DS  
V
DS  
VGS = 0.  
Tj = 25 °C.  
f = 1 MHz.  
Tj = 25 °C.  
Fig.6 Capacitance as a function of drain source  
voltage; typical values.  
Fig.7 Typical output characteristics.  
MGC435  
MGC438  
30  
1
handbook, halfpage  
handbook, halfpage  
R
I
DS  
on  
D
(A)  
()  
0.5  
15  
0
0
0
0
5
10  
5
10  
V
(V)  
V
(V)  
GS  
GS  
ID = 10 mA.  
Tj = 25 °C.  
VDS = 10 V.  
Tj = 25 °C.  
Fig.9 Drain-source on-state resistance as  
a function of gate-source voltage;  
typical values.  
Fig.8 Typical transfer characteristics.  
1995 Apr 24  
5
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP145  
MGC434  
MGC437  
1.2  
60  
handbook, halfpage  
handbook, halfpage  
V
= 4 V  
4.5 V  
5 V  
R
GS  
DS  
k
on  
()  
1.0  
40  
6 V  
0.8  
20  
10 V  
0.6  
50  
0
10  
3
2
1
10  
10  
1
50  
150  
o
I
(A)  
D
T
( C)  
j
VGSth at Tj  
----------------------------------------  
VGSth at 25 °C  
k =  
ID = 1 mA; VDS = VGS  
.
Tj = 25 °C.  
Fig.10 Drain-source on-state resistance as a  
function of drain current; typical values.  
Fig.11 Temperature coefficient of gate-source  
threshold voltage.  
MLC695  
2.5  
handbook, halfpage  
k
2
1.5  
1
0.5  
0
50  
0
50  
100  
150  
T (°C)  
j
RDSon at Tj  
k =  
-----------------------------------------  
RDSon at 25 °C  
Fig.12 Temperature coefficient of drain-source  
on-state resistance.  
1995 Apr 24  
6
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP145  
MGC432  
2
10  
=
δ
0.75  
R
th j-a  
(K/W)  
0.5  
0.33  
0.2  
0.1  
10  
0.05  
0.02  
0.01  
t
1
p
P
=
δ
T
t
t
p
T
0
1
10  
6
5
4
3
2
1
3
2
10  
10  
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
Tamb = 25 °C.  
Fig.13 Thermal resistance from junction to ambient as a function of pulse time; typical values.  
1995 Apr 24  
7
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP145  
PACKAGE OUTLINE  
0.95  
0.85  
a
0.1 S  
S
seating plane  
0.32  
0.24  
6.7  
6.3  
3.1  
2.9  
B
M
0.2  
A
4
A
0.10  
0.01  
3.7  
3.3  
7.3  
6.7  
o
o
16  
max  
16  
1
2
3
o
10  
max  
0.80  
0.60  
1.80  
max  
M
2.3  
0.1  
B
(4x)  
MSA035 - 1  
4.6  
Dimensions in mm.  
Fig.14 SOT223.  
1995 Apr 24  
8
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP145  
DEFINITIONS  
Data Sheet Status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
1995 Apr 24  
9

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